This is a purely cosmetic change that removes any remaining
references of rows/columns in favor of inputs/outputs since the
former is inconsistent across platforms.
Higher-level code (such as MKBP) may still refer to logical rows
and columns, but low-level GPIO handling code will refer to GPIOs
by their input/output function.
BUG=none
BRANCH=none
TEST=Tested on Snow (ran finger across all numbers and letters)
Change-Id: Idb8b76e8d013568505d826c3a54a1ed8ce143d12
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/44982
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This replaces the hard-coded IRQ mask which has so far worked on
Chrome platforms with a variable that gets set in the initialization
part of keyboard_scan_task(). A simple loop is used to OR the GPIO
mask for each keyboard input provided by the board's gpio_list array.
This will make it easier to adapt the code to future targets with
different pin mappings.
BUG=none
BRANCH=none
TEST=Tested on Snow
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I848ab3c7e8d276dbb807a97c6b26c5b3c05af166
Reviewed-on: https://gerrit.chromium.org/gerrit/44952
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds initial support for the other chips in the stm32f10x
series: stm32f101, stm32f102x, stm32f103x, stm32f105x, stm32f107x.
The main difference is in the register definitions. Clock, flash,
GPIO, and JTAG modules are similar enough that for now we can symlink
the existing source for stm32f100.
BRANCH=none
BUG=none
TEST=Tested on McCroskey (follow-up CL)
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I67363d02578e21be51d842b6bd8b5e4848720993
Reviewed-on: https://gerrit.chromium.org/gerrit/43412
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
This prevents the system from waking from hibernate at very low
battery, then powering on the AP to do software sync only to find that
the charge state machine shuts down the AP before software sync can
complete.
BUG=chrome-os-partner:17124
BRANCH=link
TEST=manual
On both AC and mostly-charged battery:
- With lid open, reboot EC -> on
- With lid open, reboot EC with power held down -> on
- With lid closed, reboot EC -> system boots and does EC software sync
- With system on -> battfake 2 shuts system down
(and at that point, opening lid or pressing power does nothing)
With a hacked charge_state.c so fake_state_of_charge starts at 2:
- With lid open or closed, reboot EC -> off
- Opening lid does not turn on system
- Pressing power button does not turn on system
- Plug power back in and press power -> system turns on
Change-Id: Ie1f2933060fac87b1afe68718f374d51cb8994de
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/44313
Current sample time 1.75us seems too short and some nets with weaker
driver don't convert correctly. Let's lengthen it to 8.75us.
BUG=chrome-os-partner:14319
TEST=See correct voltage level.
BRANCH=none
Change-Id: Ib65a07474787504e5f72522167bafad8bb5730bc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/42845
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add support in the I2C driver for SMBUS-style read block operations.
As defined by the SMBUS standard, a "read block" returns at most 32
bytes of data plus the size of response as the first byte.
It's used to read smart battery strings such as manufacturer or model.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:14314
TEST=On Spring, read the battery manufacturer and model from a kernel
patched for the smart-battery passthrough.
Change-Id: I069ce7f64414817e94516e913643d3847a29d176
Reviewed-on: https://gerrit.chromium.org/gerrit/42647
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=link
BUG=chromium-os:37967
TEST=Remove write protect, reflash without 'unprotect', flag
and verify the write protect flag is stil enabled with
flashrom -p internal:bus=lpc --wp-status. Power down,
then reflash with the --unprotect flag. Now verify the
write protect status flag is disabled.
Change-Id: Ie05b5dc85dd31d29ab43a392fe948a52d547fff3
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/41477
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The host does a lot of ACPI keyboard backlight writes, which were
scrolling the debug console output. Change to using CR instead of LF,
so it's not so distracting.
(No code changes other than debug output)
BUG=none
BRANCH=none
TEST=Move laptop through different ambient light settings and look at
console output as keyboard backlight ramps up and down. The 'ACPI
kblight' messages shouldn't cause piles of scrolling.
Change-Id: Iafde57ffe6090830fa54d4920c48b198c36d8d85
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39914
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reads of HIBRTCC and HIBRTCCSS are not properly synchronized and may
return incorrect data. We were re-checking HIBRTC, but not HIBRTCSS.
BUG=chrome-os-partner:16864
BRANCH=link
TEST=from ec console, do 'rtc' command repeatedly;
printed values should be strictly increasing.
Change-Id: I3e59dc840316ad36bb4851f03b66a3ae3df5cccd
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39795
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Hardware clock uses two timers, currently TIM3 and TIM4. This CL adds an
option to select between TIM2, TIM3, and TIM4, so that we can use any
one the three timer as a PWM source.
BUG=chrome-os-partner:14319, chrome-os-partner:7463
TEST=Build and run on snow/spring. Build success on daisy.
BRANCH=none
Change-Id: I1a00b3d491ee3e131708b573f6ea70e6b56c96dd
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39584
This adds a '-debug' postfix to chip name when debug mode is enabled,
allowing us to probe debug mode from host.
BUG=chrome-os-partner:16700
TEST='mosys -k ec info' and see chip name postfixed with '-tm'
Test same thing on DVT and chip name is not postfixed.
BRANCH=link
Change-Id: Iade26f2009dd3bdb8ddbe92da0da8da5404c6e99
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39455
Reviewed-by: Randall Spangler <rspangler@chromium.org>
If the entire flash is protected (as it normally is after software
sync), fail all flash write/erase operations.
Add a shadow copy of the all_now flag.
BUG=chrome-os-partner:16727
BRANCH=link
TEST=manual
Verify that flash operations work properly before all_now. Then enable HW WP
and
flashwp enable
flashwp now
and try
flasherase 0x38000 0x1000
flashwrite 0x38000 0x100
Those commands should fail with error 7
From the host side
ectool flasherase 0x38000 0x1000
echo 'Khaaaaaaaaaaan' > /tmp/b16727
ectool flashwrite 0x38000 /tmp/b16727
should also fail.
Change-Id: I99a4d2bb86080bd12c900582a8fbdfc79c99916c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39517
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This gives VDDC more time to bleed out before the system reboots.
This will require FAFT changes to compensate for the longer cold reset time.
BUG=chrome-os-partner:16600
BRANCH=link
TEST=from ec console, 'reboot cold' should take a second.
Change-Id: I7e0e901958593262868151642560296f0c5496a7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39515
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The hardware fix for issue 16600 adds RC delays to ENABLE_5VALW, so
that +5VALW stays on during a warm reset of the EC. In the worst
case, +5VALW will drop around 150ms, which could then move the +3VALW
glitch right into the time frame where the EC is booting following
hibernate.
Increase the cold reset hibernate time from 150ms to 200ms. This
ensures that +5VALW has dropped before the EC comes out of hibernate.
BUG=chrome-os-partner:16600
BRANCH=link
TEST=manual
From the EC console, 'reboot cold' a bunch of times. The system
shouldn't hang. (Alternately, you can 'ectool reboot_ec cold' a bunch
of times)
Change-Id: I4bebdb552b8e917c6345badd6efb68b10d7d1f86
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39340
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When reading, the line must be sampled in a narrow timing window after
the output pulse. Interrupts or context switches during this time
corrupt the data.
Similarly, when writing, the difference between a 0-bit and a 1-bit is
the length of the output pulse. So a context switch or interrupt
there can turn a 1-bit into a 0-bit.
BUG=chrome-os-partner:15507
BRANCH=link
TEST=manual
0. plug in AC power
1. hold down shift key for the duration of this test
2. powerled yellow
3. powerled red
4. repeat steps 2-3 several times
5. release shift key
Power adapter LED should toggle color each time. (It may also toggle
to the normally expected color during this experiment, if the charging
task updates it.) Power adapter LED should NOT turn off during this test.
Change-Id: Ief11e6e9a5b07aa3a25c60c50e4e7744a4705713
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/38925
Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This seems to happen when the I2C signals come up so that the EC sees
a start condition from the remote end. In this case, the EC refuses
to talk on the I2C port until the EC's I2C state machine is reset.
Also, don't fail on bus-busy, since that's true during a multi-part
transaction such as an I2C string read.
BUG=chrome-os-partner:16262
BRANCH=link
TEST=boot system; 'battery' and 'temps' should give good info
Then run snanda's suspend_stress_test for a while and repeat.
Or a better test is to open 2 crosh shells, sudo bash in each, and
1) while true; do ectool temps all; sleep 0.5; done
2) suspend_stress_test
Then watch the EC console for "I2C5 bad status" errors. These happen
rarely, only on some systems. With this fix, they'll be reported when
they occur, but should not cause errors to be reported by 'ectool
temps all', since the I2C module will clear the arbitration-lost
status before retrying.
Change-Id: Idfaf9cd7e8ef2abcc0130332890329dd5d2ca052
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/38686
Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
1) Properly report I2C errors on TMP006 as error, not device-not-powered.
2) Treat clock timeout and bus-busy I2C status as error (previously ignored).
3) If clock timeout or bus-busy, reset I2C master for that bus to clear the
error.
These should help with systems where the thermal I2C bus gets into a
weird state on suspend/resume.
BUG=chrome-os-partner:16262
BRANCH=link
TEST=boot system; 'battery' and 'temps' should give good info
Then run snanda's suspend_stress_test for a while and repeat.
Change-Id: I534be8236a4d6de82575fe6d33a68502ce0a3a95
Original-Change-Id: Iec5d6bbd357d2e5eb3dc3d361c829f353e996ab6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/38444
Reviewed-on: https://gerrit.chromium.org/gerrit/38659
Reviewed-by: Yung-Chieh Lo <yjlou@chromium.org>
When a nonexisting file is specified as the EC image, the ec flash
programming script reports the error, but continues running and
returns zero status (success) after completion.
With this change the exit status on some errors gets communicated to
the caller.
The openocd script is edited to drop the unused parameter of the
flash_lm4() function and the flash_ec script is edited not to require
EC images to be executable.
BRANCH=none
BUG=chrome-os-partner:15610
TEST=manual
. run flash_ec with nonexisting or nonreadable file as a parameter,
observe it to report proper return status. Run it with a proper
image file name and observe it succeed.
. run the command again, while the device is being programmed enter
'ctl-c', observe programming stepped but the 'Restoring servo
settings..." message still showing up.
Change-Id: Iac0b233fe579b0d5a84cf5a9acf85ed8bf10422e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/37363
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add i8042 output port commands (0xf0-0xff), I8042_ENABLE_A20 and
I8042_DISABLE_A20.
BUG=chrome-os-partner:13119,
BRANCH=None
TEST=Tested on W7 installer. No KB error shown on EC console.
Change-Id: I9ad1fd7baa10683ef18ccf13faf09dc0cefcca0a
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/34994
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
They're not x86-specific, so move to the chipset interface.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=x86reset warm, then x86reset cold. Should reboot OS in each case.
Change-Id: Ib571ab916bab16179198a0d054320e59afbae124
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36785
This reduces memory / code size, and gets rid of ifdefs in temp_sensor.c.
BUG=chrome-os-partner:15714
BRANCH=none
TEST=boot system and run 'ectool temps all' every few seconds
- ectool temps all
The numbers should update over time.
Change-Id: Idaac7e6e4cbc1d6689f5d3b607c623a5cc536a4f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36940
This fixes the EC not being able to do a cold reset while the power
button is held down, because the power button asserts WAKE#.
BUG=chrome-os-partner:15705
BRANCH=link
TEST=manual
- scope HIB#
- hold down power button
- from console, 'reboot cold'
HIB# should stay asserted for 150ms. Before this fix, it asserted only briefly.
Change-Id: I07c6bb5ee3f846544c75e7e0d4584f8434a9cd56
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/37090
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Puneet Kumar <puneetster@chromium.org>
Support the keyscan test functionality on stm32.
Note: This is enabled by default so that it continues to build. But it
is unlikely that we will want this in a shipping image. I suggest we add
the facility for a dev build.
Secondly, the stack has to be larger due to a printf (which admittedly I
could just remove). Should we make the stack size conditional on the
CONFIG? Seems a bit ugly, on the other hand we don't want to waste IRAM.
BUG=chrome-os-partner:12179
BRANCH=none
TEST=manual for now:
On snow:
./ectool keyscan 20000 key_sequence.txt
See that the test passes.
Change-Id: Ic441ca0bde1be9589a924374605e2f146d16f423
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/35118
Since it handles not just power button, but also lid switch, AC
detect, and other switches.
No functional changes; just renaming.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system, power on/off with power button
Change-Id: I51628a52293f7207715f5f6bf368a08fe6c3dbce
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36821
No functional changes; just code cleanup. On LM4 this also #ifdef's
out the 'sleep' and 'pll' commands since they're big and we don't use
them.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system
Change-Id: I1b72d07d6cca2c783d7ac4c880119df3e88e356e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36799
No functional changes
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system; use gdb to connect to EC
Change-Id: I2817d04e4de102e4201506cfe51cdf0bd939fcdb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36802
Reviewed-by: Simon Glass <sjg@chromium.org>
Tidied comments, and removed handling of ACPI events on host command
port (not needed since EVT hardware is now EOL'd).
BUG=chrome-os-partner:15579
BRANCH=none
TEST='ectool hello' succeeds
Change-Id: I063382b9981f713ba23f7714b4ccb7faa957b411
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36804
And change some direct uart_printf()/uart_puts() output to console
output methods instead. Disable unused comxtest debug command. No
other functional changes.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system; should still see debug output with reset flags
Change-Id: I57fe6bb781a1ba7884afa6d090b74a92f45a53cc
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36835
Adds a new HOOK_TICK event which is called every 250ms (LM4) or 500ms
(STM32). This will be used to consolidate a number of tasks which do
small amounts of work infrequently, and previously needed their own
task functions.
This CL adds the tick task; subsequent CLs will consolidate watchdog
and other tasks into tick hooks.
BUG=chrome-os-partner:15714
BRANCH=none
TEST=taskinfo shows TICK task as lowest priority
Change-Id: I9068ee99d56a5bf5c12afd86ad51998c013f4954
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36908
Reviewed-by: Simon Glass <sjg@chromium.org>
No functional changes
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system, power off with power button, power on with power button
Change-Id: I25aa5c527b7b9f9db6f5c539cecb37ac4bc197f8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36820
Reviewed-by: Simon Glass <sjg@chromium.org>
ADC config structs are now chip-specific; this saves code size
(several hundred bytes on LM4, since no need for 24-entry ADC channel
to GPIO mapping table).
BUG=chrome-os-partner:15579
BRANCH=none
TEST='adc' with system on and off; ChargerCurrent should be bigger when on.
Change-Id: Ia88b3f043438bec049f2d2ad39fc42dcf86d9424
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36798
We'd defined them in a number of different files. This moves
definitions to timer.h, and uses them everywhere we have large delays
(since 10*SECOND is less typo-prone than 10000000).
Also add msleep() and sleep() inline functions. No need for mdelay()
or delay(), since any delays that long should use sleep funcs instead
of spin-waiting.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system; taskinfo displays similar numbers to before
Change-Id: I2a92a9f10f46b6b7b6571759b1f8ab4ecfbf8259
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36726
Code cleanup; no functional changes.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=boot system to OS; should still boot
Change-Id: Icbb628e60792cbecd073a526cd6f879d9e4b20ab
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36692
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
No functional changes. (it might look like
SYSTEM_HIB_MINIMUM_DURATION is a change, but it's not used at present)
BUG=chrome-os-partner:15579
BRANCH=none
TEST=version; chip info should print successfully
Change-Id: Idd7f60a29528e9f6af4f91cd5a556e7336acee9f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36599
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
No functional changes, just cleanup
BUG=chrome-os-partner:15579
BRANCH=none
TEST=i2cscan; should find all expected devices
Change-Id: I8e11d3fa460236e80a0ce1ee923e4413b3202c1e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36569
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
No functional changes; just clean up comments and remove dead code
BUG=chrome-os-partner:15579
BRANCH=none
TEST=code compiles
Change-Id: Id006ae18f2b26cea1720196f696f937811b6ba5b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36448
Reviewed-by: Simon Glass <sjg@chromium.org>
We only have one scan mask and no capability to change scan masks, so
don't reserve space for masks we're not using.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=type on keyboard; should still work
Change-Id: I8ad0c5c894f93c2a79ca646e7666b3279c90a63c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36347
Remove unused code paths. Simplify interfaces. Clarify comments.
Split the protocol constants into their own header file (since they're
used only by keyboard.c, not i8042.c, which is really keyboard
buffering... and will be renamed so in a followup CL.)
This cleanup reduces binary size by about 200 bytes.
BUG=chrome-os-partner:15579
BRANCH=none
TEST=type on the keyboard; it should still work.
Change-Id: I6acbab5fe5604b4b0c516ba3622e6f41820985d1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36271
Previously, all hook functions returned EC_SUCCESS, which was
meaningless because nothing ever looked at the return value. Changing
the return value to void saves ~100 bytes of code size and an equal
amount of source code size.
BUG=none
BRANCH=none
TEST=code still builds; link still boots
Change-Id: I2a636339894e5a804831244967a9c9d134df7d13
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36372
We map the raw DID value to chip name in EC. If the raw value is not in
the mapping table, EC just returns empty string and we lose this
information from host side. Let's return raw DID value like
"Unknown-10ea".
BUG=chrome-os-partner:15519
TEST=remove 0x10ea from the mapping and check 'mosys -k ec info' shows
'Unknown-10ea'.
BRANCH=link
Change-Id: I9399f44ab40db02202ee03ba3f988f3ece010d9f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36305
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This accidentally got disabled when printing keyboard scan state was
turned off by default.
BUG=chrome-os-partner:15466
BRANCH=link
TEST=alt+volup+R should reboot system
Then from console, ksstate on
Then press keys; KB state should print on console
Change-Id: I7d410b56210fda0c73c65d9d76ccc7b4e873516c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/35971
Reviewed-by: Simon Glass <sjg@chromium.org>
