Commit Graph

177 Commits

Author SHA1 Message Date
Bill Richardson
12cdccc00c Add 'lightsaber' command to test the blinky lights.
BUG=chrome-os-partner:7839
TEST=none, work in progress

Change-Id: I20acde8db7f250227adcd4b9dc59328362e68720
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
2012-02-13 16:16:20 -08:00
Bill Richardson
e5b17f9047 Add 8-bit I2C read/write functions.
These provide 8-bit accesses to registers within an I2C device.

BUG=chrome-os-partner:7839
TEST=none

Testing will come when I start using them.

Change-Id: Ib53d3347253bccee93cb9c5da12db92970155d92
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
2012-02-13 16:16:10 -08:00
Bill Richardson
616c60e707 Tiny code cleanup in i2c.c
BUG=none
TEST=none

Signed-off-by: Bill Richardson <wfrichar@chromium.org>

Change-Id: Ibce7c92767d2a65b992a1e629057cc52c7156a20
2012-02-13 14:43:12 -08:00
Randall Spangler
6b8e8be703 Fix discovery and bds builds, which don't have temp sensor or peci
Remove id field from temp_sensor_t struct, since it's only used by the
console command (which already knows the id, because it's looping over
it).

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST='temps'

Change-Id: I0970850073d644509cd5501d7ac4421c7373143b
2012-02-13 10:41:34 -08:00
Bill Richardson
3b02beb41c Merge "Make strtoi() do the right thing for base==16" 2012-02-10 16:33:40 -08:00
Rong Chang
62df62ccd4 Add basic smart battery driver
This change adds a common part of smart battery driver. Following
features are not implemented, or in chip specific driver:
  Battery access control, authentication, factory mode
  Manufacturer access/data commands
  Block read/write, device name, flash data
  Chip specific features, per cell info/temp/capacity

Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7856
TEST=console command check battery staus
  [unplug power]
  > battery
  [check voltage,current,capacity,time to empty]
  [plug power]
  > charger voltage 8400
  > charger current 4250
  > battery
  [check current,time to full]
  > charger input 4032
  > battery
  [check current,time to full]
  [wait 130 seconds, charger watch dog timeout]
  > battery
  [check current]

Change-Id: Ifac17a0892f52e8f37eebc14b00e71f18360776c
Signed-off-by: Rong Chang <rongchang@chromium.org>
2012-02-10 16:12:56 -08:00
Bill Richardson
6e1cdb7898 Make strtoi() do the right thing for base==16
Before, strtoi("11", 0, 16) returned 11.
Now, strtoi("11", 0, 16) returns 17.

BUG=none
TEST=none
2012-02-10 16:11:30 -08:00
Bill Richardson
ee7fce76b0 Must wait on I2C controller before checking status
We have to wait until the controller is no longer busy before we announce
that we're done. Just waiting for the first interrupt isn't enough, because
that's often just an error indicator and the controller still has to stop.

BUG=none
TEST=none

Change-Id: I065c049111d7de276bf8f7cd0eed39c3f5cff5f4
2012-02-10 15:59:02 -08:00
Randall Spangler
6063ad473c Add PECI module and CPU temperature monitoring
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7493
TEST='powerbtn' to boot main processor, then 'temps' and 'pecitemp'

Change-Id: Id57526ebb37c8aecb05ecebccc2824f462b9de1a
2012-02-10 14:09:42 -08:00
Louis Yung-Chieh Lo
186c81dcac Send scan code to host when power button is pressed/released.
But only if the system is in S0.

Approved at internal gerrit: 11595.

BUG=none
TEST=tested on bds.
2012-02-10 12:11:42 +08:00
Dave Parker
7c01418f9c Merge development work from private blizzard.git repo.
BUG=chrome-os-partner:7564
TEST=None

Conflicts:
	.gitignore
2012-02-09 13:39:00 -08:00
Dave Parker
e11243c9a2 RESET. Emptying repository in preparation to merge replacement code.
Development work switched over to a private repository while licensing
issues were sorted out. Now the development work that was done in private
can be opened under the Chromium license.

BUG=chrome-os-partner:7564
TEST=None
2012-02-09 12:16:04 -08:00
Randall Spangler
e42cd379de Print repeated port 80 writes, for coreboot/uboot debugging
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7972
TEST=boot main processor; look for repeated sequential port 80 writes

Change-Id: I07b247130945296ce73177a342e0b2cf5645f4fb
2012-02-09 11:00:11 -08:00
chrome-bot
898aaf1914 Merge "Add tmp006 object temperature calculation" 2012-02-08 17:59:11 -08:00
Vincent Palatin
4467fc3541 stm32l: use USART1 as console
The Daisy board will have the EC UART on the debug connector wired to
USART1 (PA9/PA10 pins)

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=Run Discovery board with mini-servo attached to PA9/PA10 and see
the traces.

Change-Id: I97c59ba388fddb150ff6c76ec3317deedb567546
2012-02-08 17:03:30 -08:00
Vic Yang
059c633a27 Add tmp006 object temperature calculation
Implement TMP006 object temperature calculation. Also add a console
command to calculate temperature with manually entered data.

BUG=chrome-os-partner:7801
TEST=In console, "tempremote 29715 -105000 6390" gives 285.00K.

Change-Id: I0f9193fb970fdc36566399e7083e73ab58965a85
2012-02-08 14:53:17 +08:00
Rong Chang
61e995edaa Fix charger init crash
The current calculation was wrong in previous code import. This CL
fixes current calculation, remove init input current setting, and
adds charger set commands.

Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7855
TEST=build and flash link image, run following commands:
    charger
    charger voltage 4096
    charger current 128
    charger input 4032
    charger

Change-Id: I156ffac9f03d490475088c430232622a12b9ec29
2012-02-07 18:06:20 -08:00
chrome-bot
16df421edc Merge "Initial bq24725 charger driver import" 2012-02-07 16:15:16 -08:00
Randall Spangler
7423b63ea3 More complete x86 power module
Supports turning system on and off via power button.

Also added 'powerbtn' command, which sends a power button press of the
specified duration, and deprecated the 'x86power s0' command, since
pressing the power button is a more correct way of powering on/off the
system.

Note that current coreboot doesn't seem to boot reliably; when it
fails, the x86 asks for S5 and then S0 a second later.  It boots about
every 3rd try.  No indication this is due to the EC; the EC just was
ignoring these requests until this CL.

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7851
TEST=reboot, 'powerbtn', system should power on
'powerbtn', system should power off
'powerbtn 5000', system should power off regardless of previous state
press power button, system should power on
press power button again, system should power off
hold power button 8 sec, system should power off regardless of previous state

Change-Id: I89f419553289b20c78a57bc8cb1699932b095aa1
2012-02-07 15:01:50 -08:00
Rong Chang
812b3f8cb6 Initial bq24725 charger driver import
Battery charging state machine contains many file changes.
This is the 1st part of the break down. Refactor original
test code into board dummy driver. Normalize charger API.
And import link's charger IC driver.

Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7855
TEST=build without warning and error
  BOARD=bds make
  BOARD=link make
  BOARD=discovery make

Change-Id: I34b6e9862a45331378916bc77653d4adb22ca548
2012-02-07 12:54:28 -08:00
Randall Spangler
f214e47717 Turn on when power button pressed
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7850
TEST=reboot, press power button; system should turn on
reboot, type 'x86power s0'; system should also turn on

Change-Id: Iac114c2655240d8aba81283d12f667f8e64d3ad3
2012-02-07 10:33:42 -08:00
Randall Spangler
36d39dbb0d Merge "Fix power button being held down for 8 sec" 2012-02-07 09:36:28 -08:00
Randall Spangler
7ce07a7835 Fix power button being held down for 8 sec
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7932
TEST=hold down power button >8 sec; PCH_PWRBTNn should stay low

Change-Id: If3168984982343735f0c31fb5951374808eb1caf
2012-02-07 09:32:54 -08:00
Vic Yang
730f099c83 Handle up/down arrow keys for UART console.
Record commands used previously and use up/down arrow key to navigate in
the command history.
Also removed the command '.' of repeating last command as we can use up
arrow key now.

Also changed the behaviour of uart_write_char() to be blocking on
transmit FIFO full, so that we do not lose echoed character and do not
need to flush.

BUG=chrome-os-partner:7815
TEST=Type 'help' and enter. Then type 'aaaa' and up arrow key, should
show 'help', and pressing enter prints help.
Type 'hellp' and enter. Then type 'aaaaaa' and up arrow key, should show
'hellp'. Should be able to use left/right arrow key and backspace to
correct it to 'help', and pressing enter prints help.
Type 'help' and enter. Then type 'aaa', up arrow key, and down arrow
key. Should show 'aaa'.

Change-Id: I65c615d61bf63acb31bea329aa91a3202d4db0ad
2012-02-07 10:23:59 +08:00
chrome-bot
d3e1de758c Merge "Additional compilation fix-ups for non-LM4 targets" 2012-02-06 17:03:28 -08:00
chrome-bot
1f0e7dc97b Merge "Add board configuration flags in board.h" 2012-02-06 16:30:15 -08:00
Randall Spangler
bd1d0b11c8 Merge "Add UART1 receive support (UART to x86 console)" 2012-02-06 15:56:00 -08:00
David Hendricks
53c1c20fb8 Additional compilation fix-ups for non-LM4 targets
- Add #ifdef CONFIG_TEMP_SENSOR before #include'ing temp_sensor.h
  which actually requires temp_sensor_id to be defined.
  Revert the forward declare used earlier since it is not the
  correct solution in this case.
- Add #ifdef CONFIG_CHARGER before calling charger_init()

Signed-off-by: David Hendricks <dhendrix@chromium.org>

BUG=None
TEST=compiled on both BDS and Discovery

Change-Id: I60b7e4ba91eb958b3ad724cc9ffa9a12fe9c3a71
2012-02-06 15:40:23 -08:00
Randall Spangler
99b297f990 Merge "Increase simulated power button duration in x86power s0 command" 2012-02-06 15:35:32 -08:00
Randall Spangler
4a7bfe7c43 Increase simulated power button duration in x86power s0 command
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7906
TEST=from ec console, 'x86power s0' should power the system on reliably.

Change-Id: Idebfc8b4e86587b540934d245649f912ccb4aa95
2012-02-06 15:02:57 -08:00
Randall Spangler
300e7edb87 Add UART1 receive support (UART to x86 console)
Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=chrome-os-partner:7488
TEST=type things into the x86 console UART; should appear on the u-boot prompt

Change-Id: I75fd225842c03d11d79280fb7453ad37695279e3
2012-02-06 14:53:49 -08:00
chrome-bot
201de29820 Merge "stm32l: add a tool to flash the SoC using the serial monitor" 2012-02-06 14:49:02 -08:00
Rong Chang
57c581891d Add board configuration flags in board.h
Current makefile takes CONFIG_* flags from $(CHIP)/config.h . This
CL adds $(BOARD)/board.h and a sample charger config flag.

Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7917
TEST=build bds,link board and check warning and error messages.

Change-Id: I1f13d24da6b18c014f40f941ef7245487e5ccc81
2012-02-06 14:45:20 -08:00
David Hendricks
af9532d6fe Add forward declarations in ADC and temp_sensor headers
This is a trivial patch to fix compilation for boards that are not
based on LM4 (e.g. Discovery).

Signed-off-by: David Hendricks <dhendrix@chromium.org>

TEST=Compiled for Discovery
BUG=None

Change-Id: Ia1f29c61ff4a1f65fe65c43a8e58def7d1217ab2
2012-02-06 13:36:19 -08:00
Vincent Palatin
c74bd90fb0 stm32l: add a tool to flash the SoC using the serial monitor
When run with BOOT0=1 and BOOT1=0, the STM32L enters a system monitor
which allows flashing over the serial port (USART1 pins PA9 and PA10).
Implement commands to flash and run a program from a linux Host.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=on a serial port connected to Discovery board pins PA9 and PA10,
run manually the various tools commands.

Change-Id: I42f95ed50a56d82d728989149b3e47210af9dc96
2012-02-06 20:05:33 +00:00
Louis Yung-Chieh Lo
6409913523 Fix some scancodes: F1-F10, arrow keys, and search key.
F1-F7: swap scancode of set 1 and set 2
F8-F10: change from (F9, F10, F11)
arrow keys: swap scancode of set 1 and set 2
Search key: change from CapsLock key

BUG=none
TEST=tested on bds.

Change-Id: Ifb8e715a2cd5f8ea174f7c38647c5ce550382615
2012-02-06 23:15:59 +08:00
Louis Yung-Chieh Lo
d2fc22dcad Uses update_ctl_ram() in 'ctrlram' command.
BUG=none
TEST=tested on bds.

Change-Id: I564e1be8201558d755636205157a6f1c581ec0dc
2012-02-06 22:20:32 +08:00
Louis Yung-Chieh Lo
e3fa162827 Add ctrlram command to get/set controller RAM content.
BUG=none
TEST=tested on bds.

Change-Id: Ibfabf2c35d19c231f3ebe860877b9f4020b0f870
2012-02-06 12:21:53 +08:00
Vic Yang
000a6d5742 Refactor temperature sensor code and add support of Link I2C temp sensor.
Refactor board/chip-specific code into corresponding directories.
Add support of the four I2C temp sensor in Link.
Use table lookup to handle different types of temperature sensors.

BUG=chrome-os-partner:7527
TEST=Correctly read EC internal temperature on bds.
Compile for link succeeded.

Change-Id: I694cfa54e1545798d877fafdf18c5585ab5f03e2
2012-02-04 14:37:04 +08:00
chrome-bot
249467b9f2 Merge "Use udelay for more stable manual IRQ firing." 2012-02-03 00:45:52 -08:00
Louis Yung-Chieh Lo
088b79f285 Use udelay for more stable manual IRQ firing.
Original code tests SND bit, but it is not reliable to indicate the
SERIRQ frame has been sent out because the EC always clears it
immediately. Unfortunately the SIRQRIS is always asserted in
continuous mode so that we cannot rely on it.

So, the udelay(4us) method is the best way we can use now.

Note: the quiet mode? Forget it. My EC never sends out further frames
      after the first has been sent.

BUG=none
TEST=on bds board.

Change-Id: Ica79b463f3dbe7435fe75f3db4cef00ad7ad5ec0
2012-02-03 12:38:42 +08:00
Vincent Palatin
a72b9cc07e Split out GPIO console commands
The GPIO console commands are common to all platform, let's push them in
the common code.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=make BOARD=link && make BOARD=bds && make BOARD=discovery
on BDS console, try gpioget command.

Change-Id: I26e6d26b8d661e78b80d5d5f665e81f4daef0c11
2012-02-03 02:00:27 +00:00
Vincent Palatin
54f36995a4 stm32l: basic GPIO support
No interrupt support yet.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=on Discovery EC console, using "gpioget" and "gpioset" commands
check we can switch the LED and read the button state.

Change-Id: I01294643d3df070a535dab5a6be02c296487fca5
2012-02-03 02:00:27 +00:00
David Hendricks
b2b6eb46b3 correct typo for STM32L GPIO bit set/reset register (BSSR --> BSRR))
Signed-off-by: David Hendricks <dhendrix@chromium.org>

BUG=none
TEST=none

Change-Id: I2f452e4f842ac3b67157f94c5e533b53d0d8baec
2012-02-02 17:44:30 -08:00
Vincent Palatin
71219213f5 Honor V=1 build flag when building tests recursively
Allow to display the verbose command lines even when building the test
programs.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST="make tests" with and without V=1

Change-Id: Ib1195c7e069d7823c2eb7b2311bd5f3c6cd6c835
2012-02-02 22:02:18 +00:00
Vincent Palatin
40528fe87f fix test compilation for STM32L
There is no host command yet and the "hello" test is not using it.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=make tests BOARD=discovery && make tests BOARD=link

Change-Id: Ib7f49f8e38270a8c537e352396b1966abc801511
2012-02-02 22:02:06 +00:00
Vincent Palatin
d7fb7401c0 stm32l: update clock settings
Add a final wait to ensure the clock is ready before returning.
Setup the Flash according to the manual recommendations.

The low-speed oscillator and RTC are now done in the system module with
other RTC inits.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=run the EC firmware on the Discovery and manually exercise various
path through the console.

Change-Id: I4e6149b6fd55c8fc72dbdf6bfc4a10665e0246bd
2012-02-02 22:02:06 +00:00
Vincent Palatin
55f990cd0f Fix image copy detection
When the flash base address is not zero (e.g. STM32L chip), the current
image index is wrongly computed.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=check it compiles for all boards, run on Discovery board and see
proper value.

Change-Id: I06f5508cdffce6d754bd93e870d64087d299c9c7
2012-02-02 19:15:06 +00:00
Vincent Palatin
77b154dd71 stm32l: implement reset cause and scratchpad
Allow to get proper reset reason.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=On the discovery board, try the reset button, the "reboot" command
and a blocking wait, and see the proper reset reason displayed.
Initialize the scratchpad register with "setscratchpad" command and
check we can read it back after reboot.

Change-Id: I1fe1eec4987f7c9816454de4fd3b4addda4ad05a
2012-02-02 19:08:49 +00:00
Vincent Palatin
f771cca719 stm32l: add watchdog support
Use the Independant WatchDog.
The Window WatchDog would provide a nice early warning interrupt before
actually rebooting but the max period (128 ms) is probably too short for
our purpose.

The full GPIO support and the reboot cause detection will be implemented
in later steps.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=on Discovery board, do blocking waits of 500ms and 1500ms, and
check the latter reboots the platform and the former does not.

Change-Id: I26e4d8b26b733269b7811cc3b3a09daf98ea364a
2012-02-02 17:05:40 +00:00