The format of the payload the handler expects is as follows:
field | size | note
================================================================
mode | 1 | 0 - decrypt, 1 - encrypt
cipher_mode | 1 | ECB = 0, CTR = 1, CBC = 2, GCM = 3
key_len | 1 | key size in bytes (16, 24 or 32)
key | key len | key to use
iv_len | 1 | either 0 or 16
iv | 0 or 16 | as defined by iv_len
text_len | 2 | size of the text to process, big endian
text | text_len | text to encrypt/decrypt
Current limitations are such that actual size of the payload should
not exceed 2036 bytes and only ECB and CTR cipher modes are supported.
If necessary, input data is padded to the closest size divisible by
16.
The response generated by the handler consists of the result of the
encrypt/decrypt operation, it is always an integer amount of 16 byte
blocks.
The test code is compiled in if CRYPTO_TEST_SETUP is defined, which it
presently is.
BRANCH=none
BUG=chrome-os-partner:47524
TEST=Using the python utility on the host, exercised several NIST test
vectors for ECB and CTR, with key sizes of 128, 192 and 256 bytes
for both AES types. Both cipher text and decryption result match
the vector values.
Change-Id: I148f286d614f0212192a95b5518cddd32935f43d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312720
Reviewed-by: Nagendra Modadugu <ngm@google.com>
In handle_interrupt(), "|= 1 << 29" will clears all status bits, not
just bit 29. Fix this to make it only clear specified status bit and
keep R/W bits intact.
BUG=None
BRANCH=None
TEST=Verified on Kunimitus system
1. In configure_controller() write R/W bits in completion register
2. In handle_interrupt() print the value of completion register and
status bits is cleared, R/W bits are kept.
Change-Id: I6a9cc17b3dfc1e163af5e56a80600afb8ac23247
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/312701
Commit-Ready: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
To ease finer calculation of ec rate change units from
ms to us.
BRANCH=smaug
BUG=b:24367625
TEST=compile
Change-Id: I52057c8ca1b1180a64b58d1ba0af9ec53f40b026
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312984
Fix a cut and paste error: Gyro should be disabled until the AP asks for
it. It is not used in lid angle calculation.
BUG=none
BRANCH=kunimitsu
TEST=compile
Change-Id: Id70058d76382434cb83b014b1c7439234167406c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312983
Reviewed-by: Alec Berg <alecaberg@chromium.org>
If the proximity sensor indicates there is an object very close
(<= 5cm), ignore light sensor readings.
Otherwise, when someone put their finger on the sensor, the light
sensor would most likely report dark condition and the screen brightness
will be lowered unexpectedly.
BUG=b:25573958
BRANCH=smaug
TEST=check light report does not change when proximity sensor reports
< 5cm, using androsensor apps.
Change-Id: I16db40766a71a7925e28372ebb54ae43f60a4989
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312982
Many architectures do not mind accessing unaligned data, but many do.
Defining special packed accessor structure makes sure that the
compiler takes care of generating proper code.
Decreased performance is the price paid for improved robustness.
Should the performance hit prove too high, we might have to copy keys,
vectors and data into aligned buffers before processing them.
BRANCH=none
BUG=chrome-os-partner:43025, chrome-os-partner:47524
TEST=attempts to use AES driver with unaligned data do not cause
exceptions any more.
Change-Id: I22e8e049ac74d0d1b6e455dca4430a5147b6d711
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312589
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The receive buffer needs to be able to accommodate the largest
commands. Even though the spec sets the size limit at 4096, let's keep
it at 2K for now and see if this needs to be increased.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=with the rest of the patches applied, the AES test vectors pass
through without a problem.
Change-Id: I1cd6979fdaa343f0ddfddb58c552368b3f54db95
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312588
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This code allows to send extension commands over TPM protocol, no
callbacks have been registered yet.
The same buffer is used as input and output data. The header is
stripped off before the callback is called and then re-added after
processing.
This could be used for testing, for proprietary firmware update
protocol, etc.
BRANCH=none
BUG=chrome-os-partner:47524
TEST=none yet
Change-Id: I91f692cc6e20abe774ee4ef001be28e5af102b2a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312587
Always initialize TCPC when TCPM boots. This guarantees
that our TCPM driver is synced up with the TCPC reg values.
BUG=chrome-os-partner:47608
BRANCH=none
TEST=test on glados. reboot EC and PD MCUs independently
with and without external power.
Change-Id: I2d989e8a85ba8a72fe1a8edaef8da9c51651d240
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312951
Reviewed-by: Shawn N <shawnn@chromium.org>
The git author date usually reflects the time a CL was first pushed to
gerrit, not the time it lands to the tree. Therefore, the author date is
misleading when used as a timestamp. Use the git commit date instead.
BUG=chromium:554675
BRANCH=None
TEST=Cherry-pick CL:293345 and verify date stamp is today, not last
August.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I4fb042d7a706fbb86897b3e383b3242602af242b
Reviewed-on: https://chromium-review.googlesource.com/313022
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch introduces a facility which would allow to compile in
callbacks for arbitrary commands passed over various communication
protocols.
Typically this will be used for testing, when various test commands
are multiplexed over an existing protocol.
The callbacks are associated with 16 bit command codes. On input the
callback receives a buffer, containing the command's argument, the
size of the command argument and the maximum size of the buffer. On
output the callback stores processing result in the same buffer and
updates the size to the actual amount of returned data.
Callback descriptors are stored in a dedicated read only section which
is scanned by extension_route_command() to find a callback associated
with a certain command code.
A console channel is also being introduced to allow controlling
console output generated by extension commands handlers.
BRANCH=none
BUG=chrome-os-partner:47524
TEST=none yet
Change-Id: I8ae16a78ca7d72176a5e7f74dd7a232078e7c06c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312586
Reviewed-by: Randall Spangler <rspangler@chromium.org>
update gpio and i2c mapping based on fab 4 hardware
BUG=none
BRANCH=none
TEST=verified image can boot on kunimitsu fab 4 (build w/ undef fab 3 flag)
Change-Id: I3acb2fc57eaff73d1b1b1bc7f41c76035ccdd81a
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/312559
Reviewed-by: Shawn N <shawnn@chromium.org>
Currently, using flash_ec for mec1322 chips only
supports flashing from servo v2. Updated to work from
v3 as well.
BUG=chromium:554230
BRANCH=None
TEST=tested locally with beaglebone/cyan setup at my desk
Ran flash_ec --board=cyan --chip=mec1322
--image=/tmp/image.bin
Change-Id: Ibc1109a60e93d1034519b31ce58c5e4d45ab505c
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312578
Use the previously introduced endian conversion routines in the driver
and the TPM2 library.
Use packed TPM message header structure to make it easy to access
unaligned header fields.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=the tpm startup command still succeeds.
Change-Id: I03078481664858a19617e248f98cb20013c27445
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312585
Support for various communications protocols requires the ability to
convert between big and little endian representation of integers. This
patch moves integer converting functions into the common scope and
uses the built in functions available in ARM architecture.
Since all today's ec platforms are running in little endian mode, the
functions being added assume that the host is little endian.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=none yet
Change-Id: I55ad0c5c3fe9f30cb4ed8ae807b1f5e4a54b8b35
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312584
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Overly complex previous formula could lead the EC to throw all samples
between 2 timestamps and put 2 event within one timestamp.
That would confuse the kernel. If the motion sense task is delayed while
this happen, the delta between the 2 samples could be so long that
CTS test cts.SingleSensorTests would fail.
BRANCH=smaug
BUG=b:24367625
TEST=Loops of cts.SingleSensorTests pass.
Change-Id: I29e6bf354ccb7ecf741a91116854d6abe07558dc
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312364
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The PWM clock on some chips can be configured to use different
sources, which will have a dramatic effect on the actual PWM
frequency. In order to support a variety of devices attached
to PWM outputs add an option to select an alternate source.
This is then implemented on the mec1322 chip to use the 100kHz
clock source for PWM which will allow it to drive a keyboard
backlight at appropriate frequencies.
BUG=chrome-os-partner:47435
BRANCH=none
TEST=verify that kblight brightness can be changed on chell
Change-Id: Ibe93a8e029baae5a2d5f520d590b0cc4ab9a7f93
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312509
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
The bootloader now verifies the RW integrity, the EC facility needs to
be disabled.
BRANCH=none
BUG=none
TEST=the error message "RSA verify FAILED" is not prinetd at startup
any more
Change-Id: I80a0f9dfb844c80c5bd660eec7e37d9ea60b088c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312299
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Nagendra Modadugu <ngm@google.com>
In S0 state, update leds only when needed:
add a variable in get_battery_level to indicate the colors need
to be changed.
BRANCH=smaug
BUG=b:25510300
TEST=Check the traffic on the i2c bus notice less traffic
coming from lightbar task in S0.
Change-Id: I22dce35edd794424f6fbb607a0dbb495eb308897
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311756
Reviewed-by: Alec Berg <alecaberg@chromium.org>
On Ryu EVT2, where sensors share a 100kb i2c bus with other device,
when the sensors set to their maximal frequency and sampling interval
set to 5ms, the power management task would wait forever for the i2c
lock.
Increase the minimal amount of time the task can wait from 3ms to 8ms in
that case.
This is not an issue for Ryu PVT where the sensors are on a separate SPI
bus. However, on EVT, when setting the accelerometer/gyro over 125Hz, EC
won't be able to deliver the data in non-batched mode.
BRANCH=smaug
BUG=b:25510300
TEST=Without this change, an evt2 board would crash when plugging/unplugging
the charger while the sensors are set with:
echo 200000 > iio:device0/frequency # Accel
echo 5 > iio:device0/sampling_frequency
echo 200000 > iio:device1/frequency # Gyro
echo 25000 > iio:device2/frequency # Mag
Change-Id: Idb30da9ab8da61284388db73365c37be3a250dec
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311755
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Use test_export_static for static variable/function that needs to by
used by tests/motion_lid.c
BRANCH=smaug
BUG=none
TEST=Compile, make buildall -j
Change-Id: I2f3eb72ce319622842885be9125b91e58f47133a
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311754
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The .bss.slow input section needs to be included before __bss_end,
otherwise it won't get cleared to zero.
BUG=None
BRANCH=None
TEST=Build jerry. Verify that __bss_end is at the end of the .bss.slow
section.
TEST=make -j buildall tests
Change-Id: I41d028ee166d05b34a889499cdcb0254341be1b6
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/312404
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The code mixes up using of full flash addresses and flash segment
addresses (full address divided by 16). The vast majority of uses in
fact requires full addresses, but all definitions are using segment
addresses.
This patch converts definitions to full addresses, which improves
overall code readability.
BRANCH=none
BUG=none
TEST=verified that the signer signed image still boots properly on
CR50.
Change-Id: I35663c14357545c08ac1824d653c29cf6c4dda4d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311313
Reviewed-by: Nagendra Modadugu <ngm@google.com>
The PCH_RTCRST signal is active high controlling the gate of a FET.
Therefore, it's default state should be low.
BUG=chrome-os-partner:47505
BRANCH=None
TEST=Built. The FET is unstuffed on both boards currently.
Change-Id: Ia0e07e67e6ea4eecf151ac8890ad98c8a337c01e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312061
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
SERIRQ bug:
PMC1/2 share the same IRQ number 1 with default setting. Enable it will
influence 8042 protocols since KBC has no data but IRQ 1 is issued by
PMC.
AC detection bug:
GPIO definitions between AC_PRESENT and ACOK mismatched. AC_PRESENT will
always
be high even we don't plug the adaptor.
Modified drivers:
1. lpc.c: Remove enabling SERIRQ for PMC1/2 and disable IRQ12 for Mouse.
2. config_flash_layout.h: Modified for adjusting RAM size.
3. gpio.inc: Modified GPIO definitions for AC issue
4. board.h: Modified for adjusting RAM size and add support for ACC
5. board.c: Add support for ACC and adjust ADC max value
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Ib330ef4078e4b06f1c01a2a6316e468b43d7a8d9
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/311933
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:46056
BUG=chrome-os-partner:46063
BRANCH=None
TEST=Enable CONFIG_REPLACE_LOADER_WITH_BSS_SLOW on GLaDOS. Build,
flash, and verify AP and EC boot. Suspend/Resume and verify that port80
data is in the history.
TEST='sysjump rw' suspend/resume nad verify that new port80 writes are
present in the history.
TEST=make -j buildall tests.
CQ-DEPEND=CL:311209
Change-Id: Idebb3247b55465f1fbf35a33dff2f00968b8f4ce
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/311365
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit introduces a new CONFIG_* option. To utilise the
experimental console, simply define the following config option in the
board's board.h file.
#define CONFIG_EXPERIMENTAL_CONSOLE
This is a temporary option which allows the EC console to be work with
the EC-3PO interactive console interface. When this option is enabled,
the EC expects commands to packed in a particular format. This is for
command integrity and allows the interpreter to perform automatic
command retrying in the event that a character is dropped from the sent
command.
It also removes a lot of the console editing methods since they are now
being served by EC-3PO.
Once the EC-3PO interpreter is pulled into servod, we can enable this
feature by default and the config option can go away.
BUG=chrome-os-partner:46054
BRANCH=None
TEST=make -j buildall tests
TEST=Enable CONFIG_EXPERIMENTAL_CONSOLE on GLaDOS; Flash EC and verify
that console works via the EC-3PO interactive console interface.
TEST=Build and flash on GLaDOS and verify normal console operation on
standard EC UART.
CQ-DEPEND=CL:308615
Change-Id: I5e66eb94e31299b27ce029b7f7ce6ba0a7fb6816
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/309991
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:46056
BUG=chrome-os-partner:46063
BRANCH=None
TEST=Enable CONFIG_REPLACE_LOADER_WITH_BSS_SLOW on GLaDOS. Build,
flash, and verify that AP and EC boot. Perform typing test with no jank
or other oddities.
TEST='sysjump rw' and repeat the typing test.
TEST=Hold down arrow down and issue 'reboot' command.
TEST=make -j buildall tests
CQ-DEPEND=CL:311209
Change-Id: I35911862af2a4e9feb795b2a9a2aafa97687e2f2
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/311411
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
EC-3PO is the console interpreter that will one day replace the EC console
that we have today. EC-3PO aims to migrate our rich debug console from
the EC itself to the host. This allows us to maintain our rich debug
console without impacting our EC image sizes while also allowing us to
add new features.
This commit is the 1st of three phases, the insertion phase. The main
goal of this insertion phase is to get EC-3PO in place between servo and
the EC UART, while not modifying the behaviour of the console too
much. At this point, EC-3PO is capable of the following things:
- Replicate command editing.
- Save command history.
- Performs error checking with console commands.
The command editing should be at parity with the current EC console.
With EC-3PO, one can have a much longer command history which also
persists across EC reboots. And lastly, with a cooperating EC image,
EC-3PO can perform error checking with console commands. Automatically
retrying console commands if the command was incorrectly received at the
EC end.
Currently, commands are sent to the EC in a "packed" plaintext form.
The next phase will introduce the host command packet communication.
console.py is the module that provides the console interface between the
user and the interpreter. It handles the presentation of the console
including command editing.
It also has an accompanying set of unit tests in console_unittest.py.
It currently has 1 test suite to test the various console editing
methods.
interpreter.py is the module that provides the interpretation layer
between the EC and the user. It also is responsible for the automatic
command retrying. It requires pipe connections to be made to it for
command and debug data communication.
BUG=chrome-os-partner:46054
BRANCH=None
TEST=util/ec3po/console_unittest.py
TEST=Flash GLaDOS with a modified EC build. Run console.py passing the
EC UART, verify that I can edit commands, send commands, view command
history, and receive output from the EC.
TEST=cros lint --log-level debug ./util/ec3po/console.py
TEST=cros lint --log-level debug ./util/ec3po/interpreter.py
TEST=cros lint --log-level debug ./util/ec3po/console_unittest.py
Change-Id: I38ae425836efd69044334e1ed0daf3f88a95917c
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/308615
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
Fix bug with the new VBUS_NEVER_LOW flag in which if a BC1.2 charger
is attached on boot, we will not set the charger as a dedicated
charger and therefore not charge from it, until the charger is
disconnected and reconnected. This happens because in SNK_DISCOVERY
we will send soft reset first, and then when the charger doesn't
respond, we send hard reset. But, registering the charger as a
dedicated charger previously only happened when we send hard reset
directly after SNK_DISCOVERY state.
BUG=none
BRANCH=none
TEST=tested on glados. sysjump with bc1.2 charger plugged in and make
sure we charge from it.
Change-Id: Ida89304092a2186bcb2aa885917d706231490288
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311364
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
When SPI CS is deasserted, SPI MISO is floating, which leads to leakage.
BUG=chrome-os-partner:42104
BRANCH=None
TEST=Manual on glados. Verify S5 power drops by ~1.5mW and sysjump / EC
RW hashing continues to function.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0ba8fcab1618f396adc32984da93e37c5ff770a4
Reviewed-on: https://chromium-review.googlesource.com/311821
Commit-Ready: Shawn N <shawnn@gmail.com>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Re-order logic in BC1.2 detection task so that we open the
USB switches immediately upon detecting a connection, then
debounce the connection, then reset the pericom and determine
BC1.2 charger type.
This fixes two problems:
- Problem where host could enumerate dut, detect disconnect,
and then re-enumerate.
- Problem where sometimes dut would detect a host workstation
as a proprietary charger because we weren't delaying long
enough after opening USB switches before triggering pericom
reset.
BUG=chrome-os-partner:47219
BRANCH=smaug
TEST=tested by connecting workstation to ryu (tested both
pluggin in A side first and C side first). Without this patch,
my workstation often see's disconnect and reconnect. With
this change we only get one connect.
Change-Id: I07cc3473ff32953fad3cc6d1db01b86b44969c4e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311804
Reviewed-by: Shawn N <shawnn@chromium.org>
