After I2C unwedge, *all* I2C ports will be re-initialized in
i2c_raw_mode() by gpio_config_module(MODULE_I2C, 1);
This means *all* I2C pins will be programmed as GPIO then enable I2C
alternate function.
If I2C Unwedge happened while there is an active I2C transacation on
another port, the active I2C transaction will be corrupted, since the
pins will be temporary programmed as GPIO Output High.
BUG=chrome-os-partner:40519
TEST=Warm-reboot test on Cyan EVT and no discharging while AC is on.
BRANCH=none
Change-Id: I3be1d5c60bf4ab385bc077202406ec7abd8b2add
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287493
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Denny Iriawan <denny.iriawan@intel.com>
This patch adds a module which runs on top of the SPS driver and
implements the TCG SPI TPM protocol.
Basic register read and write functions are implemented as well as
rudimentary TPM state machine (claiming/releasing locality).
An enhancement is made to the SPS driver to ensure that when the CS is
deasserted the transmit FIFO is reset too, on the off chance of the CS
going away mid transaction for whatever reason.
In this implementation the slave is guaranteed to stall the master for
a few bytes in both receive and transmit transactions, which is
further aggravated by the fact that RX FIFO threshold is set to 8
(this is the minimum number of bytes the master has to send to wake up
the slave). This could be fine tuned later, for instance made a
parameter of the receive callback registration function.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=trunksd initialization (with minor changes to accommodate new
VID/DID and some status bits, to be published) succeeds with the
cr50 connected to the USB/SPI cable.
Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285252
As new features come along the console channel space limited at 32
becomes very tight. But not all features are present all the time.
Let's make some of the channels compile time configurable. This makes
for uglier code but allows to support more channels.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: Id21560d4aa05c0e5245872c50ae19340cda8fd3e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286610
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
SPI slave and master interfaces require very different code to
support, they should have separate configuration options.
Host command code printouts should use their own console channel.
Using SPS to designate SPI Slave interface is not universally
acceptable, a bug has been opened to discuss the alternatives and
clean up the code.
BRANCH=none
BUG=chromium:512613
TEST=make buildall -j
Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Add a X-macro CONFIG_LID_SWITCH_GPIO_LIST to be able to optionally
specify more than one GPIO to check to find out whether the lid is open.
By default, use GPIO_LID_OPEN as before.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, define CONFIG_LID_SWITCH_GPIO_LIST as
LID_GPIO(GPIO_LID_OPEN) LID_GPIO(GPIO_BASE_PRES_L) and play with magnets
and the genuine lid, check we get the right "lid open" / "lid close"
messages on the console.
Change-Id: I9e7c67bb39f36f254d31d5861d535d69db754faa
Reviewed-on: https://chromium-review.googlesource.com/287852
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
It's sometimes desirable to boot without a battery, but we may brown out
if we don't have sufficient current. Inhibit AP power-on, even if the system
is unprotected, until our charger and current limit are initialized.
BUG=chrome-os-partner:41258
TEST=Manual on reworked glados with subsequent commit. Remove battery and
attach Zinger. Verify EC powers on and AP doesn't boot. Run `powerbtn`,
verify that AP boots. Remove all power and attach battery, verify that EC
powers on and AP boots.
BRANCH=None
Change-Id: Ifc3d16f8288a035854e9fd05812ce6de33170d6a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/280563
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Create new custom VDM to notify DUT to enter case closed
debugging mode. Send this VDM from Plankton when the case
closed debugging enable button is pressed. Once DUT
receives the CCD enable VDM, CCD remains enabled until
a reboot. Note, this is polarity dependent, so cable
might need to be flipped.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=load on plankton and ryu. attach full feature C to C
cable (must have USB3.0 wires). make sure plankton is in
USB mode (USB_SS_USB_MODE light should be set, which can be
done by pressing DP_USB_TOGGLE button). Press CASE_CLOSE_EN
button to send VDM, and then attach micro-B to debug port
CN14 on plankton. See that VID/PID for Ryu show up in lsusb
on host, and EC console works. If device does not show up,
flip polarity of cable.
Change-Id: Ifa469e4a43e32089becd75fe6cdfe0ed462d950b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287441
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
math library can be set independentely.
It is implied when motion sensor drivers are compiled in.
BRANCH=smaug
TEST=Build strago board specific tests, host test and ran
ryu image.
BUG=chromium:512329
Change-Id: I743ea7b44e4a3783602c11f3928cb3fa4b105ec4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287371
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
BUG=none
BRANCH=none
TEST=Added OPT3001 config to test the sensor in Kunimitsu.
Able to read the als data from "als" console command.
Varied the light intensity and the als reading are changing.
Driver fits into the existing ALS framework.
Change-Id: Idb2e6f9f50b6d0d6c8f64c11336efd3f2c76d498
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286782
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=none
TEST=Enabled the config and tested on Kunimitsu.
Enter "shutdown -h now" form the Kernel console.
Device goes to Sleep mode in G3 and charger LED turns off.
BRANCH=none
Change-Id: I962018dcfac2998ee0a11784adeceb09931b930d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286781
Reviewed-by: Shawn N <shawnn@chromium.org>
Fix hibernate so that plugging a USB-C charger properly wakes the
system. In addition, change the default hibernate behavior to restart
after wake.
BUG=chrome-os-partner:42104
TEST=Run 'hibernate' on Glados. Verify that wakes occur when power
button is pressed, lid switch is toggled, or when a charger is attached
to either USB-C port.
BRANCH=None
Change-Id: I54b8d58e20c35f25883238df24e7f23bb743abaa
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286660
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The same calculation is used across the code, so move it to a common
macro.
BUG=chrome-os-partner:42104
TEST=Verify Glados still boots AP.
BRANCH=None
Change-Id: I90da348f37fc670971737cfc5ddcfb9c34096c4b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286169
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This commit adds the 8042 scancodes to the shared objects library saving
504 bytes from the RW image. To enable the space savings, define
CONFIG_SHAREDLIB in the target's board.h file.
BUG=none
BRANCH=none
TEST=make -j buildall tests
TEST=Built samus EC image and verified keyboard still worked in RO and
RW.
TEST=Built samus EC image with CONFIG_SHAREDLIB enabled and verified
that the keyboard still worked in RO and RW.
TEST=Enabled CONFIG_SHAREDLIB for glados and cyan and watched build
fail.
CQ-DEPEND=CL:275344
Change-Id: I1241506c6b34d63e270677d4e8d0531a8a4236c9
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/276212
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This commit introduces the macros needed for the shared objects library.
To enable the creation of the shared objects library for a particular
board, simply define it in board.h.
#define CONFIG_SHAREDLIB
In order to actually add objects to the shared library, one must utilize
the SHAREDLIB() macro around the definition of the object. All of the
objects in the shared library will be placed into a separate binary
which the RO and RW images link against. The SHAREDLIB() macro simply
adds this attribute and prevents the RO and RW images from compiling
them in. This library will reside at a fixed location in memory
(currently following the RO image) and the size of the library can be
defined on a board by board basis. For example, in board.h:
#undef CONFIG_SHAREDLIB_SIZE
#define CONFIG_SHAREDLIB_SIZE 0x800
For example,
# In foo/build.mk
foo-$(CONFIG_BAR)+=bar_sharedlib.o
# In foo/bar_sharedlib.c
#include "libsharedobjs.h"
SHAREDLIB(const uint8_t shared_var = 0x43);
# In include/bar_sharedlib.h
extern const uint8_t shared_var;
BUG=none
BRANCH=none
TEST=make -j buildall tests
TEST=Enabled config option and saw the sharedlib being created.
TEST=Enabled config option on unsupported board and saw build fail.
CQ-DEPEND=CL:274079
Change-Id: I2abeb1be248ab161fa81c897d2f5793f5a599456
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/275344
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs). The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.
Now, there are 3 make goals: ro, rw, and libsharedobjs.
In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.
NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.
BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).
CQ-DEPEND=CL:285934
Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Fixes cyan/board.h to use correct SPI part
* Adds new flash protection regions in spi_flash_reg.c
* Sets SRP register in flash_physical_protect_at_boot()
* Fixes a bug in COMPARE_BIT macro
* Makes spi_flash_set_status() fail only when both HW pin is asserted
AND SRP(s) are set
* Makes sure set_flash_set_status() completes before returning
BUG=chrome-os-partner:40908
BRANCH=master
TEST=on Cyan:
With WP pin de-asserted:
flashrom -p ec --wp-enable
flashrom -p ec --wp-status, make sure it is enabled
flashrom -p ec --wp-disable
flashrom -p ec --status, make sure it is disabled
flashrom -p ec --wp-enable
Assert WP pin (either with screwdriver or dut-control)
flashrom -p ec --wp-disable
make sure it failed
Change-Id: I338cc906b73e723fdbb37f7c2fd0c4da358b6c8e
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276671
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Allow multiple GPIOs to wake the EC from hibernate by requiring boards
to define hibernate_wake_pins and hibernate_wake_pins_used. In addition,
clean up the GPIO-skipping hibernate code, and skip setting PCH_RTCRST
as an input due to a bug on certain boards.
BUG=chrome-os-partner:42104
TEST=Manual on Glados. Run 'hibernate' from EC console, verify that EC
wakes with power button press or with "dut-control lid_open:no".
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I13a6e062393cab8ed7129eda253585951f771109
Reviewed-on: https://chromium-review.googlesource.com/285924
Reviewed-by: Alec Berg <alecaberg@chromium.org>
To ease driver loading in the kernel, add a bit in the feature field
to indicate the EC has an internal software FIFO for sensor events.
BRANCH=smaug
BUG=chrome-os-partner:39900
TEST=compile, kernel modules load as expected on Smaug.
Change-Id: I1ae0b9ebb587bb4939745e8a0e16d73d95ba31d7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285774
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Previously all access to the queue was done by adding or removing units
with no access to the underlying byte array, or ability to notify the
queue that the byte array had been updated. This prevented direct DMA
transfers to and from the underlying byte array.
This change adds a new struct, a queue_chunk, that represents a
contiguous region of the queues byte array. Regions of valid units as
well as free space can be requested. And there are now update functions
to signal to the queue that new units were added or existing units were
read from these chunks. A chunk can be queried and used to initialize
a DMA transfer, as interrupts or polling indicates that the DMA is
working the queue indicies can be updated and the policy activated as
needed.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I7e37d937c56153122f0a3c73ba8064b656106e3a
Reviewed-on: https://chromium-review.googlesource.com/285556
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Even a decent type-C device SHALL respond SNK_CAP query message when we are in
SRC_READY state, but in the case its mal implementation shouldn't get us being
trapped in an infinite loop of SRC_READY / SRC_GET_SNK_CAP states.
Introduce a counter to give up sending of SNK_CAP and just print a ERR
indication log when the partner device ignores SNK_CAP query.
BUG=none
BRANCH=samus
TEST=make buildall
manual testing against the failing USB-C device
Change-Id: I4c4251b2264230d7dd30bd2b9fc2b56027ff0d5a
Signed-off-by: Bernard Shyu <bernard_shyu@bizlinktech.com>
Reviewed-on: https://chromium-review.googlesource.com/284035
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
- Compass was not set properly if default config is set to
disable it (frequency == 0). We were trying to set it up
while stuck in debug mode.
- BMI150 FIFO collects sensor info even when suspended.
Ask FIFO to ommit suspended sensors.
- FIx compliation issue on nucleo-f411 board, where
MKBP is not enabled.
- Fix location of __packed arguement.
BRANCH=smaug
BUG=none
TEST=Check the compass is back with accelinfo,
FIFO is not filled with garbage with fiforead.
Check by echoing in in_accel_z_calibbias that the format
of MOTIONSENSE_CMD_SENSOR_OFFSET has not changed.
Change-Id: I7ebec12a14a74b8385b9f9532562a1fd0213f4d7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284929
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add code for set/getting calibration data on bmi160
Add code to perform FOC (Fast Online Calibration) on bmi160.
Add delay after getting out of suspend to be sure sensor is
available.
BRANCH=smaug
TEST=Check sensors are properly calibrated on Smaug:
Perform calibration:
echo 1 > /sys/bus/iio/devices/iio:device1/calibrate
Read calibration values:
cat /sys/bus/iio/devices/iio:device1/*_calibbias
Check the values are translated properly.
Write calibration values and check it affects the
sensor output.
BUG=chromium:506101,chrome-os-partner:39900
Change-Id: Ib9aad9bbd90b4249625641d68febf94b69aa4987
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283165
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Store at which frequency each sensor should be sampled.
This frequency is different from the sensor frequency:
- sensor frequency: frequency at which the sensor produce information.
- sensor sampling frequency: frequency at the which the EC gater
information.
If 2 sensors must be sampled at very different frequency,
we don't want to oversample the slow one, and filling the
software FIFO unnecessarily.
BRANCH=smaug
TEST=Unit test. Check that frequency is correct when sensor
frequencies change from IIO driver.
BUG=chrome-os-partner:39900
Change-Id: I4272963413f53d4ca004e26639dc7a2affd317eb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284616
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When FIFO overfills, keep track of the number of lost vectors per
vector types. This way, when we calculate timestamps in user space,
we can evaluate the number of empty slots to skip per vector type.
This is important when different types are samples at very different
frequencies.
BRANCH=smaug
TEST=Check that when we drop events, the timestamp are better than
without.
BUG=chrome-os-partner:39900
Change-Id: Ib9cb994ada38373e5a49dd4ba2123ca7534a169e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284615
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Remove duplicate board_discharge_on_ac() functions and create
CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM for boards that have a
unique implementation of board_discharge_on_ac().
BUG=chrome-os-partner:42294
BRANCH=none
TEST=make -j buildall.
load on samus and test 'ectool chargecontrol discharge' forces
discharging on AC, and 'ectool chargecontrol normal' resumes normal
charging.
Change-Id: I2b7c04b9278d07748d6d41798ceab1a7e90684e4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284911
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit changes the way in which tasks are started. Instead of
having all tasks marked as ready to run upon initialization, only the
hooks task is marked as ready to run. HOOK_INITs are now run at the
beginning of the hooks task. After the HOOK_INITs, the hooks task calls
back to enable the rest of the tasks, reschedules, and proceeds as
usual. This also allows the removal of checks for task_start_called().
BUG=chrome-os-partner:27226
BRANCH=None
TEST=Built and flash EC image for samus and verified that EC boot was
successful as well as AP boot. Additionally, verified that charging,
keyboard, tap-for-battery were all still functional.
TEST=make -j buildall tests
Change-Id: Iea53670222c803c2985e9c86c96974386888a4fe
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/283657
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Remove board function callback on charge override timeout, since
the implementation should be common to all boards: send host event.
This function is called when a power swap fails during an issued
charge override and notifies the host so that it is aware that the
power swap did not succeed.
BUG=none
BRANCH=smaug
TEST=make -j buildall
Change-Id: Ia2a078a17aef6b302fd2b9fd21a5a92c628fd7db
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284923
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Remove duplicate definitions of USB charger min current across
boards and make one set of defines for standard USB charger voltage
and minimum USB charger current.
BUG=none
BRANCH=smaug
TEST=make -j buildall
Change-Id: Ib842fafb317417c8de9a67d314fdde4c1e47ad9d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284956
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add FIFO support, where bmi160 hardware FIFO is copied in local fifo.
Add rudimentary support for single/double tap and lift detection.
BUG=chrome-os-partner:39900
BRANCH=smaug
TEST=Check on F411 that FIFO data is retrieved and correct.
Check on Smaug as well, with proper kernel the collect the FIFO:
- check that increasing sampling_frequency we are collecting
the FIFO less often
- check no frames are lost.
- check tap/lift interrupts are working
- if latency is less than 100ms, check we are collecting much faster.
Change-Id: Ic2317c27fad0ef31dacd6e18cd5f71ccd2cec807
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274227
This adds a range of (proto v3) host commands to use for
experimental/one-off feature development without constantly
updating include/ec_commands.h
BUG=none
BRANCH=none
TEST=make buildall
This doesn't implement any new commands. It just adds some new constants.
Change-Id: I1d7b829dec9fa847e16f92d35c78446cc5f34cc5
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284408
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Move calibration in the EC to returns raw value with offset already
applied, as recommended by iio interface.
BRANCH=smaug
TEST=On Samus, with kernel change CL:283103
Check raw value are returned properly.
BUG=chromium:506101
Change-Id: I3dcb4f2fcfff35639e3bfdcc6c1468bdb5e53c45
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283161
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This adds a module that attaches to the SPS driver to process
host commands delivered over the SPI slave interface.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
This feature is not yet enabled, so there's nothing new to test.
That will come next.
Change-Id: If57a6fce698a7eb050e2a68b7f4d18d8b0e2956f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284010
Reviewed-by: Randall Spangler <rspangler@chromium.org>
1. Added new config option CONFIG_USB_PD_TRY_SRC
2. Added pd_try_source_enable global flag with console command
3. Added bit to pd.flags to indicate Try.SRC states are active
BUG=chrome-os-partner:39724
TEST=Manual samus to samus with the Try.SRC enabled on both and just
one samus. Tested Samus to Honeybuns and Samus to Zinger connections.
BRANCH=TOT
Change-Id: Ifa5d5d82e443f376e546aaf852ff24d92ef04d72
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/282052
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
1. Add flash control module for emulation board.
2. Fix system jump for Andes core.
3. Change the physical size of the flash on the chip to 256KB.
note:
1. Only IT839x series supports flash write protect by registers.
2. Static DMA method of flash code only for IT839x series and IT838x Dx.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. console command flashwp and flashinfo
1-a. flashwp enable
1-b. WP asserted and reboot
1-c. flashinfo RO protected now
1-d. WP deasserted and reboot
1-e. No protected
1-f. flashwp disable
1-g. WP asserted and reboot
1-h. No protected
2. console sysjump and sysinfo
2-a. sysjump rw
2-b. jumping to image RW
2-c. sysinfo, Copy : RW, Jumped : yes
2-d. sysjump ro
2-e. jumping to image RO
2-f. sysinfo, Copy : RO, Jumped : yes
3. RO/RW firmware image test
3-a. sysjump rw
3-b. use console command "eflash" to erase RO region,
erase OK and system still work.
3-c. reflash firmware
3-d. sysjump rw, sysjump ro
3-e. use console command "eflash" to erase RW region,
erase OK and system still work.
Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8
Reviewed-on: https://chromium-review.googlesource.com/271390
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
The SPS (SPI Slave) driver handles incoming traffic from the SPI
master. This abstracts the basic hardware functions into a clean
API so that the response to the SPI bytes can be put into
separate files.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
If CONFIG_SPI is not defined, incoming SPI traffic is completely ignored.
Even when it's enabled, nothing is reacting to the traffic so
incoming SPI bytes return 0xFF bytes to the master (SPI traffic
is always bidirectional).
Change-Id: I9bbcebc9c5223b942362200fe43a11ac57dfff40
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283581
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
This provides a way to experiment with or support random
functionality not specifically related to the normal EC
operation. With this, we can use a standard host command to pass
opaque data blobs between the AP and EC without specifying a
particular meaning to them.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
Nothing in the normal EC usage sends these messages. I have a
test/example program coming soon.
Change-Id: I77fe434cbd9151e4c2c22bc36d1ed6063d3bf940
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283070
Reviewed-by: Randall Spangler <rspangler@chromium.org>
"RO" is a workaround for GP base instructions.
And now we have added "-mno-gp-direct" option in the NDS32 toolchain.
So the compiler would not generate GP base instructions directly,
and we can remove this "RO".
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=chrome-os-partner:24378
TEST=console "version" and "gpioget"
Change-Id: I23cb6374fb8eb57081d713bf5c70b80a87dd2fb5
Signed-off-by: Dino Li <dino.li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/281862
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
DP Alternate mode specification defines two bytes in the DP
capabilities payload with respect to pin configs. One that governs
the DFP and the other the UFP. The one that the DP source needs to
examine depends upon whether the UFP is a receptacle or a plug.
Previously we just examined the DFP pin config which was correct for
all UFP plugs but not UFP receptacles. This change fixes that by
examining bit <6> of capability message to determe plug vs receptacle
and in case of receptacle choosing the UFP ping config instead.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chromium:505652
TEST=manual, hoho & apple (UFP_D plugs) still work.
While I don't have a test for UFP_D receptacle partner device reports
following for its DP caps which should now decode correctly.
<31:24> 00 Reserved/SBZ
<23:16> 1C UFP pin config == C, D, E
<15:08> 00 DFP pin config zero
<07:00> C5 <6> == 1 == receptacle
Change-Id: Ib9e3a808828ff6b8c062baf0fc3c23b3da33c2c3
Reviewed-on: https://chromium-review.googlesource.com/282621
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
If flash is being written, any pending hash calculation is likely to
be invalid.
BRANCH=None
BUG=chrome-os-partner:38103
TEST=on Cyan, run hundreds of flashrom cycles to make sure there are no
read, erase or write errors
Change-Id: I915f8db7998c56fc12e7d85173232882fb7ed80d
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282211
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Take profit of the hardware input current ramping/back-off integrated
in the BQ2589x charger by setting the current limits higher for BC1.2
USB modes and letting the hardware adjust to the actual charger
limitation depending on the VBUS voltage droop.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42045
TEST=Connect a Nexus 9 DCP charger to Smaug and see the input current
adjusted to 1650mA without brown-out, read back the value properly from
the AP:
$ ectool usbpdpower
Port 0: SNK Charger DCP 4958mV / 1650mA, max 5000mV / 1650mA / 8250mW
Change-Id: I348e5ee4980a5652f72f279ab4e3a7126583b093
Reviewed-on: https://chromium-review.googlesource.com/282584
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
add GPIO_SEL_1P8V flag for 1.8v/3.3v selection.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. To configure 1.8V/3.3V pin to 1.8V,
set GPIO_SEL_1P8V flag in gpio.inc.
2. The corresponding bit will be set as default value if the pin
is not listed in gpio.inc.
Change-Id: Ica02aabe40b83fcb4d33bd28d717a0633bdef5f3
Reviewed-on: https://chromium-review.googlesource.com/281842
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Initial support for Parade PS8740 Type-C redriving switch.
BUG=chrome-os-partner:41696
TEST=Manual on Glados in subsequent commit. Verify set() and get()
functions set and return consistent values. Verify that USB SS device
functions when muxes are set to dock or USB.
BRANCH=None
Change-Id: Iedbe53cc76f30ecd969c2ca99a7377ed3b193729
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/282280
Reviewed-by: Alec Berg <alecaberg@chromium.org>
In preparation for adding support for additional USB-C mux chips, add a
new high-level USB-C mux interface usb_mux.c. usb_mux functions are now
called from pd code instead of board-level functions. usb_mux calls down
into a mux chip-specific driver (currently pi3usb30532) or
board-specific drivers which toggle GPIOs (for legacy boards).
BUG=chrome-os-partner:41696
TEST=Manual on Glados in subsequent commit. Verify set() and get()
functions set and return consistent values. Verify that USB SS device
functions when muxes are set to dock or USB. Also, verify that DP
dongle and USB SS device are functional on both PD ports on samus_pd.
BRANCH=None
Change-Id: Ib6477f489310f3be1430585ea09fea26f57e3752
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/281435
Reviewed-by: Alec Berg <alecaberg@chromium.org>
