Increase watchdog timeout to 1.8 second. The pd_task can delay up
to 1.5 seconds, so the watchdog must be at least that value.
On Zinger, the new timeout period will be 2 seconds with LSI clock at 50kHz
and 3.36 seconds with LSI clock at 30kHz.
Note: the LSI frequency range is tighter on STM32F0 and cannot go up to
56kHz.
BUG=none
BRANCH=none
TEST=add 1.5 second blocking delay to pd_task and make sure
watchdog is normally not firing.
Change-Id: I444639ccacd3452181a5fb6caab8e5df7ef3c847
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204333
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
We never implemented this. We have no devices which support it. And
we used bit #17 in a 16-bit field to flag it, so it wouldn't have
worked even if we did. So, remove this (dead) code.
BUG=chromium:382944
BRANCH=none
TEST=make -j buildall
Change-Id: Id3a4a93612d1078a3239d85921a05cfd7362b84c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204162
Reviewed-by: Doug Anderson <dianders@chromium.org>
Currently the master and the slave must synchronize before starting
slave response. This is to make sure the previous slave response is done
and the slave is ready for the next response. By enabling interrupt on
the master side to capture slave ready event, we can get rid of the
extra sync's. This saves about 1300 us per frame.
BUG=None
TEST=Build and boot. Measure time. Examine heat map.
BRANCH=None
Change-Id: I3c319d8a3636f1f6ae905d7021433c3ba220c9b0
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203789
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If at-shutdown is specified, the battery is cut off
1 seconds after the host has shutdown.
BUG=chrome-os-partner:29292,chrome-os-partner:28887
BRANCH=tot,nyan
TEST=Run batterycutoff ectool command and cutoff console
command with and without 'at-shutdown' option. Verify
the battery is cut off immediately without the option
specified and 1 seconds after shutdown with. View the
console log to see the deferred cutoff occur.
The following tests are verified on big.
console:
cutoff, AC on: system is off after removing AC.
cutoff, AC off: system is off immediately.
at-shutdown, AC on: system is off after "power off" and removing AC.
at-shutdown, AC off: system is off after "power off".
ectool:
batterycutoff, AC on: system is off after removing AC.
batterycutoff, AC off: system is off immediately.
at-shutdown, AC on: battery is cut off after 1s of shutdown.
system is off right after removing AC power.
at-shutdown, AC off: system is off after 1s of shutdown.
[84.058416 power state 3 = S0, in 0x0000]
[84.058803 power lost input; wanted 0x0001, got 0x0000]
[84.059120 power off 3]
[84.072148 Cutting off battery in 1 second(s)]
[84.123896 power shutdown complete]
[84.128790 power state 7 = S0->S3, in 0x0002]
[84.139694 power state 2 = S3, in 0x0002]
[84.150857 power state 8 = S3->S5, in 0x0002]
[84.166975 power state 1 = S5, in 0x0002]
[84.177972 power state 1 = S5, in 0x0002]
[85.080012 Battery cut off succeeded.]
Change-Id: Id4bacf79ad3add885260655f80cb8127bafe1ad6
Signed-off-by: Dave Parker <dparker@google.com>
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203694
Reviewed-by: Vic Yang <victoryang@chromium.org>
- Wait for SLP_SUS to deassert before bringing up PP1050 to avoid
leakage when PP1050 is enabled before the PCH is ready.
- CPU PGOOD is now connected to RSMRST_L on PCH. Configure this
GPIO as an output and hook it into the power sequencing.
- Add a "chipset_force_g3()" function to use for aborting G3->S5
transitions when there is an issue with a rail not coming up.
BUG=chrome-os-partner:29502
BRANCH=samus
TEST=build for samus, tested on reworked p1.9 board
Change-Id: Ib0251943864594ee89a4a9f2c71c45da2c01f44e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203081
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Detect when VBUS is disconnected when acting as a sink and go to
the disconnected state.
BUG=none
BRANCH=none
TEST=Connect a zinger to fruitpie, run pd state from console to
verify it is in SNK_READY, then remove zinger and verify the state
changes to SNK_DISCONNECTED.
Change-Id: I0b46cfe3ac129f1ec9c11327c9e0d45c0c6761e8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203564
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The timer on Keyborg is only of 32-bit width, so we should always use
get_time().le.lo instead of get_time().val to avoid unneeded 64-bit
integer operations. This saves about 0.66 us per call to
master_slave_sync(), which is called about 500 times per frame.
BUG=None
TEST=Measure the time used on master_slave_sync().
TEST=Boot and check touch scanning still works.
BRANCH=None
Change-Id: I6668cda3c6c00d1af971fc55fcc8d643b83a4578
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203670
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In order to make SPI CRC work, we had to ensure the master and the slave
agree on the size of slave response. This required us to first send the
response size and then send the full response. The downside of this is
that we cannot take full advantage of DMA.
Given the SPI bus is fast enough, let's add an option to always transfer
max size packet on slave response. This incurs some overhead as unused
bytes are also sent, but the overhead doesn't affect us when the slave
is busy with touch scanning. (The scanning time is longer than
transferring 64 bytes over SPI.) This situation may change in the
future, so make it a compile time option for now.
Also removed the use of RX channel on the slave side when the slave is
sending response. The RX channel is useless in this case.
BUG=None
TEST=Build and measure scan rate w/ and w/o
CONFIG_KEYBORG_SPI_FULL_PACKET flag.
BRANCH=None
Change-Id: I4b23b1d89903dd022b445eb81667679276858008
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203660
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Added extra arg to typec console command to give the port number (0 or 1)
in order to set the muxes appropriately for both ports.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I7abddb9f27c22082aed0fbf09a301ca2d5e7c5fc
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203653
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Samus PD MCU board file changes for version 2 and 2B of the
samus board.
Adds more I/O for case closed debugging, adds sensing of
VBUS voltage (boostin), and moves USB C0 BC12 interrupt pin.
BUG=none
BRANCH=none
TEST=none
Change-Id: I545ff518add19919d1747de91318c33363d99403
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203314
This slightly reduces binary size and increases scan rate when running
without fast scan.
BUG=None
TEST=Build and boot w/ and w/o fast scan.
BRANCH=None
Change-Id: I66683dce9c8f5e74f86764d8a4f33f4e1a161e08
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203633
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In case the slave got into a bad state, we may need a way to reboot the
slave from the master. The protocol must not involve SPI communication;
otherwise this will fail if the slave SPI module is in a bad state.
This CL implements this using SPI_NSS. In normal SPI communication, the
master pulls SPI_NSS low and immediately sync with the slave. To reboot
the slave, the master pulls SPI_NSS low without the following sync.
BUG=None
TEST=Reboots the slave from the master.
BRANCH=None
Change-Id: I947523e1d86fb2332b87fbfa3dab73cba958fb72
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203485
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
It's often hard to find out which sync call failed when one happens.
Let's add debug info.
BUG=None
TEST=Add a sync call on master side only, and see the file name and line
number.
BRANCH=None
Change-Id: I68d0fa12d5d84293870e845fbb5f83aa3a8125fa
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203339
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Previously an error in master-slave communication often leaves the chips
in bad states and thus prevents further operation. Improve this by:
- Making master_slave_sync() state-less.
- Restoring SPI_NSS and disabling DMA on error.
BUG=None
TEST=Inject errors on master side and slave side. Check the subsequent
operations succeed.
BRANCH=None
Change-Id: Ief8b5b0df3d4be6319957bb1f9daf93e0e9b5d92
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203337
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Update according to the current PD standard, a monotonic transition
seems mandatory in all cases, so keep the voltage output enabled
when increasing the output voltage.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=connect Zinger to Fruitpie and probe the VBUS voltage during a
transition.
Change-Id: I3c728cc0049ca41536efd4f075139626b7d371da
Reviewed-on: https://chromium-review.googlesource.com/202657
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
If board.h or config_chip.h is included before config.h, CONFIG_* flags
may be incorrect. For example, if config.h says:
...
#define CONFIG_DEFINED_FLAG
...
#include "board.h"
...
And board.h says:
#ifndef __BOARD_H
#define __BOARD_H
...
#undef CONFIG_DEFINED_FLAG
...
#endif
Then this code:
#include "board.h"
#include "config.h"
would results in CONFIG_DEFINED_FLAG being defined, instead of undefined
as stated in board.h.
Avoid this by emitting error when board.h or config_chip.h is included
before config.h.
BUG=None
TEST=make buildall
BRANCH=None
Change-Id: Ic4a8b68e8ab1ef2a4cf9e926ab9008d2b106b943
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203265
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Created a new smaller task size, 384, for tasks that don't need much
stack space including PDCMD and ALS tasks.
BUG=none
BRANCH=none
TEST=loaded on samus, ran taskinfo, made sure we were comfortbaly
under the smaller task size for those tasks that changed.
Change-Id: Icfa26eeaeed26171ec8b2d888e1190be32f688d1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202719
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The fast scan buffer is of type 32-bit integer, so the byte size is 4
times of its size.
BUG=None
TEST=Check buffer is fully cleared after each frame
BRANCH=None
Change-Id: I0980e418a4b323195fec56f4970aca3918a6ee11
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203205
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Increase the delay after receiving a good CRC in send_validate_message()
to avoid catching the last edge as the start of a new packet.
BUG=none
BRANCH=none
TEST=Tested with zinger and samus using the python script to flash
zinger RW, and simply negotiating power and receiving pings.
Change-Id: Iffdd73e02e5d292396d46a611d728f66402f2da4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203206
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Fix check for whether or not we are running in RO. The previous
code read the contents of the RW reset vector, but RW code
may be corrupted causing us to think we are in RW when we are not.
BUG=none
BRANCH=none
TEST=mostly just code inspection. verified this code running
in RW correctly identifies we are in RW.
Change-Id: I2c27af45a59b29f55fd24295f91d5c5f0e491dd4
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203192
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Without common runtime, we need to use IRQ_HANDLER to define IRQ
handlers. Previously IRQ_HANDLER is only implemented in irq_handler.h
which is not included by task.h when building without common runtime.
This causes problem when we want to use code that includes task.h and
uses IRQ. By adding IRQ_HANDLER to task.h, we don't need to include
irq_handler.h in any case, and thus avoid that problem.
BUG=None
TEST=make buildall
TEST=include task.h instead of irq_handler.h. Check Keyborg still
builds.
BRANCH=None
Change-Id: I1213506132025fc656630565f58686b9e7de940c
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/203084
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Use a EC to PD host command to notify the PD MCU when a battery
is present and charged enough that it is ok to negotiate for a
higher power. The PD MCU will not negotiate until the host command
is received, which allows the system to be powered without a
battery or with a dead battery with 5V.
BUG=chrome-os-partner:28611
BRANCH=none
TEST=Tested on a samus:
1) Tested the normal case of battery charged and plugged in. When
charger is plugged in, the device immediately starts negotiating
for 20V and starts charging.
2) Tested with no battery. Plug in a charger, samus boots and stays
alive. VBUS measured at 5V. When a battery is plugged in, device
negotiates for 20V and starts charging.
3) Tested dead battery by taking a battery with no charge, and
plugging in zinger. Everything boots, but PD does not negotiate
for power. Then when battery reaches 1%, PD negotiates and zinger
switches to 20V without causing a reboot.
Change-Id: Iaa451403674e86cddbd3fe80e9503584910be576
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/201958
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds a new lightbar sequence (TAP), which temporarily displays the
battery level. It pulses if the system is charging.
BUG=chrome-os-partner:29041
BRANCH=ToT
TEST=manual
From the EC console, run
lightbar seq tap
The lightbar should change temporarily.
Then run
lightbar demo on
and press the Up, Down, Left, and Right keys to fake the battery charge
level (up & down) and the AC present state (left & right). Run the
lightbar seq tap
command periodically to watch it change.
Change-Id: I84ff928d93060f7ef7d46d608732d37cf5185aff
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202964
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Keep accelerometer power enabled all the time. It consumes
very little power, we will need it to be on all the time for
tap for battery, and when it is off, it can cause problems
because the PP3300_EC rail leaks through the i2c pull-ups into
the accelerometer.
With this change, we should never see the bug in which i2c
bus 1 is getting a lot of errors on boot.
BUG=chrome-os-partner:29003
BRANCH=none
TEST=tested on multiple samus units. can talk to accel using
i2cxfer console command, and never saw any bus problems.
Change-Id: I2034e217fbb1157cc0f9b867ef50e7932d75c761
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202988
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
fixed pd tx so that it really outputs low when not transmitting.
BUG=none
BRANCH=none
TEST=tested on samus by making sure we can still talk PD
to charger and charge.
Change-Id: If04eb3d0e6620985906c49df0429a92832cffd8d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202668
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
On samus battery, when the battery is dead it reports 0 for desired
voltage, current, and state of charge. In this case we should allow
charging.
Added a CONFIG option for this that should be removed as soon as
the battery side is fixed.
With this CL, when a dead samus battery is used and a charger is
connected, we attempt to charge it.
BUG=chrome-os-partner:29465
BRANCH=none
TEST=test on a samus with a dead battery. w/o this CL, the battery
never charges because the charging not allowed flag is set. With this
CL, the battery charges.
Change-Id: Ic61f27a27237166d33cb9ea5f024d3ef6360ce82
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202603
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The custom battery present signal which relies upon a battery
temp ADC is not working on many of the samus batteries. For
now, we'll use the default battery present status signal which
depends on successful i2c communication.
BUG=none
BRANCH=none
TEST=Test on samus with battery with broken temp sensor. Run
chgstate and make sure is_present = yes and battery does charge.
Change-Id: Idc28a922359106f3b2880236e6df64a4a2ede8e6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202777
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When we are a USB host (and a power source), provide 5V VBUS on the
type-C receptacle.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=with 2 Fruitpies, put one in source mode ("pd charger" command) and
plug a type-C cable between them.
Change-Id: Ifbdbf9db659b2fd03d11197faf2c7e14cb971e75
Reviewed-on: https://chromium-review.googlesource.com/202446
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When we are a USB host (and a power source), provide 5V VBUS on the
type-C receptacle.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28782
TEST=on Samus, put port0 in host mode (by doing "pd charger" on the PD
MCU command line), then insert a type-C to type-A cable and observe we
have VBUS on the other side.
Change-Id: I5c6cd78b54dc1c651420eaaf122b8545b9f0b0de
Reviewed-on: https://chromium-review.googlesource.com/201066
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
For boards reworked with FETs on the TX path, TX_DATA (PB14) needs to be
driven low when we are not transmitting.
Set MISO as GPIO low by default and set the alternate SPI function in
the TX enable code.
This should be backward compatible with non-reworked Fruitpies.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=plug 2 fruitpies with a type-C cable and do a PD power
negotiation.
Change-Id: I9ef9c84147e9468667eed9c96647c6a9a7f79fdd
Reviewed-on: https://chromium-review.googlesource.com/202512
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Daming Chen <ddchen@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Until we have the full dual port support, hardcoded the 2nd type-C
receptacle (port C1) as a power provider with USB2.0 and DisplayPort
source.
Should be reverted to default as a power sink for the dead battery case
when the dual port logic is in place.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28341
TEST=Plug a USB key on port 1 through a type-C to type-A cable.
Change-Id: I85d0c48412087d6afcdeb214a485a2bab9d8bcd4
Reviewed-on: https://chromium-review.googlesource.com/201064
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
When this option is configured, two changes take place.
First, the AP doesn't power on by default when the EC reboots. To boot it,
you can run the "powerbtn" command, or poke the power button manually, or
any of the normal things.
Second, we watch for power-related signal changes (anything that's connected
to the power_signal_interrupt() function) and keep track of them as they
happen. After a second with no further changes, we print the time and value
of each change. For example:
[19.939212 Port 80: 0x29]
[19.967971 HC 0x23]
[19.976236 Port 80: 0x3a]
[19.995700 HC 0x87]
[20.567884 Port 80: 0x73]
11 signal changes:
19.638241 +0.000000 PCH_SLP_SUS_L => 1
19.654378 +0.016137 PCH_SLP_S5_L => 1
19.654457 +0.000079 PCH_SLP_A_L => 1
19.654535 +0.000078 PCH_SLP_S3_L => 1
19.654587 +0.000052 PCH_SLP_S4_L => 1
19.659630 +0.005043 PGOOD_1_5V_DDR => 1
19.663199 +0.003569 PGOOD_1_5V_PCH => 1
19.664751 +0.001552 PGOOD_1_8VS => 1
19.668735 +0.003984 PGOOD_VCCP => 1
19.671883 +0.003148 PGOOD_VCCSA => 1
19.868406 +0.196523 PGOOD_CPU_CORE => 1
[21.908551 Port 80: 0xf0]
[21.908855 HC 0x48]
BUG=none
BRANCH=ToT
TEST=manual
Build with CONFIG_BRINGUP, notice those two changes.
Change-Id: I55fd2021a0eae7dbfd1aaf5d93971f65bf2367b9
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202574
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
When not using gold as the linker the ordering of libraries
with respect to objects and source files is important.
Previously the build placed -l libraries before source and
objects on the gcc command line. This doesn't work with
the default ld linker because since none of the symbols in
the libraries are yet required they are thrown out before
their uses are found in the objects and source.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ic9f83ba6138d6592d3b6e28de6fb0688e664f480
Reviewed-on: https://chromium-review.googlesource.com/202469
Tested-by: Anton Staaf <robotboy@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Moved sampling of ALS to its own task. The problem is that it
spin waits on the i2c bus mutex, and it's a bad idea to spin wait
for very long in the hooks task because the hooks task tickles
the watchdog.
BUG=chrome-os-partner:29003
BRANCH=none
TEST=tested on samus: make sure ALS task is running and no
watchdog timeouts when the i2c bus is wedged indefinitely.
Change-Id: Ifcebabdfc151ea85cecdfe7a8ed489e8a82ee5ba
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202545
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The i2c timeout on lm4 is currently 1 second, which is very long.
This changes it to 100ms. Note, the biggest transfer we might
every do is probably ~256 bytes to do a flash program using a host
command over i2c. And the slowest bus speed is ~100kHz. So, worst
case, the transaction shouldn't be more than about 25ms.
Decreasing the timeout is useful when peripherals are not plugged
in. For example, the ALS is sampled in the hooks task every second.
We don't want the ALS sampling to be delayed for a second because
it will throw off all of our other hooks.
BUG=chrome-os-partner:29003
BRANCH=none
TEST=ran on a samus and tested i2c commands to various peripherals
Change-Id: I5e1b6d0f8b100cbcb6cd9209c6198e31d99bb085
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202515
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Change pd spi tx pin to output low when not transmitting.
BUG=none
BRANCH=none
TEST=tested on samus by making sure we can still talk PD
to charger and charge.
Change-Id: I33665d01860c765cc0ff2e7813b04cac0ab9c8fe
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202511
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For non-PD aware sink, ensure that we detect their disconnection when
the CC goes back above Vnc.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28782
TEST=on Samus, put the port in source mode (using the "pd charger"
console command), then plug and unplug the type-C to type-A cable and see the
PD state going from Disconnected to Discovery and the other way round
(using "pd state" console command).
Change-Id: Ic9e19fee78f0c5e1fc742e2443eaf4b804ee5ee9
Reviewed-on: https://chromium-review.googlesource.com/202445
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Support bist carrier mode 2 - continuously transmit alternating
1's and 0's, and check for bit errors on receive side. note
that once the test is started the only way to stop is to hard
reboot the devices involved.
BUG=none
BRANCH=none
TEST=connect two fruitpies together. set one to be source:
> pd charger
and then start the bist
> pd bist
start receiving data:
aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa
aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa - incorrect bits: 0 / 0
55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55
55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 - incorrect bits: 0 / 0
Change-Id: Id920f6b7177a418a80e1ce325042243cd633cec6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202187
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
In the current version of USB-PD standard, the packet header should have bit 15
set to 1 to tell the other side that we are supporting Biphase Mark Coding
(aka BMC).
For now, just set it, do not check it as most of our devices are setting it
yet.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: Ia6f89f592632520b46478a7d7975e9e8d3a28b59
Reviewed-on: https://chromium-review.googlesource.com/202391
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
