Add a build option CONFIG_BATTERY_CRITICAL_SHUTDOWN_CUT_OFF to perform a
battery cut-off when we reach the battery critical low level.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=none
TEST=Discharge a Ryu device down to the critical level, see the message
and verify we cannot restart with the power button. Also check that
plugging the charger revives the device and starts charging.
Change-Id: Ic132a658de5c5131a6a1dd1ce343196b68d480f6
Reviewed-on: https://chromium-review.googlesource.com/303549
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 80b3c99319771312d5733b126b6b3eb839addde9)
Reviewed-on: https://chromium-review.googlesource.com/303812
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Added code to enable the system power monitoring functionality to get the
details of the system power consumption.
And also added EC console command "psys" to get the system power consumption.
BUG=none
TEST=Manually tested on Kunimitsu.
Power = Voltage * Current, reading is equal to the power readings
from the psys command.
BRANCH=none
Change-Id: I62519ac96800363b67cab23cd9eb0dcac229cb47
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/302472
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Some sensors are in forced mode, motion sense must be scheduled at
their ODR. However the host may not want the data right away,
so motion task may not wake up the host that often.
Add a new variable motion_int_interval that defines the maximum interval
between FIFO host event.
BRANCH=smaug
BUG=chrome-os-partner:43800
TEST=Check that light sensor is polled at ODR frequency.
Check that when AP does not want any event, no FIFO host event are
requested.
Check CTS tests work as before.
Reenable motion_lid unit test.
Change-Id: Ie25e6cbe28fed899073856057855ffa03c0cd9fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301134
Reviewed-by: Alec Berg <alecaberg@chromium.org>
RAM need not be preserved between jumps from the loader to RO/RW images,
so there is no need for a separate region of loader RAM. Remove
redundant CONFIGs which define this unneeded region.
BUG=None
TEST=Verify glados boots and sysjumps successfully.
BRANCH=None
Change-Id: I2567f17a973c6f9f00bcfd97a4581d6c4b6fd6f0
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302586
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
gpio_config_module() and gpio_config_pins() had very similar code. This
commit moves the functionality of gpio_config_module into
gpio_config_pins. That is, gpio_config_pins() can now configure an
entire module. This is accomplished by passing in GPIO_CONFIG_ALL_PORTS
as the port parameter.
BUG=chromium:533539
BRANCH=None
TEST=Build and flash on samus. Verify that lightbar, charging, power
button, sensors, all functional.
TEST=make -j buildall tests
Change-Id: I7c9122ebf7b0e2716af2d55b842c4806d8099a63
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/302479
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Currently, the only way to prevent a system from hibernating is via the
EC console command "hibdelay". This commit adds the host command
equivalent so that it can be set elsewhere. The host command takes the
amount of time in seconds to delay hibernation by and responds with the
current time in the G3 power state, the time remaining before
hibernation should be invoked, and the current setting of the
hibernation delay.
BUG=chrome-os-partner:45608
BUG=chrome-os-partner:44831
BRANCH=None
TEST=Build and flash on samus. Issue the host command from EC
console. Verify that the hibernation delay was updated by checking with
the hibdelay command.
Change-Id: I34725516507995c3c0337d5d64736d21a472866c
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/302197
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
For signed EC RW images (CONFIG_RWSIG), there's no point in
embedding the public key or signature into the image itself since
it will just be replaced by the signer (either as the next step
in the build process, or after the fact for MP releases). This
takes that out and just points to where the pubkey and signature
will be placed.
BUG=none
BRANCH=none
TEST=make buildall
I also checked the signatures with
futility show -t build/*/ec.bin
They still look good, and the one signed image I booted (Cr50)
works as before.
Change-Id: Ib39b7c508914851f81a1bebb2450e08ef0def76c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302630
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Since CONFIG_RO_SIZE and CONFIG_RW_SIZE now exist (which may
theoretically be different sizes), it is no longer useful to globally
define the size of an image.
BUG=chromium:535027
BRANCH=None
TEST=`make buildall -j`. Also, verify glados / glados_pd continue to
function as expected.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie29959923bc5d02b4d7d6d507ff2191bcb7d24c8
Reviewed-on: https://chromium-review.googlesource.com/301743
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Similar to i2c_xfer: allow access to a SPI device registers.
We assume the protocol use is set MSB bit to the offset for read
operation.
id is the index of the device in spi_devices.
BRANCH=smaug
TEST=Read/Write SPI registers.
BUG=none
Change-Id: Id4aaffbb6f514fd47086aee240b556ea23298d33
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289857
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
include/config_std_internal_flash.h is an optional header that
can be used to implement the most common EC flash layout.
However, CONFIG_INTERNAL_STORAGE, CONFIG_MAPPED_STORAGE, and
CONFIG_MAPPED_STORAGE_BASE are fixed by the SoC, so they belong
in config_chip.h, not in the optional header.
BRANCH=none
BUG=chrome-os-partner:23796
TEST=make buildall
Refactoring only, no behavioral differences.
Change-Id: I114c3e194837041920e6f228a2bed6747be8231c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301330
Reviewed-by: Shawn N <shawnn@chromium.org>
Allow the host to enable/disable double tap.
Send event when double tap is present.
Also fix a bug when scanning for gestures.
BRANCH=smaug
BUG=chrome-os-partner:44754
TEST=compile. Check on Ryu.
Change-Id: I50d008cd3823072ab1c1e2d21f1276cd2185d797
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298683
Returns the most significant bit set.
Replace 31 - __builtin_clz(x), so x must be different from 0.
Use get_next_bit when not on the performance path,
on performance path set the bit field just after reading it.
BRANCH=smaug
BUG=none
TEST=compile, check Ryu still works.
Change-Id: Ie1a4cda4188f45b4bf92d0549d5c8fb401a30e5d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301300
When IRQ handler is not processing any event raised,
return NOT_HANDLED.
Without this change, any event would set the light sensor
process timestamp and, if the light sensor frequency was lower
than BM160 fifo interrupt frequency, we would never read from
the light sensor.
BRANCH=smaug
BUG=chrome-os-partner:43800
TEST=Compile. Check that light sensor data get updated.
Change-Id: I302f80c5cd9b4f3c926362fdafdc8b5074cabb60
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298686
If other i2c traffic happens around the time the light bar is
initialized, the i2c bus is wedged.
Instead of waiting 500ms in the motion task loop for the tap sequence to
complete, set under i2c lock the lp power and init sequence.
BRANCH=smaug, samus
BUG=chrome-os-partner:45223
TEST=With msleep(500) removed and With lb_power + lb_init + 100ms, I don't see the wedge at TAP
sequence.
Change-Id: I931eb25bcc5e3237b6c569f2330f72f9fc415964
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299543
Reviewed-by: Bill Richardson <wfrichar@google.com>
Add more flags to EC_CMD_USB_PD_CONTROL including whether
the port partner is PD capable, and if the port partner has
any of the following flags set in its capabilities: dual-role
power, dual-role data, USB comms capable, and externally
powered.
BUG=none
BRANCH=smaug
TEST=tested on samus using 'ectool --dev=1 usbpd 0'. Tested
with zinger, guppy, another samus, and other third party
devices to verify the flags are set as advertised in src/snk
capabilities packet
Change-Id: I4d78d1880073fdacce57516111ac6cab37b93f27
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300953
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add an interface with the host to set up gesture recognition.
Today, only significant motion is supported.
Add a virtual sensor for concentrating gesture support from host.
BRANCH=smaug
BUG=b:23570481
TEST=On ryu, enable significant motion from host.
Change-Id: I906fa2d2d7b4ca2771ea2f58b91de8d97bf4e2e3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296213
Add a flag in the FIFO event to tell that the sensor
want to wake up the AP.
Use this flag in the EC and let it reach the AP
for debugging.
Move fifo_flush as well, use only when FIFO present.
BRANCH=smaug
TEST=compile.
BUG=b:23570481
Change-Id: I5ff567b0f9f1e37a3dae16bfa7859c341f1a9b17
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296212
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Change the IRQ interface to allow adding events.
Move code to send the lightbar sequence from gesture.c to motion task.
TEST=compile, works on Ryu.
BRANCH=smaug
BUG=chrome-os-partner:44754
Change-Id: I981ea123ebef0e8e3d6aa320eade89f10e83b6fc
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296822
Reviewed-by: Alec Berg <alecaberg@chromium.org>
1. Host access to the PNPCFG registers is disabled.
2. UART2 for host if necessary.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. host can't access the PNPCFG registers.
2. out I/O port 0x2f8 '0x30, 0x31, 0x32, 0x33, and 0x34'
will have console message '01234'.
Change-Id: If07bdc129105f5248661d929e6858d4063c452ee
Reviewed-on: https://chromium-review.googlesource.com/300266
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add config option to use the old accelerometer reference frame,
which is used on samus and products using 3.14 or earlier kernel.
This fixes samus so that the lid angle calculation is correct
again.
This also moves the accel_orientation structure out of the board
directory and into common code, since it purely is a function of
the reference frame being used.
BUG=chrome-os-partner:43494
BRANCH=none
TEST=test on samus, verify lid angle calculation is correct once
again. also, enable the motion_lid test and verify that it passes.
Change-Id: I948a74a71964b54c68be66e828a030ddd0418947
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300510
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Instead of mocking i2c_read8/16/32, mock i2c_xfer.
We can now test code that call i2c_xfer directly and
test common/i2c.c
BRANCH=samus, ryu
BUG=chrome-os-partner:45223
TEST=Unit tests pass.
Change-Id: Iaa772515c40cf55d2050d0019e2062d63278adc0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299768
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Since there is no more concept of a flash region belonging only to the
EC, we only need one FLASH_SIZE config, which represents the actual
physical size of flash.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6
Reviewed-on: https://chromium-review.googlesource.com/297824
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In order to support architectures with non-contiguous writable and
protected regions, change storage offsets to be relative to writable and
protected regions, rather than relative to "the start of the region of
storage belonging to the EC".
Spec doc available at https://goo.gl/fnzTvr.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I796f8e7305a6336495bd256a78774595cb16a2e4
Reviewed-on: https://chromium-review.googlesource.com/297823
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
CDRAM / CODERAM configs were previously used for chips which copied code
from external SPI to program memory prior to execution, and were used
inconsistently between npcx and mec1322.
These CONFIGs are now completely redundant given new configs like
CONFIG_MAPPED_STORAGE_BASE and CONFIG_EXTERNAL_STORAGE.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0e054ab4c939f9dcf54abee8e5ebd9b2e42fe9c4
Reviewed-on: https://chromium-review.googlesource.com/297804
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit adds a new basic driver for the Kionix KX022 Accelerometer.
Currently, the driver is capable of reading the sensor data and
manipulating its ODR, resolution, and range.
This sensor also has integrated support for Directional
Tap/Double-Tap(TM), however that functionality is not yet implemented in
the driver.
Lastly, since this accelerometer is very similar to the previous KXCJ9,
this commit tries to combine the drivers.
Note, the variant of the Kionix accelerometer MUST be specified in the
private data structure.
BUG=chrome-os-partner:43494
BRANCH=None
TEST=Build GLaDOS EC with driver enabled and verify that valid
accelerometer data is read, and that range, resolution, and odr can all
be modified.
TEST=Build samus EC image and verify that the lid still
works. Additionally, verify that I can change the odr, rate, and
resolution.
TEST=make buildall tests
Change-Id: I238ff1dc13f5342a93f8f701a0da85c52f25d214
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/299013
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Add all swap commands to USB_PD_CONTROL host command: data,
power, and vconn swap.
BUG=none
BRANCH=smaug
TEST=tested on both samus and ryu while connected to each other.
Change-Id: I280a0da2d3c5a5436243134ab3f2ec353ebf6ab8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299290
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Gesture recognition can be done in software (by the EC) or in
hardware, by the sensor itself.
Add variable to compile gesture.c only in the software case.
BRANCH=smaug
TEST=compile.
BUG=b:23570481
Change-Id: I22bef0bf744516df267020d9458e0299a4da3d72
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296211
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add support for ADC / thermistor reads on the EC's ADC
This will support now only ncp15wb but we can expand it
at future time.
BUG=chrome-os-partner:44764
TEST=make buildall -j
Manual on celes with subsequent commit. Boot to S0, run "temps".
Verify that temperatures are. See temperature is changing
BRANCH=None
Change-Id: If26d24b803dcff00c4c24e4e1f71d3b0de8e6738
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/296872
Reviewed-by: Shawn N <shawnn@chromium.org>
Separate the bd99992gw ADC interface from the NCP15WB thermistor
adc-to-temp maths so that the thermistor can be used with various
other interfaces.
BUG=chrome-os-partner:44764
TEST=make buildall -j
Manual on Glados. Boot to S0, run "temps".
Verify that temperatures start around 28C and begin to increase after
system is powered-on for a long duration.
BRANCH=None
Change-Id: I3e72e9f390feebaac2440dbe722485f8d1cf8c56
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/296871
Reviewed-by: Shawn N <shawnn@chromium.org>
Enabled the trickle charging mode by setting the MinSystemVoltage
register[0x3EH] to board specific battery voltage minimum value.
When the battery voltage drops below the battery voltage minimum
value, trickle charging enabled.
BUG=none
TEST=Manually tested on Kunimitsu FAB4 prototype.
Drained the battery below voltage minimum value. Using the
i2cxfer command observed Trickle charging mode is active in
the information register[0x3AH].
BRANCH=none
Change-Id: Id6416f2b0b74fda8cf3eafb95e044586f90b8a8e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/298143
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Rong Chang <rongchang@chromium.org>
If the ALS is not enabled in S3/S5 states then it will generate
errors when trying to read so should be gated.
This could be done with a check for chipset_state or adding a
new CONFIG_ALS_POWER_GPIO to check. However the ALS is also not
needed when the host is in S3/S5 yet the task continues to run
in the background every 1 second.
This commit adds a new task enable/disable hook to disable the
task when the system is suspended and enable the task when it
is resumed.
In order to fit this new task in glados the als console command
is guarded by a new config option. Since this is not a very
frequently used/needed console command it is disabled by default.
And finally the kunimitsu and strago boards try to enable ALS
but they never actually enabled the ALS task so this new code was
failing to build because TASK_ID_ALS did not exist. Also samus
was enabling it but as TASK_NOTEST so tests will fail, though
they are disabled globally on samus.
BUG=chrome-os-partner:43493
BRANCH=none
TEST=enable ALS on glados and successfully build and use it,
also successfully build EC and tests for kunimitsu, strago,
and samus which are the other boards that use the ALS task.
Change-Id: I192940d7f306a1663c7cb789c313151bbb5f2b90
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298156
Reviewed-by: Shawn N <shawnn@chromium.org>
Add option to charge automatically from dual-role devices. This
also changes the charge override behavior such that any new
device attached will clear the override because any new source
is a potential device we might charge from.
BUG=chrome-os-partner:44958
BRANCH=smaug
TEST=tested charge_manager unittests with
CONFIG_CHARGE_MANAGER_DRP_CHARGING both defined and undefined
Change-Id: Iac77ff0c501826d5fb5a9d50f88399ebc3955b87
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297789
Reviewed-by: Shawn N <shawnn@chromium.org>
When a debug accessory is connected to the type-C port while the write
protection is enabled, put the case closed debugging in "partial" mode
rather than "full".
Update the "partial" mode to provide read-only access to the AP and EC
consoles.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:44700
TEST=check the EC console input/output over USB is still working with SuzyQ
on a write-protected system, verify that the console input is disabled.
Change-Id: I5baa03d6e738d06437c45469f46b286e76a755a4
Reviewed-on: https://chromium-review.googlesource.com/297141
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When all BMI160 sensors are suspended, FIFO is invalid.
Put the test to check if all sensors are disable within the processing
loop: otherwise, the FIFO can become invalid while we are processing it.
Add printf to be sure we are not processing invalid FIFO.
Add a macro around ODR to really check the ODR rate, excluding the
roundup flag.
BRANCH=smaug
BUG=chrome-os-partner:44381
TEST=Using a special patch (see 44381#14) add delay
to simulate a loaded EC (like at resume).
Using a script flip-flop sensors frequency (to simulate suspend/resume).
Check that:
- we are not crashing anymore (we were before this patch)
- the driver is not hitting invalid FIFO content.
Change-Id: I7c9e86f5dcfc231ab89472a6ea03af22e2c2ac32
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297178
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Before oak rev4, BC 1.2 status change was polled on VBUS change. The
designed is changed to use a single interrupt pin for both ports.
BRANCH=none
BUG=chrome-os-partner:42610
TEST=manual
make EXTRA_CFLAGS=-DBOARD_REV=3 BOARD=oak -j
emerge-oak chromeos-ec
load on oak rev3 and check BC 1.2 charging current
Change-Id: I9e6cdbb83468b5e4086cc86caadf7f2e3cbe6e48
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294442
