Write protect signal naming is now consistent across boards.
New CONFIG_WP_ACTIVE_HIGH is present on systems where the write
protect signal is active-high (e.g. Link). This will be used in the
next CL, which moves flash_get_protect() to flash_common.c
BUG=chrome-os-partner:15613
BRANCH=none
TEST=flashinfo properly reports WP signal status
Change-Id: I502ab033c3eb36661cc3ee97320874b3fbf6fc0d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56087
Reviewed-by: Vic Yang <victoryang@chromium.org>
Persistent state is needed by all platforms to hold the
protect-ro-at-boot flag. STM32F100 and LM4 implementations were
near-identical, and are now common code (with one #ifdef to handle the
single place where they weren't).
STM32L doesn't use pstate yet, but it'll need to. I can't simply
store the protect-ro-at-boot flag inside the WRP registers themselves
because they're still writable in EC-RW. The change to STM32L to use
pstate is coming next.
BUG=chrome-os-partner:15613
BRANCH=none
TEST=build pit, link, spring; on link and spring, do
- flashinfo -> (no flags)
- enable WP (via screw or dut-control)
- flashinfo -> wp_gpio_asserted
- flashwp enable
- flashinfo -> wp_gpio_asserted ro_at_boot
- flashwp now
- flashinfo -> wp_gpio_asserted ro_at_boot all_now (and possibly ro_now)
- flashwp disable -> fails
- flashinfo -> wp_gpio_asserted ro_at_boot all_now
- reboot ap-off
- flashinfo -> wp_gpio_asserted ro_at_boot ro_now
- disable WP (via screw or dut-control)
- reboot
- flashinfo -> ro_at_boot
- flashwp disable
- flashinfo -> (no flags)
(Note that on Spring you'll need to 'forceen on' before enabling WP,
or the console will be disabled once you enable ro_at_boot and reboot.)
Change-Id: I415388b98ec8bf1d149803aaaa7fe8c7f3076c36
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56064
This adds support for write protecting the RO code at boot, and the
entire flash on demand.
Implementation if WP# is not asserted is currently a little different
than STM32F and LM4; RO is still protected at boot if ro_at_boot, but
can be unprotected and the change will commit on the next reboot.
This saves the bank of flash which we use for pstate on LM4 and
STM32F. I think I can use one of the unused option bits (WRP2 bit 0)
to hold the RO-at-boot flag, in which case I can more closely match
the behavior of the other chips, but I'd like to do that (or give up
and implement pstate) in a separate CL so it's clearer what I'm doing.
BUG=chrome-os-partner:15613
BRANCH=none
TEST=manual
- flashinfo -> (no flags)
- enable WP (via screw or dut-control)
- flashinfo -> wp_gpio_asserted
- flashwp enable
- flashinfo -> wp_gpio_asserted ro_at_boot
- flashwp now
- flashinfo -> wp_gpio_asserted ro_at_boot all_now
- flashwp disable -> fails
- flashinfo -> wp_gpio_asserted ro_at_boot all_now
- flasherase 0x1fc00 0x400 -> fails
- reboot
- flashinfo -> wp_gpio_asserted ro_at_boot ro_now
- flasherase 0xfc00 0x400 -> fails
- flasherase 0x1fc00 0x400 -> succeeds
- disable WP (via screw or dut-control)
- reboot
- flashinfo -> ro_at_boot ro_now
- flashwp disable
- flashinfo -> ro_now
- reboot
- flashinfo -> (no flags)
- flasherase 0xfc00 0x400 -> succeeds
- flasherase 0x1fc00 0x400 -> succeeds
Change-Id: Id1b6b099a44a1985a5ab9387feb882a8f26e3aa1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/55594
The gpio pin used for RCIN# should be configured as open drain as the
rail is pulled up by a non-EC rail. Driving it high would leak power.
The current GPIO_HI_Z macro uses GPIO_HIGH as the default state.
However, it has been found that this actually drives the pin to ground.
It is still unclear how Link works or doesn't.
BUG=chrome-os-partner:19355
BRANCH=none
TEST=manual: boot on slippy without RCIN# causing reset and
the 'apreset warm' EC command works as expected.
Change-Id: I71425075f8d77b3d7e576a59fc24f823790e2655
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56269
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
For Spring, the charging time can be quite long and TPS65090 ends up in
timeout state and stops charging. Let's put charge state machine back to
re-init so that the device continues charging after checking charging
condition is good.
BUG=chrome-os-partner:19405
TEST=Pass charger test
BRANCH=spring
Change-Id: I838741e7283eb31ed76cf3979dbad7f070947aea
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/55720
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The current lm4 pwm module was using board-specific
pins during this configuration. Move the implementation
of configure_fan_gpios() to the board-specific files
so that the pin configuration policy isn't a part of the
common infrastructure.
BUG=chrome-os-partner:19504
BRANCH=none
TEST=successfully booted slippy with backlight turning on in OS.
Change-Id: I325f1ac4639b4a78d8b860df7a8b688ca385b71b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51471
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
When system is locked, the console is disabled. However, we need console
for debugging and testing. This CL uses a bit from back-up register to
indicate if the console should always be enabled. (This bit is currently
used by fake WP, which is removed in this CL.) With this, we can set
this bit with console command 'forceen 1' to ensure console is never
disabled.
To prevent device shipped in this state, the chip name is postfixed with
'-unsafe' so that the device is not able to pass HWID check.
BUG=chrome-os-partner:19293
TEST=Manual
BRANCH=spring
Change-Id: I88556e973ca542c1bdc27ba64988718291e01a26
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51086
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Several test utility macros have been duplicated across tests. Let's put
them in a single place.
BUG=chrome-os-partner:19236
TEST='make runtests', 'BOARD=spring make tests'
BRANCH=None
Change-Id: Ib0c9f829715425cc23e33b8ef456b17dfadab13c
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50513
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
On 64-bit platform, arrays should be aligned to 8 bytes. Also, change
the order of host_command fields so that it's packed on both 32-bit and
64-bit platforms.
BUG=chrome-os-partner:19257
TEST=Pass all tests. Print out and check the content of host commands.
BRANCH=None
Change-Id: I350a903bc11562d6d205c402548942f8967b75a5
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50467
Perviously we use uint32_t for this, but this doesn't compile for 64-bit
environment (and likely doesn't for 16-bit either.) Use uintptr_t so that
we don't get size mismatch errors.
BUG=chrome-os-partner:19257
TEST=Run host emulated tests
BRANCH=None
Change-Id: I3cd66a745fa171c41a5f142514284ec106586acb
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50358
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This is the first version of pthread-based RTOS emulator. With this, we
will be able to test high-level modules entirely on the host machine.
BUG=chrome-os-partner:19325
TEST='make runtests' and see tests passing.
BRANCH=None
Change-Id: I1f5fcd76aa84bdb46c7d35c5e60ae5d92fd3a319
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49954
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The state REINIT in TPS65090 charge state machine is more like IDLE0
state in charge_state.h. Rename it so that it's less confusing and
easier to merge the two state machines in the future. Also move the
state name definition to the header file.
BUG=chrome-os-partner:18914
TEST=Boot Spring
BRANCH=None
Change-Id: I116438fedc46ff188dfb6a3964795715b5af4d1f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49732
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The voltage rails, inputs, and sequencing is completely different. Easiest
to just handle it separately for each chipset.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Built Link, still works.
Change-Id: Ibf26ef47cdf2284b7bfb3a2e5ccfb6841aba5ac6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49559
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Also moves the handy i2cscan command to i2c_common. The
platform-dependent interface is now i2c_xfer().
Still more to do in follow-up CLs; for example, i2c_read_string() has
platform-dependent implementation, and the i2c/i2cread console
commands aren't common yet.
BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan on link, spring
Change-Id: Ia53d57beaa157bece293a4262257e20b4107589e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49492
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Daniel Erat <derat@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
LM4 doesn't have implementation of adc_read_all_channels(). Let's use
adc_read_channel() in this case.
BUG=chrome-os-partner:18598
TEST=Build stress test for link. See no error about
adc_read_all_channels() undefined.
BRANCH=None
Change-Id: I5b13384468667cbd17b83faab9f9d3fdc48de91d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49589
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This will let us check the size of static array initializers.
Also moved this macro definition and ARRAY_SIZE into a new "tricks.h"
header, so that userspace utils can use it too.
BUG=none
BRANCH=none
TEST=manual
Built everything, tested on Link. Tried various assertions.
Change-Id: I612891108ea37dbca3572e0f25ab54a7bc0ed860
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49417
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We are moving video power from VFET2 to VFET4. To support old boards, we
need to enable both of them. When new boards are in place, we can then
drop VFET2.
BUG=chrome-os-partner:18186
TEST=Build spring
BRANCH=spring
Change-Id: If0cbc1ac49affc1e3c7ec9650a661f80be826f97
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49431
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Sadly, the existence of fans may not always imply the existence of keyboard
backlights.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Use the Link EC console to make sure that both functions still behave.
faninfo
fanset 4400
faninfo
fanset 9999
faninfo
autofan
faninfo
fanduty 50
faninfo
fanduty 100
faninfo
autofan
kblight 0
kblight 100
kblight 50
kbligth 100
Change-Id: I2e07cd46c21bce2d0d4162275a8ea6ae40135e96
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49355
No code changes; this is just moving the irq to the module which
actually handles it. This makes it simpler to disable the charger
task separately from the PMU module.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build pit, spring
Change-Id: Ife44a17f69bf21aa000d162318a459cea6fdf661
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49334
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently INIT state can mean different things. This change introduces
two new states to demultiplex INIT. Now, REINIT means charge state
machine is deciding the next state. BAD_COND means it's waiting for
acceptable charging condition. Note that the three states are doing the
same thing so there is no functional change.
BUG=chrome-os-partner:18914
TEST=none
BRANCH=spring
CQ-DEPEND=CL:49327
Change-Id: Ia783e76cf27e28103ef44fe7b8a43674dadccc54
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49326
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The power button code is platform-independent. This change splits the
code out of the LM4 switch.c module so that a subseqent change to
STM32 platforms can start using it.
BUG=chrome-os-partner:18945
BRANCH=none
TEST=manual
1. Power+refresh+esc goes to recovery mode,
2. Press power button at recovery screen turns off.
3. With system off, power button turns system on.
4. Press power button for a second; screen locks.
5. Press power button while typing; blocks keystrokes while it's pressed.
6. Hold power button down for 8 sec; system forced to shutdown.
7. From EC console, with system on:
hostevent clear
hostevent -> event 0x04 is clear
press power button
hostevent -> event 0x04 is set
8. From EC console, with system off:
powerbtn -> system turns on
powerbtn 5000 -> system turns off, just like power button was held for 5 sec
Change-Id: If2a9b02514a201e1d03c857d128e2ccab51a16ef
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49217
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
CONFIG_ macros should be set directly. Expanding the task names in the same
way made it difficult to tell what was a configuration choice and what was
due to changes in ec.tasklist
BUG=chrome-os-partner:18343
TEST=build all, run link
BRANCH=none
Change-Id: Ib82e34f974238ee2dd216f33b701b6f4c6a4f1f1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49098
Reviewed-by: Randall Spangler <rspangler@chromium.org>
STM32-based platforms now use the same lid debouncing code as
LM4-based platforms, generate lid-open / lid-closed events, and
trigger lid-change hooks.
This is needed for disabling keyboard scanning when the lid is closed,
as well as future changes to mask off wake events when the lid is
closed.
BUG=chrome-os-partner:18896
BRANCH=spring
TEST=build all platforms; check that spring boots when lid is opened
Change-Id: I09a6e91119c3739297fe49b7eacac6efda988284
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48924
Reviewed-by: Vic Yang <victoryang@chromium.org>
By default it's not, but if you #define CONFIG_CUSTOM_KEYSCAN, you can add
your own settings in board.c
BUG=chrome-os-partner:18343
TEST=build link, bds
BRANCH=none
Change-Id: I2a9dd48fd7f4610bc39dcc59e59a3fedec539e28
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48994
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Some experimental boards may want to build without a battery charging task
to make bringup easier.
BUG=chrome-os-partner:18343
TEST=build all boards
BRANCH=none
Change-Id: I4269fea4046325241ad7720ec3457b0534aadda3
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48974
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This gives us better control over the execution state of lighting
engine.
BUG=chromium:233832
TEST=Build success
BRANCH=spring
Change-Id: Ibfa86be0eef2b7dff8495f770649577295d4cb6f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48773
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
CPU creates an exception frame on the main stack instead of the process
stack when the exception happens in a handler's context. So, we need to
save both msp and psp, and pick the right one to locate the exception frame.
Tested by marking the stack (as you see in the dump below) then triggering
divzero in svc_handler.
> crash svc
=== HANDLER EXCEPTION: 03 ====== xPSR: 6100000b ===
r0 :00000000 r1 :0000e237 r2 :000015cf r3 :000015cf
r4 :00000001 r5 :22222222 r6 :11111111 r7 :0000df01
r8 :00000000 r9 :2000545e r10:00000000 r11:00000000
r12:0000000d sp :20000fb8 lr :000055d7 pc :00000b40
Divide by 0, Forced hard fault
mmfs = 2000000, shcsr = 70080, hfsr = 40000000, dfsr = 0
=========== Process Stack Contents ===========
20002738: 11111111 22222222 33333333 44444444
20002748: 00000000 000003ad 000003c0 81000000
20002758: 00000000 0000557d 0000557c 21000000
20002768: 00000000 00000000 00000000 00000000
Rebooting...
BUG=chrome-os-partner:16901
BRANCH=none
TEST=mentioned above
Change-Id: I3ca08a1df20375953552b3dc926350e262b78b2a
Signed-off-by: Daisuke Nojiri <dnojiri@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/47495
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This is a struct representation of the STM32 timer registers, so
belongs in registers.h instead of the platform-independent hwtimer.h.
Note that there are other problems with the use of this struct. It
should be volatile, and if it's a win vs. the macros we should replace
ALL macro'd timer register accesses with the struct instead of just
those in hwtimer.c (that is, we shouldn't do things both ways). I'll
address those in a subsequent CL after testing which way generates the
most compact code.
No functional changes, just moving the struct definition.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: If29d008fb38b9cc847b69eda1ee7c05e67f6e5e7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48415
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Add a function which handles translation of PWROK from logical level
to physical level.
Also implement chipset_force_shutdown() in gaia_power.c, so PMU code
doesn't need to know about PWROK physical level.
BUG=chrome-os-partner:18738
BRANCH=none
TEST=build all platforms; boot spring
Change-Id: I360266ef89b6ead49a633cd57b7530f791b04c9e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48251
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
gpio_set_level() now allows setting the pin level if GPIO_LOW or
GPIO_HIGH is specified. Previously, stm32 platforms did this even
though the definition of gpio_set_level() said it wouldn't work.
Fixed gpio_set_level() not setting level after warm reboot on stm32
because it was checking the GPIO_DEFAULT flag in the wrong place.
Fixed LM4 still mucking with alternate function settings and levels
even if GPIO_DEFAULT was specified.
And checked gpio_list[] and all of the calls to gpio_set_flags() to
make sure everything still behaves the same way it did before (or
better, in the case of actual bugs).
BUG=chrome-os-partner:18718
BRANCH=none
TEST=build all platforms; boot spring and link
Change-Id: I4b84815f76060252df235ff9a37da52c54a8eac5
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48058
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Now pingpong and mutex tests compile. Still need some more work to
handle the i8042-specific KEYPROTO task for keyboard tests.
BUG=chrome-os-partner:18598
TEST=Build tests for link
BRANCH=None
Change-Id: I9ee35d4edb811f17b9a81beb799484a07c0bef14
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47981
gpio_set_alternate_function() used 0 to mean "normal GPIO function".
But on chips like STM32L, alternate function 0 is actually a function
on some pins. So change "normal GPIO function" to -1.
Also add support for this on STM32L.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build and boot link and daisy
Change-Id: I9cdd9ad91a315b616e373a0dc9a50545cf9d20fa
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47903
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Nothing has used this since link EVT, so it's just dead code at this point.
BUG=chrome-os-partner:13213
BRANCH=none
TEST=manual
- Update ectool but leave old firmware
- ectool version -> works
- ectool flashread 0 0x10000 foo -> puts the first 64KB of EC flash into foo
- Update firmware
- ectool version -> works
- ectool flashread 0 0x10000 foo -> puts the first 64KB of EC flash into foo
- power+esc+refresh -> recovery mode
Change-Id: Ib25a705bcd8280d5295c8e7890969d796542b6c9
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47866
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Make internal APIs static, and remove board_ prefix for clarity.
Move TSU6721 calls from charger task to extpower_usb functions for
better encapsulation.
No functional changes, just moving code. Yes, this will make
cherry-picking back from spring to TOT less convenient, but now the
code is more readable and it will make maintaining the PMU code easier
as we add boards.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build spring
Change-Id: I52b37e57fc8519859996a110b0503277c6f0bbc8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47657
And use them for LM4 as well as STM32. Consistency is good.
No functional changes, just moving/renaming code.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I029a21fadb50726500255219dc38615874a369e7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47700
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This changes current TASK() syntax to TASK_BASE() and TASK_NORMAL(),
where TASK_BASE is necessary for the EC to boot on a board and
TASK_NORMAL represents the task that can be removed in a test binary.
Tasks introduced by a test should be listed as TASK_TEST().
Note that this CL breaks current tests (many of them are broken anyway),
which will be fixed in up coming CLs.
BUG=chrome-os-partner:18598
TEST=Build link/bds/spring/snow/daisy/mccroskey. (mccroskey failed for
unrelated issue)
BRANCH=none
Change-Id: Ic645cdae0906ed21dc473553f1f43c2537ec4bb9
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47531
There's no chipset for mccroskey, so its keyboard code stopped compiling.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build mccroskey, spring, link
Change-Id: If94dfaf2819f047a6aa825ee10aa1d320c8ca882
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47566
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
And remove the daisy power button LED task for now. Since daisy
didn't have a board.c implementation (or a power button LED), its
power LED task did nothing.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build daisy, snow, spring
Change-Id: I1eb3d0bd038d88685e7caad087eb1a1d1495ef9a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47442
Reviewed-by: Vic Yang <victoryang@chromium.org>
Board configuration interfaces are now defined in board_config.h, not
in every board.h file.
Tidied /alphabetized CONFIG defines.
No functional changes, just rearranging code.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all targets
Change-Id: I6196591784f8fa9ce6dfccd31891b679fb200063
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47419
Hard reset is done by shorting 3.3V to ground. This is only really
necessary to work around the PMU's I2C engine getting into a weird /
uncommunicative state.
This should not make any functional changes; the code is behaving the
same way it did before.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build daisy, snow, spring
Change-Id: I0edbdfc11bd5f6643075ffc83f4df3e11fc14675
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47199
