If set_cc() is called, our toggle interrupt may still be active. Since
alert() is called from the pdcmd task and set_cc() is called from the
pd tasks, an unwanted interrupt may fire and override our desired CC
settings.
BUG=chrome-os-partner:54786
BRANCH=None
TEST=Manual on gru. Rapidly attach + detach DP dongle, verify we don't
get stuck in SNK_DISCONNECTED_DEBOUNCE.
Change-Id: Ib60123c45d9a3a78243a3347377fb2190cbdf94b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356513
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Joe Bauman <joe.bauman@fairchildsemi.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Changes were submitted for ec_commands.h but only in the braswell tree.
Merge in ToT for future reference.
BRANCH=none
BUG=chrome-os-partner:50627
TEST=compile.
Change-Id: I74f6ce3c5fd2a628879593a65506d10c44ee574d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356551
If SHI finds itself in an unexpected state, we may try to print an error
message for each IBF / IBHF interrupt, which is excessively spammy and
may even lead to EC watchdog. Avoid console spam by not duplicating IBF
/ IBHF / IBEOR error prints, if our state doesn't change.
BUG=chrome-os-partner:54502
BRANCH=None
TEST=Manual on gru. Verify only one print is seen when SHI fails due to
missed initialization.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I331c64c24fa3a68d7c17e052240691076d3532cc
Reviewed-on: https://chromium-review.googlesource.com/356239
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
The CR50 RO version is identified not just by the git hash, but also
by the fuse settings and keys used for signing. The first four bytes
of the entire RO image's hash are saved in the image header. Adding
these four bytes to the version string reported to the host allows to
uniquely identify both RO and RW firmware versions.
BRANCH=none
BUG=none
TEST=verified that the appropriate string is showing up:
localhost ~ # grep cr50 /sys/firmware/log
Firmware version: RO: 97594095 RW: cr50_v1.1.4803-dcac93a-dirty
localhost ~ #
Change-Id: I30a21fad15d99523b1edfa1baa32d80b44e7d0df
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356735
Reviewed-by: Scott Collyer <scollyer@chromium.org>
If the battery is not yet ready to provide the power or battery is
not present and the charging current is set to 64mA then the charger
voltage regulation is transient. ROHM recommended 512mA of minimum
charging current for this issue, hence changed the minimum charging
current from 64mA to 512mA.
BUG=chrome-os-partner:54821
BRANCH=none
TEST=Manually tested on Amenia.
a. Until the battery is initialized from cut-off mode, charging
voltage doesn't drop below battery voltage max.
b. With 15W charger (5V, 3A) without the battery, charger voltage
is regulated to battery voltage max.
Change-Id: I44172d4e9152b699976137bf070d618097c8cef7
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/356570
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Not everything with a temperature sensor uses thermal throttling. This
change modifies the conditional build to enable building temp sensor
source without thermal throttling.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I8c0753f12899e9f203c04477ae520bcda40d5fd8
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356484
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Added console commands for the debugging purpose
psys - Can be used to measure the system power
amonbmon - Can be used to measure AMON/BMON voltage diff, current
BUG=chrome-os-partner:54273
BRANCH=none
TEST=Manually tested on Amenia
psys - Ran fish task and observed psys value changes.
amonbmon - AMON & BMON voltage & current are same as measured
across sense resistors.
Change-Id: I6653e814d9b00efe7dae9ce1fbd7ddbc2356f8e0
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/353043
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
The highsec jittery clock was breaking the USB peripheral, because it
would use bank values that mapped to frequencies less than 15MHz. This
change modifies stepx16 to keep the bankvalues mapped to frequencies
above 18MHz to ensure the USB peripheral can work with the high
security jittery clock.
BUG=chrome-os-partner:53952
BRANCH=none
TEST=sudo flashrom -p raiden_debug_spi:target=AP -r test_img.bin
Change-Id: If8b45583f2cd9272b6d1e79a06556724c25d6495
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356192
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When the Cr50 doesn't have anything else to do and it's been a
while since anyone has communicated with it (10 seconds via UART,
1 second via SPI, and the USB bus has stopped sending SOF
packets), it enters one of three idle states:
wfi = fully powered, just waiting for an interrupt.
sleep = low power mode, but RAM is preserved. It resumes quickly.
deep sleep = hibernate. RAM is lost, resume is a warm boot
You can get/set the idle state with the "idle" console command.
BUG=chrome-os-partner:49955,chrome-os-partner:54331
BRANCH=none
TEST=make buildall
To test it:
* I've only tested on the debug board, because I need a serial
console (not serial-over-USB) to see if it's asleep or not.
* I haven't been able to knowingly force USB Suspend on my
workstation, so to fake it I just unplug the USB cables.
* Wait 10-12 seconds after typing anything on the serial console,
then press a key. If the Cr50 was asleep, the first character
will be lost. If it wasn't, you'll see the character echoed
immediately.
Change-Id: Icc213e50b0c38f8c2b16bcd9960e2e5550b43180
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356123
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
- Power up the AP automatically on initial EC power-on.
- In S0, wait for 8s power button hold before powering down.
- In S3 and lower, power down immediately on power press.
- In G3 / S5, power up on lid open.
BUG=chrome-os-partner:54582,chrome-os-partner:54511
BRANCH=None
TEST=Manual on gru. Verify the following:
- AP powers up when battery initially attached.
- `reboot` powers up AP after EC reset.
- `reboot ap-off` doesn't power up AP.
- `apshutdown` + `lidclose` + `lidopen` causes AP power-up.
- Holding power for 4s in S0 does not change power state.
- Holding power for 8s in S0 causes AP power down.
Change-Id: I588056549a972212c28b9aa6a83fe2e0b179baa9
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355650
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
We need to write 0 to RBOX_WAKEUP_CLEAR after writing 1 to clear the
rbox wakeup registers.
BUG=none
BRANCH=none
TEST=after init verify 'rw .h 0x40550098' returns 0
Change-Id: Id7eda45f443300e77f293556eece72d52ca28f17
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355283
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Hsiao-heng Lee <kelinlee@google.com>
BUG=chrome-os-partner:52639
BRANCH=None
TEST=Manual on gru with subsequent commit.
Attach USB dongle in port 1 and DP dongle in port 0, then verify `ectool
usbpdmuxinfo` output:
Port 0: DP
Port 1: USB
Flip DP dongle and verify output changes:
Port 0: DP INV
Change-Id: I5459cb587badd46c03d1c433f13fdf21a5dc63ed
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355282
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
For designs where the host SOC is responsible for setting the USB-C SS
mux, the EC must track the desired mux state and inform the host when
the desired state changes. Then, the host must ask the EC for the new
desired state and set the mux accordingly.
BUG=chrome-os-partner:52639
BRANCH=None
TEST=Manual on gru with subsequent commit.
Attach USB dongle in port 1 and DP dongle in port 0, then verify `ectool
usbpdmuxinfo` output:
Port 0: DP
Port 1: USB
Flip DP dongle and verify output changes:
Port 0: DP INV
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6a99ce93a76c3197f9195cfaa25c5217d09aeb75
Reviewed-on: https://chromium-review.googlesource.com/355281
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This updates the lockfile path for FHS 3.0 since powerd as well
as other pieces of software are migrating over.
BUG=chromium:616620
CQ-DEPEND=CL:351271
BRANCH=none
TEST=compiled
Change-Id: I6aa5fa30225e45039316e4a3af0e50cdef0fdf4e
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/351345
Reviewed-by: Dan Erat <derat@chromium.org>
Created a new TPM register define at the beginning of the
vendor defined configuration register space 0xF90 - 0xFFF.
Note that this same space is defined for each locality.
In order to retrieve the FW version string, the TPM register
at offset 0xF90 needs to be written. This will initialize
a the pointer index to 0. The same register is then
read by the AP and each read will return up to 4 bytes of the
FW version string. Once Cr50 detects the string termination
character, it stops incrementing the index so that 0s continue
to be returned for each subsequent read.
In addition there is a max value of reads for the case when the
version string is corrupt and doesn't have a '\0' character.
BRANCH=none
BUG=chrome-os-partner:54723
TEST=Manual
Added a routine in /coreboot/src/drivers/spi/tpm.c tpm_init()
that does the write/read sequence described above. This test
routine produced the folloiwng AP console output:
Reading TPM EC Version!!
scollyer@ code goes here
Read 1: cr50 0x30
Read 2: _v1. 0x2e
Read 3: 1.47 0x37
Read 4: 81-1 0x31
Read 5: 3619 0x39
Read 6: 95-d 0x64
Read 7: irty 0x79
Read 7: 0x0
Cr50 FW Version: cr50_v1.1.4781-1361995-dirty
Read Count = 29
Initialized TPM device CR50 revision 0
Change-Id: I5d68a037f7a508e3109c35e841dbcb3a893ce22f
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355701
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
The "PC Client Protection Profile for TPM 2.0" document defines SPI
bus addresses for different localities. That definition is not honored
in the cr50 implementation, this patch fixes it: locality zero
register file is based off 0xd40000.
BRANCH=none
BUG=chrome-os-partner:54720
TEST=verified that upstream Linux driver is happy now
Change-Id: Ibc01035a5dcc823a0ec82374d758de08a70083b6
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355610
Tested-by: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
On EC reset where PMIC_EN will be pulled low,
PMIC could get into an unknown state and will
not sequence properly on sub-sequent boot.
This is a temporary workaround for Reef Proto,
a hardware change will be implemented on EVT.
BUG=chrome-os-partner:53974,chrome-os-partner:54507
BRANCH=none
TEST=Reef powers to S0 and starts coreboot after EC reset
Tested with servo cold reset button
and console reboot command
Change-Id: I32aa004b000895da2c97d1014a8ef48c0a98779d
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/354762
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=chrome-os-partner:54503
BRANCH=none
TEST=Manually tested using console commands on both the ports.
a. Issued 'gpioget AC_PRESENT', observed AC_PRESENT is
1 when AC connected & 0 when AC disconnected.
b. Issued 'hibernate' & on plugging in the AC, device
boots to S0.
Change-Id: Iad09914d79cdbd798fb650146321eafed06eb91c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/354721
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Added mutex lock for nvmem write/move operations. In the
current implementation, there is no single entry point
for the platform specific NvMem calls. The mutex lock is
coupled with a task number so that the same task can attempt
to grab the lock without stalling itself.
In addition to the mutex lock, changed where the cache.base_ptr
variable is updated. Previously, this was done prior to the
partition being copied from flash to the shared memory area.
Now, the variable is only updated after the copy so that read
operations will always read from the correctly from either
flash or from cache memory if a write operation has been
started.
BRANCH=none
BUG=chrome-os-partner:52520
TEST=Manual
make runtests TEST_LIST_HOST=nvmem and verify that all tests pass.
Tested with tcg_test utility to test reads/writes using the
command "build/test-tpm2/install/bin/compliance --ntpm
localhost:9883 --select CPCTPM_TC2_3_33_07_01".
Change-Id: Ib6f278ad889424f4df85e4a328da1f45c8d00730
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353026
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Add a host event to support MKPB:
When sent, the ACPI code will send a notification to the kernel
cros-ec-lpcs driver that will issue EC_CMD_GET_NEXT_EVENT.
We can allow code (sensor stack for instance) that uses MKBP to work
on ACPI based architecture.
Obviously, host event over MKPB is not supported.
BRANCH=none
BUG=b:27849483
TEST=Check we get sensor events on Cyan through the sensor ring.
(cyan branch)
Change-Id: Iadc9c852b410cf69ef15bcbbb1b086c36687c687
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353634
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Adding ability to get # seconds before rtc alarm
goes off.
BUG=chrome-os-partner:52218
BRANCH=None
TEST=ectool rtcgetalarm w/o setting returns
Alarm not set.
ectool rtcsetalarm 30; ectool rtcgetalarm
to make sure counting down to 0. After alarm
goes off, rtcgetalarm should return alarm not
set again.
rtcsetalarm 30; rtcgetalarm to check alarm is set.
rtcsetalarm 0; should disable alarm. Use
rtcgetalarm to ensure that alarm is disabled.
Change-Id: I176b12fe2dda08eedd23ea33dc64785f09f1d9ae
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353331
Reviewed-by: Shawn N <shawnn@chromium.org>
following Change#227416 to meet client's spec.
BUG=chrome-os-partner:54263
BRANCH=master
TEST=`make -j BOARD=elm`, check factory force IDLE, works good
Change-Id: I1f0abdcbd56eeab379a6258869ccc133ff80736d
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/353521
Reviewed-by: Shawn N <shawnn@chromium.org>
We have no guarantee about the alignment of our input buffer so don't
use 32-bit access.
BUG=chrome-os-partner:54561
BRANCH=None
TEST=Manual on gru. Enable CHROMEOS_VBNV_EC, verify exception isn't
encountered on host command 0x17. Also verify call to
system_set_vbnvcontext followed by system_get_vbnvcontext results in
same data being read back.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I4df636b70c71a43a2dd6f584ee965135e90b4351
Reviewed-on: https://chromium-review.googlesource.com/354132
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
BD99955 DCDC wiil turn off Vsys voltage under VSYSVAL_THL_SET
or VREF_BAT<VBAT if Charging Voltage set under actual battery
voltage or VSYSVAL_THL_SET.
BUG=chrome-os-partner:53777
BRANCH=none
TEST=boot-up without battery. using zinger or oem supplier
used kevin rev2, rev3
Change-Id: I03c5c52790b2d481be3fa942054516fbefa3ce98
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/348563
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=chrome-os-partner:54551
BRANCH=None
TEST=Manual on kevin. Verify negotiation to 20V when zinger is plugged.
Also verify "pd 0 dev 12" and "pd 0 dev 5" cause 12V/5V to be requested
from zinger.
Change-Id: I0298d535b791fa0c6f8ca077a6fd09a27e8ce77b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353804
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Overflow happens when raw value from ADC is greater than 0x7FFF.
When it happens, skip the result.
BRANCH=ryu,jerry
TEST=Without this code, the proximity sensor would show 22000in
instead of staying close to 0 when thumb is near sensor.
BUG=chrome-os-partner:53851
Change-Id: Id2182acbbf7b00157d9fee5d28bb61df4f166246
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/348300
When we jump from RO to RW, tcpc_vbus declared in tcpci.c
is initialized to 0. So even if we had VBUS present before,
PD_FLAGS_VBUS_NEVER_LOW is not set and soft reset cannot be used
later when source cap is timeout. This causes power loss and reboot
when we boot up system without battery.
Set PD_FLAGS_VBUS_NEVER_LOW after tcpm_init() so we can refresh
tcpc_vbus from TCPC first.
BUG=chrome-os-partner:53496
BRANCH=none
TEST=test on elm.
Remove battery and boot up successfully only with AC.
Use "sysjump rw" command and ec won't reboot by pd hard reset.
Change-Id: Id4737f076a9572cb540310f9fdce062198257967
Signed-off-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/352833
Reviewed-by: Rong Chang <rongchang@chromium.org>
Implement the standard LED control scheme for gru, using a single PWM to
set the battery status LED color rather than the traditional GPIOs.
BUG=chrome-os-partner:54379
BRANCH=None
TEST=Manual on gru. Verify LED is green when charging w/ nearly full
battery, off when discharging w/ nearly full battery, amber when
charging otherwise.
Also verify LED control host commands work as expected:
ectool led battery green=1 // green
ectool led battery amber=1 // amber
ectool led battery red=1 // red
ectool led battery red=0 // off
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I184e72c552e6d2196aef2724af9292806e0ea8c0
Reviewed-on: https://chromium-review.googlesource.com/352520
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
It is necessary to be able to build usb_updater for both host and
board environments.
When building for board environments the appropriate compiler and
binutils are defined in the environment. Allow the environment
definitions to take precedence over local definitions.
BUG=none
TEST=inside and outside chroot:
. ran 'make clean; make; verified that command can be run on the
host.
inside chroot:
. ran 'emerge-kevin ec-utils' and verified using the 'file' utility
that the executable in /build/kevin/usr/sbin/usb_updater is built
for arm
Change-Id: If2ac4a4e7f7ece188eba5ff917a510363c6d1990
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353165
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
FUSE_CTRL_OVERRIDE overrides all rbox fuse values with the values in
RBOX_DEBUG not just the ones that are explicitly set. This change
removes the override from rbox.
BUG=chrome-os-partner:54238
BRANCH=none
TEST=on gru and kevin check that pressing 'c' registers on the EC.
Change-Id: I655e9ca96e52359a7d36e0d691f838c335df8cb8
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353033
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Previously our charger ISR called a deferred task which woke our charger
task. We can skip the deferred task and just wake our charger task
directly.
The other meaningful change here is to assume that we're using the
charger for VBUS detection / BC1.2 if we have a usb_chg task, which
holds true for all of our current boards with this charger.
BUG=None
TEST=Manual on kevin with subsequent commit. Verify charger connect /
disconnect detection works properly on both ports, with zinger, donette
and generic DCP charger.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Iad4f3ea90947b50859c549b591675e325717209f
Reviewed-on: https://chromium-review.googlesource.com/352822
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This makes the boot time less painful since it requires a long delay
for FW loading after power on this chip. This also makes it easier to
upgrade FW as we don't need to power on the chip before doing upgrade.
BRANCH=none
BUG=chrome-os-partner:52815
TEST=plug and unplug dongle and check DP output
plug/unplug adapter and check pd 0 state
Change-Id: Ia344c748697a3b1d06c9b442e1bf1d7227861f9b
Signed-off-by: Tang Zhentian1 <ztang@analogixsemi.com>
Signed-off-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/347181
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
ANX7688 is a TCPCI compatible port controller with HDMI to DP converter.
The HDMI converter needs a reset every time after enabling its function.
BRANCH=none
BUG=chrome-os-partner:52815
TEST=manual
boot elm proto
plug and unplug dingdong and check DP output
plug/unplug adapter and check pd 0 state
Change-Id: I774421d7b0b8d2cfd31e860fcd4eaed08ee48ac7
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Tang Zhentian1 <ztang@analogixsemi.com>
Reviewed-on: https://chromium-review.googlesource.com/340371
Commit-Ready: Koro Chen <koro.chen@mediatek.com>
Tested-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Enable charger interrupt for VBUS / BC1.2 detection on kevin / gru.
Also, keep our USB data switches connected while we figure out how to
implement USB mux control.
BUG=None
TEST=Manual on kevin with subsequent commit. Verify charger connect /
disconnect detection works properly on both ports, with zinger, donette
and generic DCP charger.
BRANCH=None
Change-Id: I602e7bd3180110d351ec4c2916a6b8612c7e5f82
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/352821
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Shelley Chen <shchen@chromium.org>
The README points the reader back to the docs directory where the
CCD documentation lives. I've added information about the install
script, and about how the raiden module identifies a CCD serial
console.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I8714dffcad0b8c30f46529a8f2d670b5d432cda6
Reviewed-on: https://chromium-review.googlesource.com/352787
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
loader/key_ladder.c depends on debug_printf(). Refactor
the printf function so that key_ladder.c need not depend
on main.c.
This change being made in preparation for a future
change which introduces a dependency between RW and
key_ladder.o
BRANCH=none
BUG=chrome-os-partner:43025,chrome-os-partner:47524
TEST=build succeeds
Change-Id: I5c9bf7bd6dd9f76ab6410e6e797973bdb072ec16
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/351760
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
