The auto_power_on is set 1 unexpectedly while EC jumps. This has a
side effect that would turn on the AP unexpectedly after "power off".
See comment 43 of issue 28249
BUG=chrome-os-partner:28249
BRANCH=tot,nyan
TEST=on nyan:
> reboot
> sysinfo
// If EC is in RO, "sysjump RW"
> power off
// The AP keeps off.
Change-Id: I3c06e99383c06af7cd6c17dd65040e20f06d8e73
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198941
This is a follow-up for CL 197990 and 197991. See issue tracker for
more details.
BUG=chrome-os-partner:28289
BRANCH=tot,nyan
TEST=Copy from https://chromium-review.googlesource.com/#/c/197990
Going battery shipmode and plug-in AC, See booting and expect EC log:
"[... battery initialized]"
Disconnect battery, and plug-in and see booting and expect EC log:
"[... battery not responding]"
Change-Id: Ic218414c21057a971b478ec60e406f1eb69dd379
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198412
FAFT expects the "AP running" shows first, then "XPSHOLD seen".
BUG=chrome-os-partner:28316
BRANCH=tot,nyan
TEST=build only
Change-Id: Ic3e9d68b7727d62d3ccc2c037e7547f0276c2eae
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198766
Reviewed-by: David Hendricks <dhendrix@chromium.org>
If we follow the TEST steps below, the power state machine in AP
and EC were out of sync -- due to the un-clear bit and wrong
initial power state.
BUG=chrome-os-partner:24835
BRANCH=tot,nyan
TEST=on big.
> reboot
> power off // De-assert XPSHOLD
> reboot ap-off
> sysinfo // This reset flags does NOT contain "ap-off".
> power on
% ectool reboot_ec RW // The following message is NOT observed.
// "system is on, but RESET_FLAG_AP_OFF is on".
> power // This should show the AP is "on".
// ensure everything still works.
> reboot ap-off // AP keeps off.
> reboot // AP is on.
Change-Id: I51afed7201d16ebcd889ad12a7af90026591cc2d
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198587
Reviewed-by: David Hendricks <dhendrix@chromium.org>
The power_request variable is not clear in apshutdown case. Thus,
the AP comes up again by the "power up" request. Clear this variable
only when apshutdown command to avoid affecting the regular power
states.
BUG=chrome-os-partner:28621
BRANCH=tot,nyan
TEST=see below
> reboot // or other methods to turn on the AP.
> power on
> apshutdown
// The AP should remain off.
Change-Id: Icfc8a50db95aba656168f5b10dabd9443d75338d
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198770
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Some battery uses clock stretching feature, and this could disturb
PMU communication before battery going stable.
AP does not know and will attempt PMU setting, and could get fail
For various battery indicates usually 1s for stable
(even if it is much less in real world 200ms~700ms)
Let's checking 'battery is ready' when first pump-up power.
BUG=chrome-os-partner:28289
TEST=Going battery shipmode and plug-in AC, See booting and EC log
Disconnect battery, and plug-in and see booting and EC log
Change-Id: I9b62266132d5322366265afe03adbe0db1f9ae75
Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/197991
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
See issue tracker for details.
BUG=chrome-os-partner:28518
BRANCH=tot,nyan
TEST=on big
% reboot ap-off
% powerbtn
[6.100943 power on 4]
Was power on 1 before fix.
% reboot
[0.098134 power on 2]
Was power on 1 before fix.
Change-Id: I7b2fd95234d16467edca041b1c12d63ca4b5112b
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/198070
Reviewed-by: Randall Spangler <rspangler@chromium.org>
XPSHOLD is not always removed after chipset_force_shutdown(). This is
different to the GAIA design. So, check the RESET_FLAG_AP_OFF flag
again while check_for_power_on_event().
BUG=chrome-os-partner:28371
BRANCH=tot,nyan
TEST=verify on big.
re-flash ec: power on 2, AP is up.
AP is on, reboot@EC: power on 1, AP is up.
AP is off, reboot@EC: power on 2, AP is up.
AP is on, reboot ap-off@EC: AP keeps off (see FLAG_AP_OFF flag)
AP is off, reboot ap-off@EC: AP keeps off (see FLAG_AP_OFF flag)
reboot ap-off@EC, then 'powerbtn': AP is off at boot, then power on 4
reboot@EC: power on 2, AP is up.
re-plug AC (remove battery): power on 2
re-plug battery (without AC): power on 2 (but my battery is dead)
power off (S5), power on: power off 4, power on 5
power off (G3), power on: power off 4, power on 5
lid close / power off (S5)/ lid open: power on 3
lid close / power off (G3)/ lid open: power on 3
press power button and release: nothing happens after 15s. AP keeps in S5.
button off (S5)/ on: power off 3, power on 4
button off (G3)/ on: power off 3, power on 4
power off (S5)/ button on: power off 4, power on 4
power off (G3)/ button on: power off 4, power on 4
button off (S5)/ power on: power off 3, power on 5
button off (G3)/ power on: power off 3, power on 4
button off (S5)/ lid open: power off 3, power on 3
button off (G3)/ lid open: power off 3, power on 3
is off, long press button (60s): power on 4, too long, shutdown, stay off
is on, long press button (60s): power off 3, stay off
AP is on, apreset cold: entered to S5, power off 3, power on 5
AP is on, apreset warm: power state is not changed, but reboots to BIOS
Change-Id: I9ccd13ab4b5f38be1ad8d6c9a04724b56bc5b166
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197604
Reviewed-by: David Hendricks <dhendrix@chromium.org>
In some cases, the system will boot to S0 from the point of view of
the EC, but PLTRST# will never deassert. Work around this by waiting
50 ms for PLTRST# to deassert. If it doesn't, force the chipset all
the way down by deasserting RSMRST#, then pulse the power button to
turn it back on.
Also add a powerfail debug command to simulate this failure event, so
that the recovery process can be tested.
Add API to the LPC module to get the state of PLTRST#, and to the
power button state machine to force it released when we shut down the
chipset and and force another power button pulse as we reset the
chipset.
BUG=chrome-os-partner:28422
BRANCH=baytrail
TEST=1. Boot system. Should boot normally. Shut system down.
2. powerfail
3. Boot system. On the EC console, should see the system come up,
go back down through G3S5, then come back up. From the user's
point of view, it just boots.
1. Boot system. Should boot normally. (That is, powerfail is not sticky)
Change-Id: Ia57f196606f79b9f2fce7d9cd109ab932c3571aa
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197523
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This would move all tegra boards to charger v2.
Also removed the unnecessary charge_keep_power_off(), which was
designed for USB power port and doesn't apply to Tegra platform.
BUG=none
BRANCH=nyan,big,blaze
TEST=build and run on nyan.
Change-Id: I9517a8885726ad6dce5a2865402da4b9551e009f
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194384
Commit-Queue: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Tested-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Refactored keyboard scan enable/disable flag such that it is a mask of
potential disable sources. When all disable sources are off, scanning is
enabled, otherwise scanning is disabled. This fixes a recently introduced
bug in which enabling/disabling keyboard scanning due to lid angle in S3
was interfering with enabling/disabling keyboard scanning due to power
button. This also allows for easy expansion for future causes for disabling
keyboard scanning.
BUG=chrome-os-partner:27851
BRANCH=rambi
TEST=Manual tests with a glimmer. Used the ksstate console command to
check state of keyboard scanning under all permutations of power button
pressed/unpressed, lid switch open/closed, and lid angle in tablet position
vs. laptop positon.
Change-Id: Ied4c5ebb94510b1078cd81d71373c0f1bd0d6678
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/194287
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We had decreased this from 100 ms to 5 ms, but apparently we need at
least 10 ms. Use 15 ms to give us some margin.
BUG=chrome-os-partner:25264
BRANCH=rambi
TEST=boot system
Change-Id: I4d96aeb1040a042bac46fa8701a073d3355bfd2a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/190485
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This works around an issue where LCDVCC falls too slowly. The impact
is to slow shutdown by 7 ms, which isn't noticeable to the user.
BUG=chrome-os-partner:26561
BRANCH=rambi
TEST=shut down rambi; still shuts down, and ~7 ms more time is spent
in S0->S3 state.
before:
[429.933010 power state 3 = S0, in 0x043f]
[429.933240 power state 7 = S0->S3, in 0x043f]
[429.933614 power state 2 = S3, in 0x042b]
[429.934013 power state 8 = S3->S5, in 0x0428]
after:
[20.355975 power state 3 = S0, in 0x003f]
[20.356194 power state 7 = S0->S3, in 0x003f]
[20.363957 power state 2 = S3, in 0x002c]
[20.364179 power state 8 = S3->S5, in 0x002c]
[20.364877 power state 1 = S5, in 0x0008]
Change-Id: Ie843bdcf740f3dbc1b866a0356cea2a8b42d4194
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/189092
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
We don't have available GPIO pin for power button as the hibernate
(stand-by) wake-up source. Also, we don't want to do board change.
So, put the EC in a decent infinite loop to pretend the hibernate mode
and wait for particular wake-up event. This should be fine because
the AP is already down before EC hibernates.
BUG=chrome-os-partner:25435
BRANCH=Nyan
TEST=see comment #6 of issue for detailed test steps.
Change-Id: I2cae131789f9ca5808b60d5f2495222ca9016e7c
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186061
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously, the AP could only set the current wireless power state.
It couldn't determine what the EC would do in S3, nor could it get the
current wireless power state. Extend the wireless command to do so,
and add an EC console command to aid in debugging.
BUG=chrome-os-partner:25655
BRANCH=rambi
TEST=manual; expected numbers are from EC 'wireless' command
AP off -> 0x0, 0x9
AP on -> 0xd 0x9
AP suspended -> 0x9 0x9
AP on -> 0xd 0x9
ectool wireless 0x1 -> 0x1 0x9
ectool wireless 0xd -> 0xd 0x9
ectool wireless 0 0 0 0 -> 0xd 0x9 (and prints 0xd 0x9 to root shell)
ectool wireless 5 -1 -1 0 -> 0x5 0x9
AP suspended -> 0x1 0x9 (doesn't turn on 0x8, just turns off 0x4)
AP on -> 0xd 0x9
ectool wireless 0 0 0 -1 -> 0xd 0x0
AP suspended -> 0x0 0x0
AP on -> 0xd 0x9
Change-Id: I8ead2d4a4423b51ec4f638bf94c62de98726b25c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/187273
Nyan uses common/charge_state instead. So, fix the dependence.
Since snow/spring/pit are using common/pmu_tps65090_charger, keep them.
BUG=None
BRANCH=Nyan
TEST=build and works fine on Nyan 3.2
Change-Id: I985f7980578ac22602b1fbffa51edf039078bc05
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/186337
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Since we have only mini-PCIe devices, and no PCIe devices, we don't need a 100 ms delay.
BUG=chrome-os-partner:25264
BRANCH=rambi
TEST=boot system; AP boots normally
Change-Id: I3dd537154d70b8379ebc36cb71474420cba43d7d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185046
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
If the lid is open during shutdown, we were leaving the touchscreen
out of reset. That increased S5 power consumption.
BUG=chrome-os-partner:25168
BRANCH=rambi
TEST=boot system, then power off with lid open
'gpioget TOUCHSCREEN_RESET_L' --> 0
Change-Id: Ibcd4718f0e4197a8cbcf2bb88cfbfa38ed345ead
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/185027
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
We noticed this on a baytrail board, but the same problem exists in
haswell as well. And while looking there, found that we skipped the
S5G3 state if the 5V rail failed to come up.
Fortunately, these are all rare corner cases; rails will always come
up on a good system. So this only affects systems during bringup and
factory, not devices in the field.
BUG=chrome-os-partner:24915
BRANCH=rambi (and technically haswell, but may not be worth merging)
TEST=Try booting a system with a bad power rail; see that SUSP_VR_EN=0
after the system fails to boot.
Change-Id: Ifd10841d298a0f2510a8b182250b717ea5643c99
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183733
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The PCH uses a 16 ms debounce, so need to assert the signal for twice
that to be assured of a reboot.
BUG=chrome-os-partner:25088
BRANCH=rambi
TEST=Alt+VolUp+R reboots the system
Change-Id: I51fd54fd992e4e54e6c3bc9c13f9fd59e9bf55ac
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183726
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Previously, the 5V rail was disabled unconditionally in the S0->S3
transition. Now, the rail is left powered if one or both of the USB
ports are powered.
BUG=chrome-os-partner:25178
BRANCH=rambi
TEST=Modify the OS to leave USB ports powered in S3. Then suspend. On
the EC console, 'gpioget pp5000_en' should be 1.
Change-Id: I3c73f3fe228e940317c0da7330f117c7ab0a6d0c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183548
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
For the better naming for power/common.h, we rename CONFIG_CHIPSET_X86
to CONFIG_POWER_COMMON (no one is actually using it). But keep
CONFIG_CHIPSER_TEGRA for power/build.mk.
BUG=chrome-os-partner:25068
BRANCH=nyan,falco,link,peppy,rambi,samus,squawks
TEST=build only
Change-Id: Ibf1a4c24088dfddac39b38a95b3b887c195152d5
Signed-off-by: Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182732
Some WiFi devices do not tolerate losing power in suspend
and will not function properly after resume if they have
lost power.
Enable this on the Rambi device.
BUG=chrome-os-partner:24114
BRANCH=baytrail
TEST=complete mutiple successful suspend/resume cycles on rambi
and ensure that wifi continues to function and not cause a crash.
Change-Id: Id421f3138e429b247bfb3f5ffb92a06c0353bb97
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183047
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Integrate with power/common.c -- a real state machine now. Also remove
duplicate and unused functions/consts.
BUG=chrome-os-partner:24831
BRANCH=nyan
TEST=on nyan rev 3.12.
re-plug AC: PASS, power on 2
reboot: PASS, power on 2
power off (S5), power on: PASS, power off 4, power on 5
power off (G3), power on: PASS, power off 4, power on 5
lid close / power off (S5)/ lid open: PASS, power on 3
lid close / power off (G3)/ lid open: PASS, power on 3
press power button and release: nothing happens after 15s.
button off (S5)/ on: PASS, power off 3, power on 4
button off (G3)/ on: PASS, power off 3, power on 4
power off (S5)/ button on: PASS, power off 4, power on 4
power off (G3)/ button on: PASS, power off 4, power on 4
button off (S5)/ power on: PASS, power off 3, power on 5
button off (G3)/ power on: PASS, power off 3, power on 4
button off (S5)/ lid open: PASS, power off 3, power on 3
button off (G3)/ lid open: PASS, power off 3, power on 3
is off, long press button (60s): power on 4, too long, shutdown, stay off
is on, long press button (60s): power off 3, stay off
apreset cold: entered to S5, power off 3, power on 5
apreset warm: power state is not changed, but reboots to BIOS.
Change-Id: Ie12fa4f79b6156f71f89155b2b01880914809c75
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182348
Reviewed-by: Randall Spangler <rspangler@chromium.org>
It was udelay, which is busy-loop and other tasks have no chance to run.
usleep() could yield the CPU resource out.
BUG=None
BRANCH=nyan
TEST=other tasks get chance to run.
- Before:
[0.010242 not sysjump; forcing AP shutdown]
[0.060471 EC triggered warm reboot]
- After:
[0.010103 not sysjump; forcing AP shutdown]
[0.022985 event set 0x00000080]
[0.041828 Charge state init -> idle0 after 0.010393 sec]
[0.043327 Battery 98% / 1092h:15]
[0.060394 EC triggered warm reboot]
Change-Id: Id41a0b4fda5ac78b1b7f3e3f316b9721fcc3dd34
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181763
Reviewed-by: Randall Spangler <rspangler@chromium.org>
After this change, only Rambi 2.0 boards will boot properly.
This cleanup is necessary before supporting other Baytrail systems.
BUG=chrome-os-partner:24414
BRANCH=rambi
TEST=as soon as I get a 2.0 board
Change-Id: Ic9e3afcee9dae5c0b7f31a7aa4500b2572ba92c6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181754
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Renaming file names is the first step. Please see issue tracker
for more details.
BUG=chrome-os-partner:24832
BRANCH=link,falco,samus,rambi,peppy
TEST=build all x86 boards.
make clean BOARD=link && make -j32 BOARD=link && \
make clean BOARD=falco && make -j32 BOARD=falco && \
make clean BOARD=samus && make -j32 BOARD=samus && \
make clean BOARD=rambi && make -j32 BOARD=rambi && \
make clean BOARD=peppy && make -j32 BOARD=peppy
Change-Id: I3a296a0c14f6bebefa858438b1320061ac71dd38
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181400
Reviewed-by: Randall Spangler <rspangler@chromium.org>
For AP hang detection, the warm reset must be implemented. Since
the cold reset is easy, implement it at the same time.
BUG=chrome-os-partner:23822, chrome-os-partner:24789, chrome-os-partner:24558
BRANCH=nyan
TEST=on nyan rev 3.12
power on/off --> work as usual
power on, then apreset cold --> system is cold reset (off, then on)
power off, then apreset cold --> nothing happens. this is fine.
power on, then apreset warm --> system is warm reset (power trail is kept).
power off, then apreset warm --> nothing happens. this is fine.
power on --> system is back to normal again.
Change-Id: I010793b7a2d309e5d606fbc5877e9e3b07c8c5f3
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181164
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The first time the PMIC sees power (AC or battery) it needs 200ms
(+/-12% oscillator tolerance) for the RTC startup. In addition
there is a startup time of approx. 0.5msec until V2_5 regulator
starts up.
BUG=None
BRANCH=nyan
TEST=verified on rev 3.12 with AC/battery replug * 10.
Power button on/off and 'power on/off' are not effected.
Change-Id: I706829017a53c549601a925cb18d33b21c50eb76
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180677
Reviewed-by: Randall Spangler <rspangler@chromium.org>
According to the nVidia power engineer, we shall wait for 40ms to see
XPSHOLD asserted after PMIC_PWRON_L is asserted.
Also change the code since it was obscured. Comments was out-of-sync too.
BUG=None
BRANCH=None
TEST=Verified on rev 3.12.
Change-Id: If479d8398f4008f0b029d450b3d28ac98cdf969f
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180502
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This make minor syntactic changes and renames some camel-cased symbols
to keep checkpatch from complaining. The goal is to reduce the
temptation to use 'repo upload --no-verify'.
This is a big furball of find/replace, but no functional changes.
BUG=chromium:322144
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180495
Proto 2.0 makes these changes:
KBD_IRQ# moves from PM4 to PM3.
EC_PWROK moves from PH2 to PJ1.
Since PM3 and PJ1 are unused on proto 1.5, it's harmless to duplicate
the current functionality on those outputs. We can remove the old
outputs when we deprecate the 1.5 boards.
BUG=chrome-os-partner:24424
BRANCH=none
TEST=boot rambi
Change-Id: Iff77651ef575a8405878fe75f025a0507b02b771
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180081
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This renames constants used in compiler conditionals to uppercase.
BOARD_foo
CHIP_foo
CHIP_FAMILY_foo
CHIP_VARIANT_foo
CORE_foo
Mixed-case constants are still defined by the makefile, but are now no
longer used. I will make one more pass in a week or so to catch any
that are part of someone else's CL, since otherwise this change might
silently merge correctly but result in incorrect compilation. Then I
will remove defining the mixed-case constants.
BUG=chromium:322144
BRANCH=none
TEST=Build all boards. Also, "git grep 'BOARD_[a-z]'" should return no
results (similarly for CHIP, CORE, etc.)
Change-Id: I6418412e9f7ec604a35c2d426d12475dd83e7076
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179206
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
New boards (rev >= 2.2) are not affected since chipset_force_shutdown()
is called. On old boards the power rails of old boards are not removed
completely. This CL ensures the AP is warm-reset after EC is reset.
BUG=None
BRANCH=nyan
TEST=nVidia verified on old boards.
Change-Id: Ia2c2b243534d8a73b9b4d5320aad4664b1ac8b12
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179521
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Since some folks are still using old boards (rev <= 2.0), bring this back
so that they can reset system gracefully.
BUG=None
BRANCH=nyan
TEST=tested on rev 2.0
reboot // EC and AP are rebooted
reset button on board // EC and AP are reset
power off // AP (rev 2.0) is expected NOT powered off.
power on
Change-Id: I35dbc5648b092c892dc06ce5676e1e68c695d477
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179851
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is the first step of tegra power state re-factoring. Move the
power button logic to common/power_button.c.
Also, the GPIO KB_PWR_ON_L is renamed to POWER_BUTTON_L.
BUG=None
BRANCH=nyan
TEST=tested on nyan rev 3.12,
reboot: PASS, power on 2
power off / power on: PASS, power on 5
lid close / power off / lid open: PASS, power on 3
button on / off: PASS, ending loop 3, power on 4
power off / button on: PASS, ending loop 4, power on 4
button off / power on: PASS, ending loop 3, power on 5
button off / lid open: PASS, ending loop 3, power on 3
Change-Id: If07806b9c11cdba2b478a9a74d2b75be1d9f7acf
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179451
Add a new pin PMIC_THERM_L (PA1) since AP_RESET_L (PA15) is removed.
To force shutdown, drive PMIC_THERM_L to low (default high) for 32us.
Also rename set_pmic_pwrok() -> set_pmic_pwron(). And add a debounce time
for PMIC_PWRON_L pin.
BUG=chrome-os-partner:24206
BRANCH=nyan
TEST=Verified on the frank's rework board.
'power off' shutdowns the AP immediately.
'reboot' reboots the EC and resets the AP as well.
'sysjump RW' still keeps AP alive.
Change-Id: I8643e19081a824e1f6adc812dfad0269222db8ea
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178631
The worst case of the ONKEY long press timeout of AS3722 PMIC is
10.08 seconds, according to AMS. Increase of such timeout defines
to 10.2 seconds.
BUG=nvbug 1372063
BRANCH=nyan
TEST=verified on Venice2 boards that were failing to turn off power
with 9 seconds timeout
Change-Id: I65c8ebaab0523874ceff621cdbda72d8b44f4864
Signed-off-by: Yen Lin <yelin@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/177611
Reviewed-by: Randall Spangler <rspangler@chromium.org>
These boards are unloved and unsupported. They'll never grow up to be
laptops, and hardware is increasingly hard to come by.
Comparable functionality is available in the other, more-loved boards.
Removing these boards speeds up util/make_all.sh by 40%. (If you're
not running that before every upload, you should be...)
BUG=chrome-os-partner:24062
BRANCH=none
TEST=build all remaining platforms and pass unit tests
Change-Id: I4d8a49e4d52d7393471f1b1cbef059c8db4a4f77
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177373
This gives the AP a chance to reboot, before the EC kills it by dropping rails.
BUG=chrome-os-partner:24120
BRANCH=none
TEST=on AP, write 0xe to 0xcf9; system should reboot instead of shutting down
Change-Id: I322a1193e90b4de37a4adaf547e1c6bf5be077c3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177305
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Poll down AP_RESET_L pin to shutdown AP immediately, instead of
press the power button for 8 secs.
BRANCH=nyan
BUG=chrome-os-partner:23895
TEST=verified on nyan board 2.0 with follwoing tests:
power off / power on: PASS. Tested 5+ times.
lid close / power off / lid open: PASS. Tested 5+ times.
button on / off: PASS. Test 5+ times. ~20% not boot (HOLD=1).
power off / button on: PASS. Tested 5+ times.
button off / power on: PASS. Test 5+ times. ~60% not boot (HOLD=1)
button off / lid open: PASS. Test 5+ times. ~40% not boot (HOLD=1)
Change-Id: Iecc97f38ac7bd923745994594356029836d7b4e6
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177241
Added low power idle functionality to rambi but left it off by default.
To turn it on, define CONFIG_LOW_POWER_IDLE in rambi's board.h file.
BRANCH=none
BUG=chrome-os-partner:23947
TEST=Verified that the EC does not go into deep sleep when in S0, and that
it does go into deep sleep in S3, S5, and G3. Tested to make sure that
flashec works when the EC is in low speed deep sleep. Also verified
that the EC console times out after the timeout period and that it wakes
up on the next command. Did not measure power usage.
Change-Id: I0ab1a2dc7ca7ae4577fe5d0894c1bf82205dfea6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176159
Reviewed-by: Todd Broch <tbroch@chromium.org>
The XPSHOLD is not floated. It connects to +1.8V_VDDIO, which indicates
high when AP is on. So, bring it back.
Also remove the duplicated GPIO definition (GPIO_PWR_LED1).
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
BUG=chrome-os-partner:23929
BRANCH=nyan
TEST=verified on nyan. successfully boot up the machine.
Change-Id: I293a899bcdf255f36f6117627f66ed8231c9a70f
Reviewed-on: https://chromium-review.googlesource.com/176046
Reviewed-by: Yen Lin <yelin@nvidia.com>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Commit-Queue: Yung-chieh Lo <yjlou@chromium.org>
Tested-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Refine the GPIO list according to the schematic. Comment out the XPSHOLD in
power/tegra.c for compiling. Will fix later.
BUG=None
BRANCH=None
TEST=emerge-nyan chromeos-ec &&
make runtests -j 32 && make BOARD=nyan tests -j 32
Change-Id: Id0d682fd5d48e8a8a07785e86c07f45f07d866ab
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175534
Update comments with more info, or remove if no longer applicable.
No code changes.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: I5b56eeb500bc0f00e84e91ef99684f4b1b310972
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175418
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
