The recovery pin input from servo is open drain and needs
an internal pullup enabled so it is not always low.
BUG=chrome-os-partner:19398
BRANCH=none
TEST=manual: ensure rec_mode can be turned off
$ dut-control rec_mode:off rec_mode
rec_mode:off
Change-Id: I387a53eb5b64bb0bf3a87fc47b5cca9b2063f6a9
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50993
Slippy uses UART2 instead of UART1 and so the EC needs
to be able to tolerate having the host use a different
interface. There are of course many ways to accomplish
that but this approach adds two config variables to specify
the host uart and the host uart irq.
The UART port setup is split out to allow them to be
configured separately rather than needing to be adjacent
in a for loop.
The interrupt functions were renamed (to ec and host) in
order to indicate which interface they are responsible for.
BUG=chrome-os-partner:19356
BRANCH=none
TEST=boot slippy and see host serial output
Change-Id: I1913ff3d650f329224c9654eee7bb7412fae5402
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50837
SPI is always enabled on pit, so remove #ifdefs
SPI1_CLK was aliased to AC_STATUS, which is left over from snow and
doesn't exist on pit. That caused it to be driven high briefly during
EC boot.
Also set SPI pins for 40MHz speed so we can try faster SPI clock.
BUG=chrome-os-partner:19304
BRANCH=none
TEST=boot system; sspi 2:0 256 9f prints a bunch of FDs then FEEC010001
Change-Id: I10352cff3669d6a087939d9d8e302d70708e9ee3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51023
Reviewed-by: Doug Anderson <dianders@chromium.org>
This is causing the host to reset because this pin is
going low when it is left as open drain, despite having
a 3.3V pullup.
BUG=chrome-os-partner:19355
BRANCH=none
TEST=manual: boot on slippy without RCIN# causing reset
Change-Id: I59e9316e85ce618edc84c7dd988d70ea4de1e71a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50836
I've simplified the SPI module, since we only ever use SPI1 (and there
were already a number of places which assumed this was true).
Somewhere along the way I fixed a number of problems keeping the code
from compiling and working on STM32L. The code isn't currently used
anywhere else, but should still work there (that is, I don't think I
broke it working on STM32F if you re-enable it on some STM32F
platform).
BUG=chrome-os-partner:19073
BRANCH=none
TEST=from u-boot console, sspi 2:0 64 9f0000
u-boot prints: FDFDFDFDFDFDFDFD
ec prints: [193.740912 HC 0x9f][193.741141 HC err 1]
[sjg: gpio optimization back in for now]
[dianders: add comment as rspangler requested; update SOBs]
Change-Id: Ib9419403e4e44dadc1f17681e48401882cb49175
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49684
This is the first version of pthread-based RTOS emulator. With this, we
will be able to test high-level modules entirely on the host machine.
BUG=chrome-os-partner:19325
TEST='make runtests' and see tests passing.
BRANCH=None
Change-Id: I1f5fcd76aa84bdb46c7d35c5e60ae5d92fd3a319
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49954
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This specifies the Slippy GPIOs. Because the power controls are completely
different from Link, we have to gut the power sequencing task to do nothing.
For bringup and test, we'll just manually set and get the GPIOs until we
know exactly what we need to do.
This is where the fun starts...
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Built everything, Link still works.
Change-Id: Ic1ce1d4085298f49dd98d99e81e04835eca5f11c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50004
Temp sensors, I2C devices, ADC inputs, and keyboard GPIOs are all different.
This removes the things we don't need, connecting some of the things we
will.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=none
Doesn't break Link.
Change-Id: Ifb9775d921f6e9952497bffa98d405353ed4df71
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49964
Reviewed-by: Randall Spangler <rspangler@chromium.org>
1) Port needs to be open-drain. Missed this when porting from STM32F
because open-drain and alternate function are set in the same register
on STM32F and are different regs on STM32L.
2) Queue a stop condition if a transaction failed, so the clock goes
back high.
BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan finds both the PMU at 0x90 and the battery at 0x16
Change-Id: I708b925e4e30da9d5864b74641b1cbe90c9313fe
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49898
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Also renaming to avoid confusion as to what's being charged.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Build everything, Link still works.
Change-Id: I4205a1210c7dfe57cfbbdd740970ef57e6a011b8
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49775
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Now that I2C works, we can re-enable the charging task to debug
battery charging.
BUG=chrome-os-partner:18657
BRANCH=none
TEST=in EC log, should see battery state messages
Change-Id: I600d0152ba416c13420ce853b55206afba9f6cec
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49649
The voltage rails, inputs, and sequencing is completely different. Easiest
to just handle it separately for each chipset.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Built Link, still works.
Change-Id: Ibf26ef47cdf2284b7bfb3a2e5ccfb6841aba5ac6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49559
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Also moves the handy i2cscan command to i2c_common. The
platform-dependent interface is now i2c_xfer().
Still more to do in follow-up CLs; for example, i2c_read_string() has
platform-dependent implementation, and the i2c/i2cread console
commands aren't common yet.
BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan on link, spring
Change-Id: Ia53d57beaa157bece293a4262257e20b4107589e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49492
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Daniel Erat <derat@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
Sadly, the existence of fans may not always imply the existence of keyboard
backlights.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Use the Link EC console to make sure that both functions still behave.
faninfo
fanset 4400
faninfo
fanset 9999
faninfo
autofan
faninfo
fanduty 50
faninfo
fanduty 100
faninfo
autofan
kblight 0
kblight 100
kblight 50
kbligth 100
Change-Id: I2e07cd46c21bce2d0d4162275a8ea6ae40135e96
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49355
I2C communication doesn't work on pit yet, so the charger task is
spewing errors to the console. This change allows the task to be
disabled cleanly on pit, and has no effect on other platforms.
BUG=chrome-os-partner:18657
BRANCH=none
TEST=build all platforms and see that charger task is still compiled
everywhere but pit
Change-Id: I788e817d5630fb1a28694819f4ef9948a503a744
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49344
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The power button code is platform-independent. This change splits the
code out of the LM4 switch.c module so that a subseqent change to
STM32 platforms can start using it.
BUG=chrome-os-partner:18945
BRANCH=none
TEST=manual
1. Power+refresh+esc goes to recovery mode,
2. Press power button at recovery screen turns off.
3. With system off, power button turns system on.
4. Press power button for a second; screen locks.
5. Press power button while typing; blocks keystrokes while it's pressed.
6. Hold power button down for 8 sec; system forced to shutdown.
7. From EC console, with system on:
hostevent clear
hostevent -> event 0x04 is clear
press power button
hostevent -> event 0x04 is set
8. From EC console, with system off:
powerbtn -> system turns on
powerbtn 5000 -> system turns off, just like power button was held for 5 sec
Change-Id: If2a9b02514a201e1d03c857d128e2ccab51a16ef
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49217
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This just copies the board/link stuff into board/slippy (with one formatting
tweak to pass the presubmit check). It builds, but of course is useless.
Customization will follow later.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
cd src/platform/ec
make BOARD=slippy
Change-Id: I2ba62812d9199eec776f9da6732921c6281762ab
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49130
Reviewed-by: Randall Spangler <rspangler@chromium.org>
These should be specific to the lm4's lpc.c, not the board.
BUG=chrome-os-partner:18343
TEST=build all, run link
BRANCH=none
Change-Id: Ie02bbd3cf90f09035d302f5dcaad4d33f4ef9e7c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49101
CONFIG_ macros should be set directly. Expanding the task names in the same
way made it difficult to tell what was a configuration choice and what was
due to changes in ec.tasklist
BUG=chrome-os-partner:18343
TEST=build all, run link
BRANCH=none
Change-Id: Ib82e34f974238ee2dd216f33b701b6f4c6a4f1f1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49098
Reviewed-by: Randall Spangler <rspangler@chromium.org>
UART0 is the EC console, and it's consistent.
UART1 is the AP console that we export via servo. It was connected to a
different set of GPIOS on the BDS.
BUG=chrome-os-partner:18343
TEST=build link, bds
BRANCH=none
Change-Id: Ib4c10fd4d2b7a8ffb4e41e216528d4760ba50de3
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48975
Reviewed-by: Randall Spangler <rspangler@chromium.org>
STM32-based platforms now use the same lid debouncing code as
LM4-based platforms, generate lid-open / lid-closed events, and
trigger lid-change hooks.
This is needed for disabling keyboard scanning when the lid is closed,
as well as future changes to mask off wake events when the lid is
closed.
BUG=chrome-os-partner:18896
BRANCH=spring
TEST=build all platforms; check that spring boots when lid is opened
Change-Id: I09a6e91119c3739297fe49b7eacac6efda988284
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48924
Reviewed-by: Vic Yang <victoryang@chromium.org>
By default it's not, but if you #define CONFIG_CUSTOM_KEYSCAN, you can add
your own settings in board.c
BUG=chrome-os-partner:18343
TEST=build link, bds
BRANCH=none
Change-Id: I2a9dd48fd7f4610bc39dcc59e59a3fedec539e28
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48994
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Link uses LID_SWITCH_L but it means the same thing as LID_OPEN. Changing
it to LID_OPEN so that all boards use the same name.
No functional changes, just renaming.
BUG=chrome-os-partner:18343
TEST=build link, bds
BRANCH=none
Change-Id: I74893e1365ad3068f13e7fe948f1a54c6c6301bb
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48893
Reviewed-by: Randall Spangler <rspangler@chromium.org>
There is a 4% difference between the kernel's view of battery level and the
actual battery level, to give userspace a chance to shut down cleanly. The
EC should turn the lightbar red when the battery drops below 10%, so this
change makes that happen when the kernel says it's 10%, instead of the real
10%.
Note: We don't have to cherry-pick this to the Link branch. Although it
affects the EC, we already patch the EC lightbar parameters at boot and
that's done in userspace.
BUG=chromium:225500
BRANCH=none
TEST=manual
Unplug Link, let the battery run down. The lightbar should pulse red when
the battery level reported by the UI drops to 9% (there may be a little
delay due to rounding). Note that it's only red when on battery.
Change-Id: If3d335c54ceb37c86da59e4a66f8ecd46ce15664
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48904
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is now consistent with other boards.
No functional changes, just renaming,
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build link, bds
Change-Id: Ifd7c1ec608ab61f5f66800e91803ffafe1d944b6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48804
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Pit uses GPIO PA2=TIM2_CH3 instead of Snow's PB3=TIM2_CH2. Other than
that, the timer setup is identical (STM32F and STM32L are compatible
in this respect, anyway).
BUG=chrome-os-partner:18657
BRANCH=none
TEST=build snow, pit; no pit boards to test on yet
Change-Id: I8ba68f99641038e12c9a9c9dd29e3b64410a5eef
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48403
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
No need for it to be a separate file.
Just moving code, no functional changes.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build link
Change-Id: I25f84c73401929bce4ac76ebdcf6c86ad4852594
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48684
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Add a function which handles translation of PWROK from logical level
to physical level.
Also implement chipset_force_shutdown() in gaia_power.c, so PMU code
doesn't need to know about PWROK physical level.
BUG=chrome-os-partner:18738
BRANCH=none
TEST=build all platforms; boot spring
Change-Id: I360266ef89b6ead49a633cd57b7530f791b04c9e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48251
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The latest schematics move a few signals between GPIOs. Update the
GPIO map to match.
BUG=chrome-os-partner:18657
BRANCH=pit
TEST=build pit (can't test the binary yet; no hardware)
Change-Id: I2d135412723fbe5cf4e7c1dbeb05fc68e6bb8c9e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48231
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This is left over from when we had a pair of macros for each GPIO
register, one which concatenated its base address name and one which
took a base address. Only the latter has survived, but its naming is
longer than it needs to be and isn't consistent with other register
banks (USART, TIM, etc.).
No code changes, just renaming macros.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I15a282fd01db2a25219970e28ce551d8dc80193f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48226
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
gpio_set_level() now allows setting the pin level if GPIO_LOW or
GPIO_HIGH is specified. Previously, stm32 platforms did this even
though the definition of gpio_set_level() said it wouldn't work.
Fixed gpio_set_level() not setting level after warm reboot on stm32
because it was checking the GPIO_DEFAULT flag in the wrong place.
Fixed LM4 still mucking with alternate function settings and levels
even if GPIO_DEFAULT was specified.
And checked gpio_list[] and all of the calls to gpio_set_flags() to
make sure everything still behaves the same way it did before (or
better, in the case of actual bugs).
BUG=chrome-os-partner:18718
BRANCH=none
TEST=build all platforms; boot spring and link
Change-Id: I4b84815f76060252df235ff9a37da52c54a8eac5
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48058
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Now pingpong and mutex tests compile. Still need some more work to
handle the i8042-specific KEYPROTO task for keyboard tests.
BUG=chrome-os-partner:18598
TEST=Build tests for link
BRANCH=None
Change-Id: I9ee35d4edb811f17b9a81beb799484a07c0bef14
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47981
The MODER register is used to set (alt-func | analog | gpio-in |
gpio-out). So there's no need to force things to be normal GPIOs in
board config, since gpio_pre_init() will clear the alternate
function-ness as part of setting the GPIO direction.
BUG=chrome-os-partner:18657
BRANCH=none
TEST=build pit and test-boot on daisy
Change-Id: I82db9d9f4d8877464d62c1ff2efaef36822fc0ca
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47904
For most tests, we don't need to power the AP. Let's exclude chipset
task to save memory space.
BUG=chrome-os-partner:18598
TEST=Run pingpong test on Spring
BRANCH=none
Change-Id: I545c5b3e1c27b0067d4ffe09a7971d32b75d6039
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47833
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Make internal APIs static, and remove board_ prefix for clarity.
Move TSU6721 calls from charger task to extpower_usb functions for
better encapsulation.
No functional changes, just moving code. Yes, this will make
cherry-picking back from spring to TOT less convenient, but now the
code is more readable and it will make maintaining the PMU code easier
as we add boards.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build spring
Change-Id: I52b37e57fc8519859996a110b0503277c6f0bbc8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47657
This only needs to be defined if CONFIG_USB_CHARGE is defined (that
is, if the board has a USB charge controller.
(Note the difference between providing power over USB vs. receiving
power over USB; the names are confusing and I'll rename one of the two
imminently.)
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I7355b4248bb2d4f5f71cc9f8d9d8f9d6c0069f2b
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47658
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This changes current TASK() syntax to TASK_BASE() and TASK_NORMAL(),
where TASK_BASE is necessary for the EC to boot on a board and
TASK_NORMAL represents the task that can be removed in a test binary.
Tasks introduced by a test should be listed as TASK_TEST().
Note that this CL breaks current tests (many of them are broken anyway),
which will be fixed in up coming CLs.
BUG=chrome-os-partner:18598
TEST=Build link/bds/spring/snow/daisy/mccroskey. (mccroskey failed for
unrelated issue)
BRANCH=none
Change-Id: Ic645cdae0906ed21dc473553f1f43c2537ec4bb9
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47531
This more clearly indicates what it does - it manages external power
supplied by USB. This code will be common to multiple boards which
take power via USB, so it might as well move now.
No code changes, just moving the file.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build spring
Change-Id: Iae74122db38666bc346104a5096fa82df8cb0c19
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47656
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
GPIO mapping is correct for current schematics.
Things to fix are #ifdef'd out with PORT_TO_PIT, but those require
changing other files (which is most tidily done in separate CLs).
BUG=chrome-os-partner:18657
BRANCH=pit
TEST=build pit (can't test the binary yet; no hardware)
Change-Id: Id1d1bb0c2925cfc0c21ee2d91666028aa6d2a707
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47599
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Much of the board init duplicated stuff already done in gpio init, so remove it.
Powering the SPI module should be done in spi.c, not board.c.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; boot EC on daisy
Change-Id: I9a99eeeb971ebbf7de5b9c0548153684fbb7fff6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
And remove the daisy power button LED task for now. Since daisy
didn't have a board.c implementation (or a power button LED), its
power LED task did nothing.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build daisy, snow, spring
Change-Id: I1eb3d0bd038d88685e7caad087eb1a1d1495ef9a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47442
Reviewed-by: Vic Yang <victoryang@chromium.org>
Board configuration interfaces are now defined in board_config.h, not
in every board.h file.
Tidied /alphabetized CONFIG defines.
No functional changes, just rearranging code.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all targets
Change-Id: I6196591784f8fa9ce6dfccd31891b679fb200063
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/47419
