KBD_IRQ_NEW_L (added for Rambi 2.0) has a pull-up resistor and should be
open drain.
TEST=None
BUG=chrome-os-partner:24760
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ibf1beff3306c074f9f135b1bee82e299edf2380b
Reviewed-on: https://chromium-review.googlesource.com/181227
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Old code reset some GPIO configurations with af->flags = 0 while
gpio_config_module(). This is bad because it could lead unexpected
behavior on the bus.
New code accepts GPIO_DEFAULT flag so that it doesn't touch the
GPIO setting while configuring alternate functions. This should not
effect other boards unless the GPIO_DEFAULT is set on that board.
BUG=chrome-os-partner:24607
BRANCH=nyan
TEST=run on nyan rev 3.12. No "SPI rx bad data" at boot. UART and i2c good.
Change-Id: Id451cfae21e1d764452429dc5adfe1317ff5b140
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181135
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Follow up Randall's CL 616e709. Note that the nyan warm reset is in
another CL.
BRANCH=nyan
BUG=chrome-os-partner:24558
TEST=See test procedure and results on comment #7 of issue 24558.
Note that the suspend tests cannot be done because my nyan cannot suspend.
Change-Id: I77c59cab177bc2c6fdf9bb8828937fc7b84e6d76
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181177
Reviewed-by: Randall Spangler <rspangler@chromium.org>
ADC driver for MEC1322 with ADC interrupt support.
BUG=chrome-os-partner:24107
TEST=Read single channel
TEST=Read all channels
BRANCH=None
Change-Id: I89d196c7fd78e736575e2c368b65cfb1ec651004
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180832
This lowers, the WARN, HIGH, and HALT temp thresholds
for x86 boards to below their CONFIG_PECI_TJMAX value.
Also lowers the FAN_MIN and FAN_MAX temps by 5 degrees on
Haswell boards to compensate for lowering TJ_MAX by 5 degrees
in an earlier patch.
BUG=chrome-os-partner:24455
BRANCH=none
TEST=Manual. Run boards without a fan and without any host-side
throttling. Verify that board either reaches a steady state temp
due to throttling or hits SHUTDOWN and turns off before EC reset
is triggered.
Change-Id: I499baa0b4100201525e69752af3465feb592262c
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179886
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
AP throttling in the thermal task ends up calling a pretty deep nested
set of calls, and in the worst case can overflow the stack. Bump up
the stack size for the hook task on x86 platforms to compensate.
BUG=chrome-os-partner:24536
BRANCH=peppy/falco
TEST=taskinfo shows hook task increased from 512 to 640 bytes stack
shmem shows at least 4000 bytes free
Change-Id: I63da7c47b993c935d895f91d787844655071da0d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180684
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
So that Tegra wants to drive the PMIC_WARM_RESET_L low it will not be
fighting the EC.
BUG=None
BRANCH=None
TEST=Verified on the board rev 3.12
Change-Id: I5980a3ba096c152a4ccc28ad64e675c53b7cb337
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180520
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This make minor syntactic changes and renames some camel-cased symbols
to keep checkpatch from complaining. The goal is to reduce the
temptation to use 'repo upload --no-verify'.
This is a big furball of find/replace, but no functional changes.
BUG=chromium:322144
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180495
SOC_OVERRIDE now drives a FET, so the signal is inverted (high=active,
not low). EC must drive it push-pull because there is no
pullup/pulldown on the input to the FET.
BUG=chrome-os-partner:24118
BRANCH=none
TEST='gpioget' shows signal is 0 by default, not 1.
Change-Id: I8a86587c7fad8bf5a583cd3976bd6ed3069f2975
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180287
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Proto 2.0 makes these changes:
KBD_IRQ# moves from PM4 to PM3.
EC_PWROK moves from PH2 to PJ1.
Since PM3 and PJ1 are unused on proto 1.5, it's harmless to duplicate
the current functionality on those outputs. We can remove the old
outputs when we deprecate the 1.5 boards.
BUG=chrome-os-partner:24424
BRANCH=none
TEST=boot rambi
Change-Id: Iff77651ef575a8405878fe75f025a0507b02b771
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180081
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This wires 0x62/0x66 to ACPI module and also implements the host event
functions.
BUG=chrome-os-partner:24107
TEST=ACPI memory test and compliment memory test.
TEST=Set SCI mask and host event to trigger SCI. Check SCI pin pulse
low.
TEST=Query host event from ACPI.
BRANCH=None
Change-Id: Ib1f557e995a861c92a603491229ad361e17d2129
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179942
Reviewed-by: Randall Spangler <rspangler@chromium.org>
New boards (rev >= 2.2) are not affected since chipset_force_shutdown()
is called. On old boards the power rails of old boards are not removed
completely. This CL ensures the AP is warm-reset after EC is reset.
BUG=None
BRANCH=nyan
TEST=nVidia verified on old boards.
Change-Id: Ia2c2b243534d8a73b9b4d5320aad4664b1ac8b12
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179521
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This adds keyboard scan module driver. Keyboard scan task is not enabled
yet as the LPC layer is not finished and thus i8042 protocol cannot be
enabled.
Since KSO00-KSO03 are used as JTAG, we use KSO04-KSO16 so as to preserve
JTAG functionality. Unfortunately we don't have enough KSO pins, so
trace debug port must be disabled, as done in this CL.
BUG=chrome-os-partner:24107
TEST=Set 'ksstate on'. Short KSI pins and KSO pins, and see
corresponding key shown as pressed.
TEST=Check keypress is detected when console shows 'KB wait'.
BRANCH=None
Change-Id: I366a27453ef95030d251e525313eb4627eb4340f
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179319
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:24455
BRANCH=none
TEST=Manual: Verify that CONIFG_PECI_TJMAX set per-board matches
the value queried over the PECI bus with the restricted
"peciprobe" command.
Change-Id: I8e99a23a66f26d6101e01cc751d0a8ca79686321
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179682
Reviewed-by: Alec Berg <alecaberg@chromium.org>
On older boards (< Rev2.2), AP_RESET_L was connecting to PMIC reset pin.
However, after 2.2 we use the PMIC_THERM pin instead. Thus, change this
pin to pull high for old boards. T\Otherwise cannot boot up.
BUG=None
BRANCH=nyan
TEST=verified on old board by nvidia.
Change-Id: If4dccaf0bd0671c55b0d703d4d4b16a2b9c4f543
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179377
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is the first step of tegra power state re-factoring. Move the
power button logic to common/power_button.c.
Also, the GPIO KB_PWR_ON_L is renamed to POWER_BUTTON_L.
BUG=None
BRANCH=nyan
TEST=tested on nyan rev 3.12,
reboot: PASS, power on 2
power off / power on: PASS, power on 5
lid close / power off / lid open: PASS, power on 3
button on / off: PASS, ending loop 3, power on 4
power off / button on: PASS, ending loop 4, power on 4
button off / power on: PASS, ending loop 3, power on 5
button off / lid open: PASS, ending loop 3, power on 3
Change-Id: If07806b9c11cdba2b478a9a74d2b75be1d9f7acf
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179451
This adds the driver for MEC1322 I2C controller.
BUG=chrome-os-partner:24107
TEST=Hook up TSU6721 to eval board. Do the following tests:
- 'i2cscan' and see TSU6721.
- Read device ID register and get correct value.
- Add 3 tasks randomly doing I2C read and writes. Check there is
no error.
BRANCH=None
Change-Id: I465f73fe8177a8df6b56c57e594cd733caea37d4
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178591
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add a new pin PMIC_THERM_L (PA1) since AP_RESET_L (PA15) is removed.
To force shutdown, drive PMIC_THERM_L to low (default high) for 32us.
Also rename set_pmic_pwrok() -> set_pmic_pwron(). And add a debounce time
for PMIC_PWRON_L pin.
BUG=chrome-os-partner:24206
BRANCH=nyan
TEST=Verified on the frank's rework board.
'power off' shutdowns the AP immediately.
'reboot' reboots the EC and resets the AP as well.
'sysjump RW' still keeps AP alive.
Change-Id: I8643e19081a824e1f6adc812dfad0269222db8ea
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178631
This adds the driver for PWM duty cycle based and RPM based fan control.
BUG=chrome-os-partner:24107
TEST='fanset 5000' and fan spins up.
'fanset 8000' and fan spins faster.
'fanset 0' and fan stops.
'fanduty 30' and fan spins up.
'fanduty 50' and fan spins faster.
'fanduty 30' and fan slows down.
'fanset 6000' and fan goes to ~6000 RPM.
Unplug fan power and see 'fan 0 stalled'.
Plug power back and doesn't see stall warning anymore.
BRANCH=None
Change-Id: Ice3e5c03686cde57894e888e34ae2070c33b4e4d
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178402
With this, basic host command functionality is working.
We don't have the correct description of LPC memory BAR register yet, so
we have to use EMI (embedded memory interface) module for 0x800-0x9ff
region. This requires a slightly different protocol, which is in the
next CL.
BUG=chrome-os-partner:24107
TEST=Wire EVB to Stumpy. 'ectool hello' and 'ectool version' working.
BRANCH=None
Change-Id: I873b4a455cf692e479321a5c6e18c8f33df60e66
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178250
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Nyan EC supports 2 different boards: Venice2 and Norrin. Venice2
uses 2S battery, and Norrin uses 3S battery. This CL is to support
2 different battery types (2S or 3S) automatically at init time by
reading battery's MANUF_NAME, DEVICE_NAME and DESIGN_VOLTAGE from
Smart Battery Interface to determine which battery type to use.
To workaround the problem that battery may not be attached at init
time, a patch is added to call battery_get_info() in PWR_STATE_INIT
state to get the current battery info. Note the battery info is only
determined once.
BUG=none
BRANCH=nyan
TEST=tested on Vencie2 with 2S battery and on Norrin with 3S battery
attached at init time and made sure correct battery info are
installed;
tested on Venice2 and Norrin without battery at init time, then
attached 2S or 3S battery and made sure correct battery info are
installed.
Change-Id: I135909c7fe1e1dfdb0f706e0eadba6e904b6221e
Signed-off-by: Yen Lin <yelin@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/178088
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This allows boards to detect the battery and return the correct temp
ranges, which will be needed for upcoming boards.
In the board-specific implementations, it's pretty much just moving
the fields from one const struct to another, so the impact is minor.
BUG=chrome-os-partner:24310
BRANCH=none
TEST=build all platforms; verify pit and rambi still charge
Change-Id: I7be075b3abb4039577f6362316adc1860c121d5c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178424
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Due to the way wireless_enable works this was resulting in
WLAN_OFF_L going low briefly on S0->S3->S0 transitions.
BUG=chrome-os-partner:23752
BRANCH=none
TEST=emerge-samus chromeos-coreboot-samus
Change-Id: I4bb02b6e9acf97d501af8c40c455c9f88ffe35ee
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178422
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The charge state machine asks for all of this stuff at the same time
anyway. Bundling it into a single function removes a number of
redundant (and painfully slow) I2C reads.
Also refactor the battery debug command so it doesn't have so many
local variables all in one function; it was consuming considerably
more stack space than any other debug command.
Spring still needs low-level access to the smart battery, so move the
two functions it needs directly into the Spring implementation.
BUG=chrome-os-partner:20881
BRANCH=none
TEST=charge/discharge rambi, pit and spring; watch debug messages and
LED and output of 'battery' debug command. All should behave the
same as before. Then run 'taskinfo' and see that the console task
has at least 20 bytes unused.
Change-Id: I951b569542e28bbbb58853d62b57b0aaaf183e3f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177797
If CONFIG_WATCHDOG_HELP is defined, a 16-bit timer is used as an
auxiliary timer to interrupt us 50ms before the watchdog expires. When
the auxiliary timer expires, the stack trace is printed. Watchdog then
expires 50ms after and reboots the system.
BUG=chrome-os-partner:24107
TEST=Define CONFIG_WATCHDOG_HELP, and see stack trace on 'waitms 2000'.
TEST=Undefine CONFIG_WATCHDOG_HELP, and check watchdog still works
without printing stack trace.
BRANCH=None
Change-Id: I2555d3f86a15c83bb03a00c6807f77d9dddaf333
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178284
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This implements the basic watchdog support. For now, the watchdog
doesn't warn us before it expires. This functionality will be added
later using a basic timer.
BUG=chrome-os-partner:24107
TEST='waitms 700' and the EC stays alive.
TEST='waitms 1200' and the EC reboots.
BRANCH=None
Change-Id: I1cc48978ed09577ae88cc2f7a6087867e5854973
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177736
The gpio table had the wrong pin assigned to
PP3300_LTE_EN. It should be D4 instead of D2.
BUG=chrome-os-partner:24201
BRANCH=None
TEST=Built and booted. Stuff shows up on lsusb, and I can confirm
3.3V on the bulk caps of the IO board.
Change-Id: I574599645ce21c175346e2ecde35b974aa0b68f7
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177694
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
If EC_BL_OVERRIDE is low, backlight will be turned off. To allow AP to
control backlight, set EC_BL_OVERRIDE to high.
BUG=none
BRANCH=nyan
TEST=verified on nyan board 2.0 to see backlight turns on when system
boots up
Change-Id: I04e6052fbef4b17c3f9566c8c5cf691a2710b7b0
Signed-off-by: Yen Lin <yelin@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/177553
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
These boards are unloved and unsupported. They'll never grow up to be
laptops, and hardware is increasingly hard to come by.
Comparable functionality is available in the other, more-loved boards.
Removing these boards speeds up util/make_all.sh by 40%. (If you're
not running that before every upload, you should be...)
BUG=chrome-os-partner:24062
BRANCH=none
TEST=build all remaining platforms and pass unit tests
Change-Id: I4d8a49e4d52d7393471f1b1cbef059c8db4a4f77
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177373
The rambi board has issues using the SERIRQ method
for triggering the keyboard IRQ. Namely, the current
level-shifter in place for the bidrectional SERIRQ
signal introduces delay resulting in the SERIRQ
being out of phase with the clock. Moreover, there
appears to be a mismatch of expectations with the
number of start frames on the SEIRQ line. Bay Trail
uses a fixed 8 while the TI docs suggest it only
supports 6.
BUG=chrome-os-partner:23965
BRANCH=None
TEST=Built and booted rambi with keyboard working in
kernel with interrupts.
CQ-DEPEND=CL:177223
Change-Id: I05c2b113d801b3fc434a402620cebae0301839f2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177189
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is the initial commit of mec1322 support. This includes:
- Basic GPIO driver. Interrupt not supported yet.
- Microsecond timer
- UART driver
The script to pack the firmware binary will be checked in in
following-up CL.
BUG=chrome-os-partner:24107
TEST=Build and boot on eval board
BRANCH=None
Change-Id: I9013c908049d1f740f84bb56abca51b779f39eef
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175716
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The keyscan task is short enough on stack space that turning on
keyboard debugging causes a stack overflow. This was previously not
the default, but https://chromium-review.googlesource.com/#/c/174373/
made it the default. Reverting that change just masks the problem;
enabling keyboard debugging on Spring would still cause a stack
overflow.
Rather than reverting that change, increase the stack size of the
keyscan task so that it doesn't overflow. There is sufficient space
to do this. Even after increasing the keyboard stack from 256 bytes to
320 bytes and doing a 'sysjump rw' to force jump tags to populate,
'shmem' reports 132 bytes free.
BUG=chrome-os-partner:23834
BRANCH=none
TEST=Boot Spring.
ksstate on
Bang on keyboard for a bit
taskinfo -> shows KEYSCAN task at 292/320 bytes free
sysjump rw
shmem -> shows 132 bytes free, 0 used
Change-Id: Idf9fdce5b9e6ca4d05d80a62ae9ea831ed508e3a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177355
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For some reason the SCI# is not working properly when the
LPC module controls the pad. Instead, utilize CONFIG_SCI_GPIO
option and put that GPIO pad into open-drain mode.
BUG=chrome-os-partner:24003
BRANCH=None
TEST=Built and booted rambi with dependency change. 'lidclose' and
'lidopen' cause ACPI interrupts.
Change-Id: I5df455bc2fc9af4c43517a93c5a35dc598fd54e9
Reviewed-on: https://chromium-review.googlesource.com/176805
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
The ACOK buffer from EC to PCH was not being triggered when
the chipset powers up or down, instead it was only triggering
when AC state was changed.
Since we want it to be driven in S5 I added HOOK_CHIPSET_PRE_INIT
to the power sequence in the G3S5 state transition.
BUG=chrome-os-partner:23752
BRANCH=none
TEST=power on samus proto1b with AC inserted and see PCH_ACOK
go high, power off and see it go low again. Ensure that it is
also changed with AC state transitions.
Change-Id: I4cbe123322e234dc07f10fd1cdff5a8b771a4e02
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176630
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The backlight_interrupt() function is defined to NULL if the magic
CONFIG_BACKLIGHT_REQ_GPIO is not defined.
Enabling that exposed an issue where the backlight workaround was
attempted in interrupt context and should instead be deferred since
it involves i2c transactions.
BUG=chrome-os-partner:23752
BRANCH=none
TEST=build and boot on samus proto1b and see recovery screen
Change-Id: Id1377033c791a5c279fdb4faeecc4b2c0d142eaa
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176514
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
In board.c, we initialize this struct:
struct i2c_port_t {
const char *name; /* Port name */
int port; /* Port */
int kbps; /* Speed in kbps */
};
extern const struct i2c_port_t i2c_ports[];
The port field refers to the physical I2C bus on the EC.
Meanwhile, in board.h, we've identified the bus where each I2C device is
attached:
Up until this CL, we've been picking one of those device-to-bus macros to
initialize port fields of the i2c_ports[] array. That's wrong and confusing.
This change specifies the physical channel with the physical number.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=manual
Renaming only. There should be no change in observed behavior.
Change-Id: I5427c26290572133f060b6cf0d9ebea5015adba1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176176
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Added low power idle functionality to rambi but left it off by default.
To turn it on, define CONFIG_LOW_POWER_IDLE in rambi's board.h file.
BRANCH=none
BUG=chrome-os-partner:23947
TEST=Verified that the EC does not go into deep sleep when in S0, and that
it does go into deep sleep in S3, S5, and G3. Tested to make sure that
flashec works when the EC is in low speed deep sleep. Also verified
that the EC console times out after the timeout period and that it wakes
up on the next command. Did not measure power usage.
Change-Id: I0ab1a2dc7ca7ae4577fe5d0894c1bf82205dfea6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176159
Reviewed-by: Todd Broch <tbroch@chromium.org>
The XPSHOLD is not floated. It connects to +1.8V_VDDIO, which indicates
high when AP is on. So, bring it back.
Also remove the duplicated GPIO definition (GPIO_PWR_LED1).
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
BUG=chrome-os-partner:23929
BRANCH=nyan
TEST=verified on nyan. successfully boot up the machine.
Change-Id: I293a899bcdf255f36f6117627f66ed8231c9a70f
Reviewed-on: https://chromium-review.googlesource.com/176046
Reviewed-by: Yen Lin <yelin@nvidia.com>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Commit-Queue: Yung-chieh Lo <yjlou@chromium.org>
Tested-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This adds the driver and a console command to read an Intersil ISL29305
light sensor connected to the EC.
BUG=chrome-os-partner:23380
BRANCH=samus
TEST=manual
Run the "als" command from the EC console, while pointing the sensor in
various directions. It should give higher numbers when facing a light
source. If you get "Error 1", it means the ALS isn't powered.
Change-Id: I855ed64dab7fc60e29126ab3e97669be24dc6a64
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176056
Rambi has a 65W adapter, so shouldn't be asking for 4A @ 19V.
BUG=chrome-os-partner:23597
BRANCH=none
TEST=charger command shows I_in = 3392 mA (which is the closest step below
3.42A that the charger can set).
Change-Id: I4b044b594566a6abcb94c3f674a0d287c8fc2b30
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175611
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Refine the GPIO list according to the schematic. Comment out the XPSHOLD in
power/tegra.c for compiling. Will fix later.
BUG=None
BRANCH=None
TEST=emerge-nyan chromeos-ec &&
make runtests -j 32 && make BOARD=nyan tests -j 32
Change-Id: Id0d682fd5d48e8a8a07785e86c07f45f07d866ab
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175534
Modify board.h and board.c to describe both fans.
BUG=chrome-os-partner:23530
BRANCH=samus
TEST=manual
Power things up, poke at the fans through the EC console. Observe that
they're both working and controllable:
faninfo
fanset 0 2000
faninfo
fanduty 1 30
faninfo
fanauto 0
faninfo
fanauto 1
faninfo
Change-Id: I2ba9356f084be12dab0fe0b9a004f66feace1878
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175369
This adds explicit "int fan" args to the exported functions from
common/fan.c: fan_set_percent_needed() and fan_percent_to_rpm(). Within that
file, multiple fans are handled independently.
This is not complete, though. Host commands and sysjump support still only
handle a single fan, so at the moment multiple fans are treated identically
in those cases.
BUG=chrome-os-partner:23530
BRANCH=none
TEST=manual
All boards build, "make runtests" passes.
On a multi-fan system, the EC command "faninfo" displays multiple results:
> faninfo
Fan 0 Actual: 0 rpm
Fan 0 Target: 0 rpm
Fan 0 Duty: 0%
Fan 0 Status: 0 (not spinning)
Fan 0 Mode: rpm
Fan 0 Auto: yes
Fan 0 Enable: yes
Fan 1 Actual: 0 rpm
Fan 1 Target: 0 rpm
Fan 1 Duty: 0%
Fan 1 Status: 0 (not spinning)
Fan 1 Mode: rpm
Fan 1 Auto: no
Fan 1 Enable: no
>
and the "fanduty", "fanset", and "fanauto" all require the fan number as the
first arg:
> fanduty 0 30
Setting fan 0 duty cycle to 30%
> fanset 1 2000
Setting fan 1 rpm target to 2000
> fanauto 0
> fanauto 1
On single-fan systems, there is no visible change.
Change-Id: Idb8b818122e157960d56779b2a86e5ba433bee1b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175368
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Update comments with more info, or remove if no longer applicable.
No code changes.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: I5b56eeb500bc0f00e84e91ef99684f4b1b310972
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175418
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
- disable PP1800_PGOOD internal pullup
- add PP3300_DSW_EN control on PF6, turned on in S5 and off in G3
- change PCH_WAKE_L and PCH_PWRBTN_L to open drain signals
- add PCH_BL_EN interrupt on PM3 for rising edge to put backlight
controller into PWM mode, remove 1 second hook
- add samus-specific extpower handler for AC_PRESENT to buffer the
AC_PRESENT input to the new PCH_ACOK output on PM6. this is driven
high in S5/S3/S0 when AC_PRESENT is high, otherwise driven low.
BUG=chrome-os-partner:23752
BRANCH=samus
TEST=emerge-samus chromeos-ec
Change-Id: Ie8ab538610e41914212ee1f3a6287b63474fb85b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175281
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
No code changes, just comment fixes. Added config #ifdefs for the
debug commands as requested; they're enabled for Spring, so
functionality is unchanged.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build spring; see that ilim and batdebug commands still exist
Change-Id: I7c9f12281afa7ec68aa7e62dcfcd51682d88a16a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175216
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
