Commit Graph

1061 Commits

Author SHA1 Message Date
Vic Yang
dc4ee57307 Initialize temperature reading buffer to sane values
This is to prevent temperature value being read before the first time we
poll sensors causes unexpected error.

BUG=chrome-os-partner:12614
TEST="sysjump RW" and then "temps" immediately. Check all temperature
     readings are near 300 K.

Change-Id: I5c84d9696b4876fdfcf14c3a416cbc09c040d4ee
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/30138
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-13 23:33:44 -07:00
Charlie Mooney
847a3feca6 Lucas: Switching i2c slave-mode over to dma
There was an errata issued for the i2c on STMF100xx.  It specified that
not all guarantees apply to i2c on these chips if you are not using DMA
to load the data.  To prevent problems, I am converting the i2c code on
the EC for Lucas over to DMA.

The master functionality was already converted over in change I2fb80dcb,
this change switches over the slave-mode i2c code to also use dma now,
instead of polling, as per the errata.

BUG=chrome-os-partner:10901
TEST=The slave mode i2c code is used heavily during normal use of the
Chromebook, including boot up and using the keyboard.  Start up the cpu
uart console, and boot the system.  Then once it's fulling started, make
sure that pressing keys does not cause any errors and that the key presses
are working.

Change-Id: I8d665054bccbd3ca9b8dcc5e0fa74b2fbe49f52d
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/30024
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-08-13 15:35:16 -07:00
Duncan Laurie
3b8b1bd586 port80: Track and export last post code in previous boot
- Add a special port80 event for LPC reset assertion and use that event
to store the previous post code.
- Add a new command to retrive the last saved post code so I can easily
query it at boot/resume and log unusual codes.

BUG=none
TEST=manual (with additional coreboot/mosys changes)

- interrupt boot process by issuing x86reset on EC console or
by using warm reset button on servo
- read event log with mosys on next boot

78 | 2012-08-13 09:24:04 | System boot | 262
79 | 2012-08-13 09:24:04 | Last post code in previous boot | 0x9e
80 | 2012-08-13 09:24:04 | System Reset

Change-Id: I7b9f10442b9c468d89fde4e75adb94b0c07c2c8d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29995
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2012-08-13 14:58:38 -07:00
Randall Spangler
521e97fd13 Clean up EC hibernate logic
system_hibernate(0, 0) now hibernates until a wake pin assert, with no
RTC wake.

BUG=none
TEST=manual

command -> expected reset flags from 'sysinfo'
1. reboot -> soft
2. reboot hard -> power-on hard
3. hibernate (and press power button) -> power-on wake-pin
4. hibernate 3 (and wait for timeout) -> power-on rtc-alarm
5. hibernate 10 (and press power button before 10 sec) -> power-on wake-pin

hibdelay 10
then shut system down and run on battery
10 sec later, system should hibernate.

Change-Id: I399413d265f6fcf808adf9ed1db7b812a1b12fc2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29923
Reviewed-by: Vic Yang <victoryang@chromium.org>
2012-08-13 14:22:23 -07:00
Charlie Mooney
397a7aa336 Lucas: Switching the i2c transmit code over to dma
There was an errata issues for the i2c on STMF100xx.  It specified that
not all guarantees apply to i2c on these chips if you are not using DMA
to load the data.  To prevent problems, I am converting the i2c code on
the EC for Lucas over to DMA.

Here the i2c's master functionality is retrofitted to use DMA
instead of polling to fill the i2c buffer.  The slave functionality
is still left in the old style for the time being, but will also be
converted soon.

BUG=chrome-os-partner:10901
TEST=From EC console, make sure that "battery" and "pmu" commands work.
They both use i2c, so if i2c had been broken they would fail.

Change-Id: I2fb80dcb68632938df1c9165ebd5a67cb5194451
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29811
Reviewed-by: Simon Glass <sjg@chromium.org>
2012-08-13 12:33:32 -07:00
Louis Yung-Chieh Lo
03d4ed278d Add GEC lock mechanism.
Basically re-use the gec lock code from flashrom package.

BUG=chrome-os-partner:12319
TEST=Build and run on link. Only build on snow.
while true; do ectool hello; done &   ; run 10 instances.
                                      ; expect all instances runs okay.

Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Change-Id: I11d5824f46810c6f5a04a564a81387cdea081697
Reviewed-on: https://gerrit.chromium.org/gerrit/29763
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2012-08-10 09:28:34 -07:00
Vincent Palatin
9f0bfd4609 link: update IR3570A settings
update settings according to IR3570Axxxx_REV5_DRC_7-27-12.

This should fix the spurious UVLO during reboot,
so it re-activates the fault.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:11947
TEST=on Link EVT reworked with IR3570A, run software and check we can
reboot normally and we have no GPU warning.

Change-Id: I5882f1d25a65c81fdaa4326ead913bc080b71ee9
Reviewed-on: https://gerrit.chromium.org/gerrit/28650
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-09 19:18:20 -07:00
Randall Spangler
6cd9e1124b Add ectool command to read snapshot of EC's console output
BUG=chrome-os-partner:12483

TEST=from root shell, 'ectool console', then on the ec console, type
'help list' a few times to generate lots of debug output, then repeat
'ectool console'.  Then on EC console, 'syslock', and then 'ectool
console' should fail.

Change-Id: Ie1c74c7e35d6b8228615d20192fd90093977de64
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29825
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-09 17:40:38 -07:00
Randall Spangler
371d06bbfd Tidy shared memory module
Adds shmem command to print amount of shared memory.  This is also a
useful indicator of how much IRAM is left, since shared memory will
expand to fill all unused IRAM.

Removes never-implemented wait param to shared_mem_acquire().

BUG=none
TEST=shmem

Change-Id: I798ff644d701dcba52219b70bec99c06a23d03ec
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29809
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-09 17:40:37 -07:00
Vincent Palatin
019f50590e stm32: add wakeup from serial port as a debug feature
When STOP mode is activated, the UART is not able to wakeup the EC when
sleeping, preventing to enter commands on the EC serial console.
Allow to switch the UART RX line as a GPIO connected to EXTINT10 to
wakeup the system on incoming character.

This is just a debug feature since EXTINT10 is normally used to scan the
keyboard.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:8866
TEST=on Snow, enable CONFIG_FORCE_CONSOLE_RESUME at build time and type
"sleepmask 0" on the EC console, see I can get the serial console back
by typing a character on the serial console.

Change-Id: I936cbf13707ef8cde277f1053a4d35d23ff06511
Reviewed-on: https://gerrit.chromium.org/gerrit/29776
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-09 17:12:18 -07:00
Randall Spangler
3c708cb802 Enable PLL only briefly during ADC init
It was previously only enabled for 1500us during boot, but in a way
that triggered a needless round of notifications to other modules.
This is cleaner.

This also fixes adc_init() not initializing the task IDs to wake when
interrupts come in, and removes some unneeded code from other init
functions.

BUG=chrome-os-partner:12472
TEST=boot system and run adc command.  Should still provide reasonable data.

Change-Id: I9ae5857d988c727caf5d53f551a2f12b30974c0f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29806
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-09 14:38:16 -07:00
Randall Spangler
37470f1e77 Clear hibernate data when enabling hibernate module clock
This ensures it comes up in a known-good state.

BUG=none
TEST=manual

scratchpad write 0x12345
hibernate 1
scratchpad -> still 0x12345
keyboard reset
scratchpad -> still 0x12345
pull power and battery, then plug back in
scratchpad -> now 0

Change-Id: I2c205f53e03eefe915260b9be39c809ea7d69293
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29500
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-09 13:34:23 -07:00
Randall Spangler
d023f302c8 Don't drive HDA_SDO
BUG=chrome-os-partner:12453
TEST=play a youtube video, hear audio

Cherry-pick to link.

Change-Id: Ibc81fb5ac91b15aeb7c222b637aace31562d6170
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29775
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-09 13:34:22 -07:00
Vincent Palatin
b081af1284 stm32f100: implement low power mode
When the AP is not running and we have enough time go to STOP mode
instead of simple idle.
The EC consumption should drop from 12mW to a few mW.

This is currently not activated by default, you need to type "sleepmask
0" in the EC console to activate it.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:8866
TEST=on Snow, check the software is still working properly when STOP
mode is activated and measure power consumption on 3v_alw rail.

Change-Id: I231d76fe6494c07b198c41694755b82d87c00e75
Reviewed-on: https://gerrit.chromium.org/gerrit/29315
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
2012-08-09 11:55:03 -07:00
Doug Anderson
3a6a369d39 i2c: stm32: Increase tx timeout in slave mode from 10ms to 100ms
We have seen instances where the AP has interrupts disabled for a long
period of time (specifically when doing a lot of printk messages to
the console).  When this happens the host can't service i2c in < 10ms
(it needs an interrupt per byte) and we were getting a timeout.  We'll
increase the timeout to 100ms to avoid these problems.  Better to be
safe than sorry.

This timeout runs from the host command task so having the delay
shouldn't be a terrible thing (we're not running from an IRQ handler
or anything).

Only affected the timeout for slave mode specifically so as not to
affect any untested behavior.

BUG=chrome-os-partner:12123
TEST=With serial console enabled, run this in two different ssh
sessions:
a) while true; do flashrom -p internal:bus=i2c -r /tmp/ec.bin; done
b) while true; do /usr/local/lib/flimflam/test/connect-wifi GoogleGuest; done
...if flashrom reports success over and over again then this is good.

Change-Id: I7f32d5f1e4134896c857ee26f449a1fdd579d589
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29621
2012-08-08 15:35:29 -07:00
Vic Yang
a7d7297577 stm32f: Use FLASH_KEYR to lock entire flash
Writing wrong key to FLASH_KEYR locks entire flash and effectively
performs RW_NOW. Therefore we can use this and remove RW_AT_BOOT to
prevent having to reboot for RW to be protected.

BUG=chrome-os-partner:12043
TEST=1. fakewp 1         -> wp_gpio_asserted
     2. flashwp now      -> nothing happens
     2. flashwp enable   -> wp_gpio_asserted ro_at_boot
     3. reboot           -> wp_gpio_asserted ro_at_boot ro_now
     4. flasherase 0x10000 0x1000 -> success
     5. flashwp now      -> wp_gpio_asserted ro_at_boot ro_now rw_now
     6. flasherase 0x10000 0x1000 -> error
     7. reboot           -> wp_gpio_asserted ro_at_boot ro_now
     8. flasherase 0x10000 0x1000 -> success

Change-Id: I22df188e31404c190c5830c6d94c9646224eb9ab
Reviewed-on: https://gerrit.chromium.org/gerrit/29255
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-08-08 11:39:48 -07:00
Randall Spangler
99a770b14c Clean up debug output
Should print with [%T prefix

BUG=none
TEST=if it boots, it works

Change-Id: I035c081ae3e8ad0088daf0bba404118e1a1f9b41
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29480
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-07 19:06:43 -07:00
Randall Spangler
ed3f2af50f Add real-time clock support
BUG=chrome-os-partner:12290
TEST=manual

From EC console,
   rtcget
   (wait a few sec)
   rtcget
   hibernate 3
   (wait for wake)
   rtcget
   (hold power+refresh; wait for reboot)
   rtcget
   rtcset 20000
   rtcget
   (wait a few sec)
   rtcget

Each rtcget should be a few seconds after the previous one.

Pull the battery and remove AC power.  Then restore AC power and
   rtcget
   (wait a few sec)
   rtcget
Should be close to 0.  That is, it should have reset to 0 when power
was lost.

From root shell,
   ectool rtcget
should match the time from rtcget, truncated to the nearest second.
   ectool rtcset 30000
should set the time (do a rtcget to check).

Change-Id: I535097feb7af8aa6583c8ef50ade66bb19bdff8f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29349
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-07 19:06:35 -07:00
Randall Spangler
45cd8463a3 Remove signature-based vboot support
Superseded by EC software sync (hash-based).

Sig-based vboot was correctly implemented, but ended up being too slow
to be useful given the limited processing power of the EC chips, and
we also couldn't come up with a manageable way to handle A/B
autoupdate of signed EC firmware.

This change and an associated vboot_reference change shrinks the EC
binary by ~2KB.

BUG=chrome-os-partner:11232
TEST=build link,snow; boot link and check that 'hash' command still works.

Change-Id: I3f03ae2d0a4030977826980d6ec5613181e154c2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29496
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-07 19:06:33 -07:00
Randall Spangler
29cbe51663 Add host events for shutdown due to thermal or battery
BUG=chrome-os-partner:12353
TEST=hack the thermal monitoring and/or battery code to trigger a shutdown
then see that the events get set

Change-Id: I5ef2ac03cdd793ab0c50c0db518cba1ede3ea036
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29429
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-07 13:30:49 -07:00
Charlie Mooney
a78bb5e560 Fix stack overflow in i2c stack for EC
There were a number of problems resulting from i2c crashes,
particularly when trying to access the battery.  The problem is that
the stack was overflowing on this particularly deep path, all the way
down to wait_status.  This in itself was fine, but if there was a
timeout, debugging information would be printed to the uart, and that
function would cause an exception and restart the EC.

To fix it, I stripped the debugging CPRINTFs from wait_status.  This
allows everything to work fine, but looses some information for
debugging.  To allow future developers to still see what event the i2c
was waiting for, I added an additional variable to store it in, so that
it can be displayed/handled further up the stack.

BUG=chrome-os-partner:12245
TEST=Boot the machine using a Servo.  On the AP's UART, run
"cros_test i2c" to start pounding the i2c bus.  Then from the EC, run
"pmu 1000" and then "battery 1000" there should be no error messages,
exceptions, and the EC should not restart.  Repeat this process with i2c
arbitration disabled (remove the flag in ./board/snow/board.h).  You
should suffer no fatal errors.  cros_test may report errors detected,
but the EC will never crash, restart, or throw exceptions.  These other
errors are the EC and the AP stepping on each other's toes now that you
have disabled arbitration.

Change-Id: Idd2f017d3557652bf3e8536c4ac776c1f70319cb
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29351
Reviewed-by: Simon Glass <sjg@chromium.org>
2012-08-07 12:05:30 -07:00
Randall Spangler
80e36e0254 Enhance port 80 logging
- 'port80 intprint' toggles printing port 80 codes in interrupt
  handler (turning that off speeds up port 80 capture a bit, if you're
  sending port 80 codes very rapidly)

- 'port80 flush' flushes the log buffer

- log buffer expanded to 256 entries

- log buffer tracks S3->S0 power state transitions, so you can tell
  where each boot starts

This uses ~500 bytes more RAM on the EC, but we've got piles of RAM
(with this change we're using 17KB out of 32KB).

BUG=none
TEST=manual

- boot system
- port80 -> prints data
- port80 intprint -> now disabled
- reboot; wait for reboot; no port80 debug output during boot
- port80 -> prints data from previous boot AND this one
- port80 flush
- port80 -> nothing in log

Change-Id: I64ee72fb13ab0fdd85d04b9640b5390fdac31400
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29420
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2012-08-07 12:05:30 -07:00
Vic Yang
b383d4c6b8 Hibernate when in G3 for 24 hours
To save power, make the EC hibernate after we go into G3 for 24 hours.

BUG=chrome-os-partner:9386
TEST=Use "hibdelay 5" to change the delay to 5 seconds.
     Remove AC power, power down and check device hibernates after 5
     seconds in G3.
     Connect AC power, power down, wait for G3. Remove AC power and
     check device hibernates after 5 seconds.

Change-Id: I6fb907c904798076a763f22bd35f53f7424d6200
Reviewed-on: https://gerrit.chromium.org/gerrit/29400
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-08-07 09:35:18 -07:00
Vic Yang
687bd2cf39 Periodically set power LED
It is possible that power LED goes off while AC still connected. Let's
set power LED periodically to aviod this problem.

BUG=chrome-os-partner:10386
TEST=Disconnect power LED while leave AC connected. Check LED goes off.
Connect LED again and check it comes back after few seconds.

Change-Id: I2a199446be5da772af8027b735b9f431f697bacd
Reviewed-on: https://gerrit.chromium.org/gerrit/29403
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-08-07 09:35:18 -07:00
Vincent Palatin
dbc861c5f0 add a function to fast forward system timer
When we wake up from a deep sleep mode, the system timer clock might
have been stopped. We need to be able to set using another time source
(e.g. the RTC).

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:8866
TEST=make BOARD=snow && make BOARD=link
on Snow, on a software implementing STOP mode, check the system time is
still accurate by comparing it to the wall clock.

Change-Id: Ieddbb423d052c7aceb398470866b25b25a74c0a0
Reviewed-on: https://gerrit.chromium.org/gerrit/29314
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-06 18:55:00 -07:00
Vincent Palatin
d8e04f0db7 snow daisy: compute RW firmware hash
Activate the VBOOT code to compute the SHA256 hash of the RW partition
of the EC firmware.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=On Snow, reset the EC and see the hash is computed at startup.

Change-Id: Id1930f823ef516e459b4905c7d0f301568fddf0f
Reviewed-on: https://gerrit.chromium.org/gerrit/29279
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-06 12:06:44 -07:00
Vincent Palatin
7c5c4792e9 snow: remove debug features to save RAM
We need a bit more internal RAM for verified boot hash feature,
let's de-activate RAM hungry debug features.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:12271 chrome-os-partner:10895
TEST=make BOARD=snow
check RAM size with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated.

Change-Id: I4d1d6c0f99a8b03011af6eb2d73455beba93c535
Reviewed-on: https://gerrit.chromium.org/gerrit/29278
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-06 12:06:44 -07:00
Vincent Palatin
5bc086d688 vboot: fix flash offset for hash
CONFIG_FW_RW_OFF is already relative to the base address of the flash,
we don't need to substract it.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=None
TEST=on Snow, run with CONFIG_VBOOT and CONFIG_VBOOT_HASH activated and
see the hash is correctly computed and display.

Change-Id: I1643b07a59459baa973bfd7ee80cbf98963a85d4
Reviewed-on: https://gerrit.chromium.org/gerrit/29276
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-06 12:06:43 -07:00
Rong Chang
ea9a51856e Add TPSChrome comments on charging code
This change adds more comments on charging states and fixes battery
temperature out of range log messages.

Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:10900,12222
TEST=none

Change-Id: Ie3240dc246ad7590078929e41575c67798373aca
Reviewed-on: https://gerrit.chromium.org/gerrit/29253
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
2012-08-06 00:05:52 -07:00
Rong Chang
6156c1b904 Change link charging profile
Change vendor specific charging current table to meet battery
specification.

Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:12012
TEST=run firmware_ECCharging

Change-Id: I41a8060834bd02153d8c722ae5ffed7749226b83
Reviewed-on: https://gerrit.chromium.org/gerrit/29258
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Rong Chang <rongchang@chromium.org>
2012-08-06 00:05:51 -07:00
Rong Chang
1a6a7336be Fix stm32 i2c timeout debug message
The i2c timeout error message is false positive warning. It happened
when wait_status() function got a good result, but took too long to
complete (> 1ms).

This warning message can be removed safely.

Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9759,12222
TEST=none

Change-Id: I2a670b76a5d741dc82ea59eacc233c4719eb3263
Reviewed-on: https://gerrit.chromium.org/gerrit/29254
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
2012-08-06 00:05:51 -07:00
Randall Spangler
cf20b3e4f0 Add x86indebug command
Prints all x86 signal power state transitions at interrupt level, so
we can see lines toggle more precisely.

BUG=chrome-os-partner:12229
TEST=manual

1. power on system
2. no debug output that looks like [501.001742 x86 in 0x563f]
3. reboot
4. x86indebug 0xffff
5. power on system
6. should see lots of lines that look like [501.001742 x86 in 0x563f]

Change-Id: Ie3b346ee4d4beee3f13ac1245f1eb022b48dabf4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29192
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-03 16:51:14 -07:00
Charlie Mooney
5e996478c9 Fixing lid power behavior -- shutdowns vs reboots
When the user is logged in a closes/opens the lid of the laptop the
lid_changed flag gets set, but never cleared.  Normally, it would get
cleared when it powered back on from being opened, but without powerm
running or is the machine is only suspended, then that never happens.
This fixes the problem by additionally clearing the flag whenever the
computer is powered down.  This forces the computer to not turn on
based on anything that happened to its lid before it was turned off,
which is the behavior you'd expect.

BUG=chrome-os-partner:12189
TEST=Log in to your Chomebook completely.  Close, then open the lid.
Shut the computer down.  It should stay off now.  Once it's back on
close the lid and confirm that it still suspends correctly.  Now
open the lid and make sure it turns back on.  Repeat these steps, but
kill powerm first.

Change-Id: I2275b3125115b4eacc6a5d074978d7a1d51b0695
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29111
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-03 09:52:22 -07:00
Vic Yang
29d478c92b Revert "Set power LED to green when we are trickle charging nearly full"
This reverts commit f322e1b96a.

Now that we notify kernel when charge_full changes, this workaround
should be abandoned.

BUG=chrome-os-partner:11248
TEST=Check power LED still works.

Change-Id: I87c269dcf4cb6b9f0da2472f139e39cced28232b
Reviewed-on: https://gerrit.chromium.org/gerrit/29147
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-08-03 08:04:16 -07:00
Vic Yang
0083ce5bea Notify kernel when charge_full changes
This way kernel always know the current value of charge_full.

BUG=chrome-os-partner:11248
TEST=Check charge_full is updated when it changes

Change-Id: I623d84a4d6e556097b9214672e016b0c2e6cfdb9
Reviewed-on: https://gerrit.chromium.org/gerrit/29133
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-08-03 08:04:16 -07:00
Vic Yang
4dc7496a98 Fix 'reboot' console command
BUG=chrome-os-partner:12155
TEST=Check 'reboot' command works with the following parameters:
       - No parameter
       - 'hard'
       - 'soft'
       - 'hard ap-off'
       - 'soft ap-off'
       - 'soft preserve'
       - 'hard ap-off preserve'

Change-Id: Ib54d6a0fe419ff7b47265698fae2fcd554f707d4
Reviewed-on: https://gerrit.chromium.org/gerrit/29017
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-08-02 19:41:58 -07:00
David Hendricks
985ff40583 snow: add keypress noise suppression
This was implemented for Daisy a long time ago, but left out on Snow
due to some confusion.

GPIO remapping is already handled because PD1 and PD0 (which is used
for ENTERING_RW) are remapped together. So all we need here is the
board_keyboard_suppress_noise() function definition which gets
called from the keyboard scanning code whenever a change is detected.

BUG=none
TEST=Verified using a scope that CODEC_INT line is driven
     when a key is pressed (15us pulse)

Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Ifd358eb89a9547c4f4b9536b8922c93d2c3b77a0
Reviewed-on: https://gerrit.chromium.org/gerrit/28989
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2012-08-01 19:17:19 -07:00
Randall Spangler
903dc92ec1 Add additional host command debug output
Prints when a host command returns an error code.

When 'hcdebug on', hex-dumps the host command params and response.

BUG=none
TEST=manual (> is ec console, $ is root shell)
  $ ectool gpioget foobar --> EC console shows error 2 returned
  > hcdebug on
  $ ectool hello --> EC console shows params and response as hex
  > hcdebug off
  $ ectool hello --> no extra output on EC debug console

Change-Id: I2dbc77be5b59125f394d970cf1c83c2a976e926e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28948
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-08-01 11:58:24 -07:00
Louis Yung-Chieh Lo
d02cc2c961 Snow has write protect pin (PB4) wired to EC.
Intend to keep fake_wp functions for test.

BUG=chrome-os-partner:9986
TEST=build only (success on link/snow/daisy/bds). Have no hardware to test.

Change-Id: I1e2ae923790d65b6c95819f5274dbe8c7f254429
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28793
Commit-Ready: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Tested-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2012-08-01 09:07:06 -07:00
Rong Chang
776374b028 Wait STM I2C stop bit sent
This CL prevents the risk of CR1 write access causes duplicate STOP.

Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:11974
TEST=manual
  console command "pmu 200"

Change-Id: I717336d87230139a1a17e6f39e70502c0e0c7a18
(cherry picked from https://gerrit.chromium.org/gerrit/#/c/26832)
Reviewed-on: https://gerrit.chromium.org/gerrit/28811
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2012-07-31 22:13:50 -07:00
Charlie Mooney
ae8e24acb7 Fixing bug: Keyboard locks up after 8s pwr press
The EC was not re-enabling keyboard scanning on boot if the power button
was released.  This works fine if the power button is released before
the shutdown is complete, but if the user holds it down until the device
is completed powered down the lock will never be released, and the next
time they turn on the computer, the keyboard won't work.

To fix this, all that is needed is to make the power event task keep
unlocking it whenever the power button isn't pressed down.  There's
no problem with unlocking multiple times, so it's not dangerous to do
this.

BUG=chrome-os-partner:12070
TEST=Boot the machine normally, then press and hold the power button
until the machine is entirely powered down before releasing it.  Press
the power button a second time to turn on the machine.  You should be
able to type as normal.

Change-Id: I88852ed228bd8f6a9446406bab642812ef1327db
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28871
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-07-31 16:42:06 -07:00
Randall Spangler
77000e73bc Fix setting initial debounced power button state
If it's pressed, need to track that or we'll ignore the release.  And
then we'll leave the power button signal asserted to the PCH, and
it'll shut down 4 seconds after the power button was pressed.

BUG=chrome-os-partner:11971
TEST=hibernate 10, then press power button for ~0.5 sec, then release
system should boot normally

Change-Id: Ibb9b8a8827cca6c81bac06dc9543de1a76fa5aad
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28863
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-07-31 16:07:27 -07:00
Bill Richardson
261beed560 security: Check for integer overflow in VbExMalloc()
Make sure we don't roll over when rounding up to align the requested size.

BUG=chrome-os-partner:11642
TEST=none

No test; if security guys approve code change, it's fixed.

Change-Id: I2e915a6e6b37fc315ab7adb435e2fce4eed670ba
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28729
Reviewed-by: Sumit Gwalani <sumitg@google.com>
Reviewed-by: Gaurav Shah <gauravsh@chromium.org>
2012-07-31 11:59:25 -07:00
Vic Yang
37754f9b70 Rename TMP006 sensors
BUG=chrome-os-partner:12010
TEST=Build success

Change-Id: I2557ec1568bc0b13a4dd25bbd85dffb9dccd6468
Reviewed-on: https://gerrit.chromium.org/gerrit/28764
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-07-31 09:20:39 -07:00
Vic Yang
b13cf5de98 Fix a bug that a line longer than 80 char kills EC console
BUG=chrome-os-partner:11938
TEST=Type a command longer than 80 char and press enter. Check console
is still alive.

Change-Id: Ib86c5f97cc12220ac62ab8855ef8e5c65ecd2d82
Reviewed-on: https://gerrit.chromium.org/gerrit/28679
Reviewed-by: Charlie Mooney <charliemooney@chromium.org>
Tested-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Ready: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
2012-07-30 20:32:16 -07:00
Randall Spangler
2da2e72dd3 Add support for ACPI read/write commands
This is needed to support the kernel keyboard backlight driver through ACPI.

Also adds a few other memory addresses for testing this interface -
version, test, and test-compliment.

BUG=chrome-os-partner:12001
TEST=manual

    - query next ACPI event
    io_write8 0x66 0x84
    io_read8 0x62
    0x00
    - read ACPI memmap version
    io_write8 0x66 0x80
    io_write8 0x62 0
    io_read8 0x62
    0x01
    - extra command writes shouldn't crash
    io_write8 0x66 0x80
    io_write8 0x66 0x80
    io_write8 0x62 1
    - extra data writes shouldn't crash either
    io_write8 0x62 1
    io_write8 0x62 1
    - write test address
    io_write8 0x66 0x81
    io_write8 0x62 1
    io_write8 0x62 0x2a
    - read it back
    io_write8 0x66 0x80
    io_write8 0x62 1
    io_read8 0x62
    0x2a
    - read back test compliment
    io_write8 0x66 0x80
    io_write8 0x62 2
    io_read8 0x62
    0xd5
    - set keyboard backlight to 50%
    io_write8 0x66 0x81
    io_write8 0x62 3
    io_write8 0x62 50
    - read it back
    io_write8 0x66 0x80
    io_write8 0x62 3
    io_read8 0x62
    0x32

Change-Id: I619fdbd322cdef8ffffbb882b3bbb587e364334d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28714
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2012-07-30 15:22:41 -07:00
Charlie Mooney
7adb0aad16 Remove "Sticky" recovery mode on Daisy
Previously, if you used Esc + Reload + Power to reboot into recovery
mode, you would be stuck in it until you manually rebooted the EC with
"Reload + Power."  This was because the button combo set a switch that
was never un-set.  To fix it, the keyboard_scan function now sets a host
event, that is serviced once, and then cleared.  As a result, the next
time you reboot after triggering recovery mode, it should boot as before
you triggered recovery mode.

BUG=chrome-os-partner:10889
TEST=Boot device in normal mode.  Press Esc + Reload + Power, and boot
from usb.  Power off the device and remove the usb media.  Power on the
device again, and there should be no recovery screens during the boot
process.  Next, repeat these same steps, but from starting in developer
mode.  After recovery, when you reboot, the device should return to
developer mode.

Change-Id: Idcb8dde6f8ba5f680f4d34e61ae0d12992281cbb
Signed-off-by: Charlie Mooney <charliemooney@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28710
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2012-07-30 14:33:51 -07:00
Randall Spangler
30b2bd27f6 Improve hostcmd command
Version and params fields are optional.
Output uses "%h" format code.

BUG=none
TEST=manual

    > hostcmd 0
    Response: 02000000
    > hostcmd 0 0
    Response: 02000000
    > hostcmd 0 1
    Command returned 6
    > hostcmd 1 0 10203040
    Response: 14233241

Change-Id: I8b3ff0f7d9a1131f942604724e04c59ff818396d
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28705
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-07-30 14:15:03 -07:00
Sameer Nanda
c846102714 Add a userland thermal loop
This is a temporary hack to implement a userland thermal loop.  This
code really belongs in the BIOS and will move there once we have
gathered enough data to prove the efficacy (or otherwise) of doing such
throttling. So, please pardon the ugliness of the code -- it's meant to
be short-lived and therefore we wouldn't want to spend too much time on
optimizing it or making it pretty.

BUG=none
TEST="initctl start temp_metrics" and then monitor various parameters
such as CPU min/max frequency, GPU frequency, duty cycle and package
power limits to ensure they are doing the right thing.

Change-Id: I407e4826b4db801298f08fa72c4f2330e127322b
Signed-off-by: Sameer Nanda <snanda@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28634
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2012-07-30 14:15:03 -07:00
Randall Spangler
7d06db201f Enhance printf()
1. Add precision to limit string length.
   ccprintf("%.4s", "foobar") prints "foob"

2. Handle '*' for length, precision fields.
   ccprintf("%.*s", 3, "foobar") prints "foo"

3. Add hex-dump code "%h"
   ccprintf("%.*s", 4, "foobar") prints 666f6f62

BUG=none
TEST=at ec console, 'hash' prints the current hash

Change-Id: I568310f2727495b021081bf58df2a0bbb3c74e73
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28704
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-07-30 13:41:33 -07:00