Previously, an assert was checking the port value after the
port value had been converted to the controller. Instead, verify
that the value is not negative, and return if it is.
The if sequence generates much less code than the ASSERT, and protects
both paths.
Fixes coverity warning 141748: Negative array index read
42 files changed.
Total size change: -1248 bytes.
Average size change: -29 bytes.
These platforms increased in size:
lucid/RO/ec.RO.flat grew by 4 bytes: (64404 to 64408)
lucid/RW/ec.RW.flat grew by 20 bytes: (63996 to 64016)
pyro/RO/ec.RO.flat grew by 120 bytes: (131212 to 131332)
pyro/RW/ec.RW.flat grew by 144 bytes: (130764 to 130908)
TEST=Build
BUG=None
BRANCH=None
Change-Id: I8d39db04c4ca3194f99e17840365429ed2d39390
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/371401
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In some cases, the virtual battery code creates
transactions that violate SB spec.
One example:
If the host command is structured as two messages -
a write to 0x03 (reg addr), followed by two bytes of write data,
the first byte of the second message (write data) will be sent to
virtual_battery_read(), as if it were a reg read request.
Let's do the following change for virtual battery:
1. Parse the command more carefully with state machines.
2. Support write caching for some critical registers.
3. Cache more attributes (0x03 and 0x0f).
BUG=chrome-os-partner:59239, chromium:659819
BRANCH=none
TEST='power_supply_info' works on kevin
Change-Id: Icdeb12b21f0dc3c329f29b206b7b9395ca4c9998
Reviewed-on: https://chromium-review.googlesource.com/407987
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch moves I2C_MAX_HOST_PACKET_SIZE to include/i2c.h. It's currently
used only by i2c-stm32*.c but should be commonly available for other chips.
It also moves i2c_get_protocol_info to common/i2c.c for the same reason.
BUG=none
BRANCH=none
TEST=make runtest
Change-Id: I28d8bca0167bb7b2ce99574601a6efb62fc20eca
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/393328
Reviewed-by: Randall Spangler <rspangler@chromium.org>
virtual_battery_read() returns a cached value for some of the supported
smart battery parameters. If a value isn't supported, it calls out to
the actual battery. In the case of a battery that's not present, but a
supported battery parameter is queried, we would still return
_something_. This seems to confuse powerd and causes slow boot.
This commit changes the i2c passthru command to return a NAK when the
virtual battery is enabled but the battery is not present.
BUG=chrome-os-partner:55954
BRANCH=gru
TEST=Build and flash kevin. Unplug battery. Verify boot is nice and
quick.
Change-Id: Ib3ab768504c29904f01b91e6194a9689bfdb1e1e
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/392926
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit b5eb2d93820c9e1a162cb1b390b3563bf9effcd5)
Reviewed-on: https://chromium-review.googlesource.com/393187
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Added i2ctest console command to test the reliability of the I2C.
By reading/writing to the known registers this tests provides the
number of successful read and writes.
BUG=chrome-os-partner:57487
TEST=Enabled the i2ctest config on Reef and tested the
i2c read/writes.
BRANCH=none
Change-Id: I9e27ff96f2b85422933bc590d112a083990e2dfb
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/290427
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Since pretty much always, we've declared console commands to take
a "longhelp" argument with detailed explanations of what the
command does. But since almost as long, we've never actually used
that argument for anything - we just silently throw it away in
the macro. There's only one command (usbchargemode) that even
thinks it defines that argument.
We're never going to use this, let's just get rid of it.
BUG=none
BRANCH=none
CQ-DEPEND=CL:*279060
CQ-DEPEND=CL:*279158
CQ-DEPEND=CL:*279037
TEST=make buildall; tested on Cr50 hardware
Everything builds. Since we never used this arg anyway, there had
better not be any difference in the result.
Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374163
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
stm32f446 has two types of i2c blocks, the traditional
stm i2c, and "fast mode plus" i2c, which need different drivers.
This commit adds both, muxed in i2c-stm32f4, as the ec
codebase doesn't really support multiple types of the same interface.
BUG=chromium:608039
TEST=i2c works on all 4 channels
BRANCH=None
Change-Id: I6a9ac632f44142bd809ffee5782a192ae47af1f0
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/368358
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This allows the AP to protect a I2C passthru bus. A board-specific
function then defines what I2C commands are allowed, so that we
can white/black list some addresses (e.g. I2C address allowing
PD chip FW updating).
BRANCH=none
BUG=chrome-os-partner:52431
TEST=Book elm-rev1
Change-Id: Ib106924418b16388ea8ea53c7b6bda6ef92e1d09
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/345761
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@google.com>
This change use a simple counter to to prevent ec enter sleep if there's
any i2c port active. Once there's no i2c port active, we enable sleep bit of
i2c in i2c_lock() func. Please note FW disables interrupt during changing
counter to prevent preemptive conditions.
Modified sources:
1. common/i2c.c: Fix sleep mask for multi-port lock.
BUG=crbug.com/537759
TEST=make buildall -j; test on wheatley when CONFIG_LOW_POWER_S0 is deifned.
BRANCH=none
Change-Id: I17c226108fee0e5d656fa157808179898f9a8dbf
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/325256
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously there were only two uses of gpio_config_pins, one was
gpio_config_module, which passed in GPIO_CONFIG_ALL_PORTS (the only
place this is used), the other was the common I2C code when it needs to
return the SDA and SCL lines to their alternate function after unwedging
the bus.
These uses are so different that it doesn't make much sense to keep a
single API for them. This change adds a gpio_config_pin that is
simpler to use as it just takes a gpio_signal enum to select the GPIO
to configure and makes gpio_config_pins and GPIO_CONFIG_ALL_PORTS
internal to gpio.c
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I92bfb0b520b0aa2165655b2ff5076e428c88631f
Reviewed-on: https://chromium-review.googlesource.com/322437
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
ARM systems currently use SBS kernel driver which talks to the battery
through I2C passthu in the EC. Instead when asking for battery
information try getting it from the charge state machine first, and
then try the battery if charge state does not have the information.
This reduces latency by cutting out the battery response time.
BUG=chromium:484841
BRANCH=none
TEST=check that power_supply_info works properly on Jerry
Change-Id: If4da15ccabe412adc31fc94b189089ebb3e9265c
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/307905
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
On sysjump we attempt to lock all i2c ports in use, but locking is
by-controller. This leads to a deadlock if two ports from the same
controller are in use. Fix this by directly locking all controllers
present in the system.
BUG=chrome-os-partner:44214
TEST=`sysjump rw` and then `sysjump ro` on glados
BRANCH=None
Change-Id: I21d65cd4455769414216016a5c97ad118a712117
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294959
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The current logic breaks out of the for() loop if SCL gets unwedged
(goes high), but still falls through to the "I2C unwedge failed,
SCL is being held low" case. Fix this so that we only hit the
"SCL is being held low" case if SCL actually is stuck low.
BUG=none
BRANCH=None
TEST=compile-test only, on samus
Change-Id: I39df1966dc25517ee03a56109e7d0b740c5ca12b
Signed-off-by: Kevin Cernekee <cernekee@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295043
Reviewed-by: Randall Spangler <rspangler@chromium.org>
After I2C unwedge, *all* I2C ports will be re-initialized in
i2c_raw_mode() by gpio_config_module(MODULE_I2C, 1);
This means *all* I2C pins will be programmed as GPIO then enable I2C
alternate function.
If I2C Unwedge happened while there is an active I2C transacation on
another port, the active I2C transaction will be corrupted, since the
pins will be temporary programmed as GPIO Output High.
BUG=chrome-os-partner:40519
TEST=Warm-reboot test on Cyan EVT and no discharging while AC is on.
BRANCH=none
Change-Id: I3be1d5c60bf4ab385bc077202406ec7abd8b2add
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287493
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Denny Iriawan <denny.iriawan@intel.com>
Add functions and associated test to read/write a 32 bit register
BRANCH=smaug
TEST=Test on smaug with bm160 driver
BUG=chromium:39900
Change-Id: Ieff24b65f1eb8610874fe13c4a8fadf583a218cb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277535
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
sysjump could happen anytime during an I2C transaction. After sysjump and EC
reset, I2C pin will be programmed back as GPIO instead of alternate function,
which will cause the I2C transacation to failed.
MEC1322 I2C also depends on interrupt to handle the I2C transaction, however,
sysjump will disable interrupt, which will cause watchdog timeout/reset since
interupt for I2C transaction are disabled.
BUG=none
TEST=After "sysjump <RO/RW>", "i2cscan" is functional and no watchdog reset.
BRANCH=none
Change-Id: I181084822f0769173c724e48afb59d7099fa1566
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/273710
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
i2c_xfer was previously implemented at the chip-level, but now we want
to add some global retry logic. Rename the chip-level i2c_xfer functions
to chip_i2c_xfer and add a new global wrapper function i2c_xfer.
BUG=chrome-os-partner:39613
TEST=Run "battery" from EC console on Cyan, verify that values + strings
are correctly printed.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: If37c85cc3cf94fd53feb6931553e10c30ad6cad6
Reviewed-on: https://chromium-review.googlesource.com/272939
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Since stm32 and mec1322 now support open-ended i2c_xfer, we can move the
lm4 i2c_read_string implementation to common code and delete all
chip-specific versions.
BUG=chrome-os-partner:39613
TEST=Run "battery" from EC console on Cyan and Oak, verify that battery
info + strings are correctly printed.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I06369df64bb2eb747d163664b4c96eeacb4b1faa
Reviewed-on: https://chromium-review.googlesource.com/272938
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Certain chips have I2C ports mapped to the same controller. In this
case, it's necessary to lock out access to the controller during use.
This configuration can be supported by adding CONFIG_I2C_MULTI_PORT_CONTROLLER,
which can be defined at the chip level, along with an API function to
map port index to controller index.
BUG=chrome-os-partner:38335,chrome-os-partner:38945
TEST=Manual with subsequent commit. Verify that i2cscan is functional on
strago.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I37ffa661a2ad6cd2235cef2ee77637cc3ab92523
Reviewed-on: https://chromium-review.googlesource.com/265942
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Previously we had a restriction that only one i2c bus could use the
automatic wedge detect and unwedge functionality. This removes that
restriction, although it uses a mutex to make sure only one bus is
being unwedged at any given time.
BUG=chrome-os-partner:26485
BRANCH=samus
TEST=make -j buildall
Change-Id: I8ff238fb8a9e9d2f5bc57a2b0a05e2b231024772
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220466
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
We are now using argv[5] even if the user only gives 5 arguments. Fix
it.
BUG=None
TEST=Read with i2cxfer command and doesn't see "Invalid param 5"
BRANCH=None (this can be worked around by adding a dummy param)
Change-Id: Ice13fec4ad53c71b6529daa3510fa6fc1d7f8c00
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208489
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We never implemented this. We have no devices which support it. And
we used bit #17 in a 16-bit field to flag it, so it wouldn't have
worked even if we did. So, remove this (dead) code.
BUG=chromium:382944
BRANCH=none
TEST=make -j buildall
Change-Id: Id3a4a93612d1078a3239d85921a05cfd7362b84c
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204162
Reviewed-by: Doug Anderson <dianders@chromium.org>
Our code base contains a lot of debug messages in this pattern:
CPRINTF("[%T xxx]\n") or ccprintf("[%T xxx]\n")
The strings are taking up spaces in the EC binaries, so let's refactor
this by adding cprints() and ccprints().
cprints() is just like cprintf(), except that it adds the brackets
and the timestamp. ccprints() is equivalent to cprints(CC_CONSOLE, ...)
This saves us hundreds of bytes in EC binaries.
BUG=chromium:374575
TEST=Build and check flash size
BRANCH=None
Change-Id: Ifafe8dc1b80e698b28ed42b70518c7917b49ee51
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200490
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This may not contain all. I filtered out possible code by the
following command:
find . -name "*.h*" -o -name "*.c*" | xargs grep -n CPRINTF | \
grep -v "\[" | grep -v define | less
BUG=none
BRANCH=none
TEST=make buildall tuntests
Change-Id: I674f84f5966b34aeb8d4321d22629b450627a120
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/197997
Add a shortcut in smart battery driver and i2c passthru. Once
the battery cut-off order is submitted (in the factory line),
the EC will no longer talk to battery.
BUG=chrome-os-partner:28248
BRANCH=tot,nyan
TEST=See below
> remove AC, cutoff: expect system is off.
> cutoff, then remove AC: expect system is off.
> cutoff, wait for 1 min, then remove AC: expect system is off.
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Change-Id: Ied963c19d17d581ce99e4543469cf2fa165f0439
Reviewed-on: https://chromium-review.googlesource.com/196657
Tested-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Yung-chieh Lo <yjlou@chromium.org>
Refactored the i2c unwedge code to place it in the common directory
so that any EC chip can use it.
Added to the STM32F and LM4 boards, code to automatically detect and
unwedge the i2c bus at the start of an i2c transaction. Note that STM32L
already had this ability.
To enable unwedging of the i2c port though, the gpio pins for SDA and
SCL must be defined in the i2c_ports[] array in the board.c file. This
allows the i2c module to bit bang the unwedging for the given port. If
SDA and SCL are not defined for the port, then the unwedge code will
not run.
BUG=chrome-os-partner:26315, chrome-os-partner:23802
BRANCH=none
TEST=Manual testing on machines with different EC chips.
Testing made extensive use of https://chromium-review.googlesource.com/66389
in order to force wedging of the i2c bus so that we can attempt to unwedge
it. Note that you can easily test if the bus is wedged by running i2cscan.
On pit and spring:
On pit, after each of the following, I verified that the bus was automatically
unwedged.
On spring, the unwedge only runs at reboot, so, for the non-reboot wedge
commands, I manually ran console command unwedge, and verified that the bus
became unwedged.
(1) Bit bang a transaction but only read part of the response.
Command to wedge: i2cwedge 0x90 0 2 2
(2) Bit bang a transaction to do a "write" and stop while the other side is
acking. Command to wedge: i2cwedge 0x90 0 1
(3) Same as (1) but do a reboot instead of returning and see
that the unwedge works at init time w/ no cancelled transactions.
Command to wedge: i2cwedge 0x90 0 6 2
(4) Same as (2) but do a reboot instead of returning and see
that the unwedge works at init time w/ no cancelled transactions.
Command to wedge: i2cwedge 0x90 0 5
On glimmer:
Added code to call i2c_unwedge in accel_init(). Then tested unwedging the
accelerometer with the following. One extra difficulty testing this with
the accelerometer is that sometimes the bit you stop on is high, which
means it won't be wedged at all, the next start transaction will reset
the bus. So, sometimes running i2cwedge won't wedge the bus and sometimes
it will depending on the acceleration data.
(1) Big bang transaction to do a "read" of accelerometer and stop partway:
i2cwedge 0x1c 0x0f 2 2
i2cscan to make sure bus is actually wedged
i2cunwedge
i2cscan to make sure bus is now unwedged.
(2) Bit bang transaction to do a "read" and stop partway, then reboot:
i2cwedge 0x1c 0x0f 6 2.
i2cscan to verify that the bus is working after the reboot.
Change-Id: Ie3328e843ffb40f5001c96626fea131c0f9ad9b1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188422
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This make minor syntactic changes and renames some camel-cased symbols
to keep checkpatch from complaining. The goal is to reduce the
temptation to use 'repo upload --no-verify'.
This is a big furball of find/replace, but no functional changes.
BUG=chromium:322144
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180495
This renames constants used in compiler conditionals to uppercase.
BOARD_foo
CHIP_foo
CHIP_FAMILY_foo
CHIP_VARIANT_foo
CORE_foo
Mixed-case constants are still defined by the makefile, but are now no
longer used. I will make one more pass in a week or so to catch any
that are part of someone else's CL, since otherwise this change might
silently merge correctly but result in incorrect compilation. Then I
will remove defining the mixed-case constants.
BUG=chromium:322144
BRANCH=none
TEST=Build all boards. Also, "git grep 'BOARD_[a-z]'" should return no
results (similarly for CHIP, CORE, etc.)
Change-Id: I6418412e9f7ec604a35c2d426d12475dd83e7076
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179206
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The common/ subdir was getting cluttered. Move drivers for external
components to a new driver/ tree, and move what used to be called
chipset_*.c to a new power/ directory.
This does not move/rename header files or CONFIG options. That will
be done in subsequent steps, since moving and modifying .c files in
the same CL is harder to review.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I67a3003dc8564783a320335cf0e9620a21982d5e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173601
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
