This adds support for write protecting the RO code at boot, and the
entire flash on demand.
Implementation if WP# is not asserted is currently a little different
than STM32F and LM4; RO is still protected at boot if ro_at_boot, but
can be unprotected and the change will commit on the next reboot.
This saves the bank of flash which we use for pstate on LM4 and
STM32F. I think I can use one of the unused option bits (WRP2 bit 0)
to hold the RO-at-boot flag, in which case I can more closely match
the behavior of the other chips, but I'd like to do that (or give up
and implement pstate) in a separate CL so it's clearer what I'm doing.
BUG=chrome-os-partner:15613
BRANCH=none
TEST=manual
- flashinfo -> (no flags)
- enable WP (via screw or dut-control)
- flashinfo -> wp_gpio_asserted
- flashwp enable
- flashinfo -> wp_gpio_asserted ro_at_boot
- flashwp now
- flashinfo -> wp_gpio_asserted ro_at_boot all_now
- flashwp disable -> fails
- flashinfo -> wp_gpio_asserted ro_at_boot all_now
- flasherase 0x1fc00 0x400 -> fails
- reboot
- flashinfo -> wp_gpio_asserted ro_at_boot ro_now
- flasherase 0xfc00 0x400 -> fails
- flasherase 0x1fc00 0x400 -> succeeds
- disable WP (via screw or dut-control)
- reboot
- flashinfo -> ro_at_boot ro_now
- flashwp disable
- flashinfo -> ro_now
- reboot
- flashinfo -> (no flags)
- flasherase 0xfc00 0x400 -> succeeds
- flasherase 0x1fc00 0x400 -> succeeds
Change-Id: Id1b6b099a44a1985a5ab9387feb882a8f26e3aa1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/55594
The "dumb" port power code was setting ports to enabled on S5
when it should be setting them to disabled. This changes it
to match the behavior of the "smart" port power code and its
own comment.
BUG=chrome-os-partner:19398
BRANCH=none
TEST=manual: poweroff slippy and watch USB ports get disabled
Change-Id: Ibc68450a973477341d9ca096ac5a6ddd08cef273
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56262
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The gpio pin used for RCIN# should be configured as open drain as the
rail is pulled up by a non-EC rail. Driving it high would leak power.
The current GPIO_HI_Z macro uses GPIO_HIGH as the default state.
However, it has been found that this actually drives the pin to ground.
It is still unclear how Link works or doesn't.
BUG=chrome-os-partner:19355
BRANCH=none
TEST=manual: boot on slippy without RCIN# causing reset and
the 'apreset warm' EC command works as expected.
Change-Id: I71425075f8d77b3d7e576a59fc24f823790e2655
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56269
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
For Spring, the charging time can be quite long and TPS65090 ends up in
timeout state and stops charging. Let's put charge state machine back to
re-init so that the device continues charging after checking charging
condition is good.
BUG=chrome-os-partner:19405
TEST=Pass charger test
BRANCH=spring
Change-Id: I838741e7283eb31ed76cf3979dbad7f070947aea
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/55720
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If the current value is lower than 500mA and voltage is higher than
4.55V, draw more current.
Also to make PWM duty cycle more stable, disable fast mode once we hit
low voltage condition.
BUG=chrome-os-partner:19486
TEST=Plug in a low voltage USB host. Check we draw more current.
BRANCH=spring
Change-Id: I91ee97ca15247d49427d4db34d17a0d0c55b2684
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/55722
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This reverts commit 7de52688be.
ADC watchdog is sourcing too much current onto ID_OUT net, and causes
voltage to rise by 0.4V. Let's revert this and use the monitoring loop.
BUG=chrome-os-partner:18397
TEST=Plug in the dongle and see kernel message about cable detect.
BRANCH=spring
Change-Id: If8f8e831d6184c3b3db582931ce8db6c064e2c0d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/55687
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The display rail is generated from the PP3300_DX rail, but it
is enabled by the EC_EDP_VDD_EN signal. Therefore, bring down
the EC_EDP_VDD_EN signal before bringing down the PP330_DX
rail. Additionally, always set the EC_EDP_VDD_EN signal based
on the PCH_EDP_VDD_EN in the x86 power interrupt. The reasoning
is so the signal doesn't indavertently remained set.
BUG=chrome-os-partner:19398
BRANCH=None
TEST=booted and resumed
Change-Id: I43c2306f05d144b7dea243bafb5922118be1fe39
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51524
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The PP3300_WLAN rail was not being controlled. Fix this by bringing
up the rail in S3->S0 transition and bring it down in S0->S3
transition. This current sequencing will not allow the WLAN to
wake from suspend at the moment. To do that we'd need to move this
sequencing to the S5<->S3 transitions.
BUG=chrome-os-partner:19507
BRANCH=none
TEST=Brought up board. Noted WLAN card in lsusb and lspci.
Change-Id: I48e7610fa4f0471a2869933f2df5d2c7c525b155
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51483
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
It makes delay between 3.3V_EN and PMIC_ON
So we are now 5V EN -> 2ms Delay -> 3.3V EN -> 2ms Delay -> PMC3_ACOK
BUG=chrome-os-partner:19305
BRANCH=none
TEST=Using osiloscope, See until PMC3_ACOK is far from P3.3V_AUX as 5ms
Change-Id: I65bfece28f55edf4f5640fe411bd57caaaaa5e1d
Reviewed-on: https://gerrit.chromium.org/gerrit/50449
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
When system is locked, the console is disabled. However, we need console
for debugging and testing. This CL uses a bit from back-up register to
indicate if the console should always be enabled. (This bit is currently
used by fake WP, which is removed in this CL.) With this, we can set
this bit with console command 'forceen 1' to ensure console is never
disabled.
To prevent device shipped in this state, the chip name is postfixed with
'-unsafe' so that the device is not able to pass HWID check.
BUG=chrome-os-partner:19293
TEST=Manual
BRANCH=spring
Change-Id: I88556e973ca542c1bdc27ba64988718291e01a26
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51086
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The 5V rail should be enabled on S5->S3 transitions and
disabled on S3->S5 transitions.
BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transitions: S0,S3,S5,G3
Change-Id: If9fd7ef16f015136238dd18f64602ecf33d9ec4a
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51359
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
The PROCPWRGD signal is not well documented. It's not known if
it is an input or an output. Emperically it was discovered that
driving this pin during the resume path causes resume to fail.
Therefore, ignore the pin by setting it to an input.
BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transition from S0 to S3 and back to S0
Change-Id: I55dc16c75c286af06806e2513197f0bb2c7b9d04
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51358
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
The current sense resistor has changed. Update constant here to reflect
the new values for DVT1.
BUG=None
TEST=Build Spring
BRANCH=Spring
Change-Id: Ib27c45cef569fa758db2fbb428150c8c2b6732ef
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49892
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
- pass through the eDP VDD enable from PCH
- Bring up suspend rail after DPWROK and before RSMRST,
as indicated for deep sleep sequencing
- de-assert CPU_PGOOD on S0->S3 transition, it was
getting left enabled
BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transition from G3 to S0 and back to G3
Change-Id: Ie711275d6121edccff60b2de08b71575d2d035b7
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51154
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
As our stack for the keyboard scanning task might be small (256 bytes on
STM32), we store the full keyboard state in a global instead of the
stack to avoid consuming 16 bytes there.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:19389
TEST=run on Spring with CONFIG_OVERFLOW_DETECT and see that the KEYSCAN task
is now consuming 248 bytes of stack instead of 264.
Change-Id: I2dd7815f36e6807e7b9e88d59f8fd8a14b1988ab
Reviewed-on: https://gerrit.chromium.org/gerrit/51028
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Still some work to do here but this now works.
NOTE: This makes the system behave like a normal
cros device where the power is applied automatically.
For some (other, unknown) reason the "reboot ap-off"
is not passing flags correctly to keep it off.
BUG=chrome-os-partner:19398
BRANCH=none
TEST=successful state transition from G3 to S0
Change-Id: I694136b9611e18ac8fb7b1e960bd10caa258ce28
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51077
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
If the user unplug video dongle before it is detected and handled, we
may be stuck with ID_MUX=1 and interrupt from TSU6721 disabled. This
essentially breaks charging.
BUG=chrome-os-partner:18997
TEST=Build and check charging port still works.
BRANCH=spring
Change-Id: I93e69287d07947fef743b4674857e52c26513835
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50969
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
We cannot know how much current we can pull from video dongle, so let's
just try to pull as much as possible up to 2A.
BUG=chrome-os-partner:19324
TEST=Plug in video dongle and see 3.3V output.
TEST=Plug in video dongle with supplied charger, and see 50% PWM duty
cycle.
TEST=Plug in video dongle with normal charger, and see 70~80% PWM duty
cycle.
BRANCH=spring
Change-Id: I8b503f886fcafaa11e6757a5059ce673a8ed53cc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50963
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The help text says to pass 0 or 1 for the mode but
the code only accepts "on" or "off".
Fix up the help text to match and have the display
output for the port status also use on/off so it is
consistent with the input.
BUG=chrome-os-partner:18825
BRANCH=none
TEST=manual: verify "usbchargemode 0 on" works as
it is explained in the help text.
Change-Id: Ib32dc68af93989d277aa84a1cb53ae9b66a8b595
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50838
SPI is always enabled on pit, so remove #ifdefs
SPI1_CLK was aliased to AC_STATUS, which is left over from snow and
doesn't exist on pit. That caused it to be driven high briefly during
EC boot.
Also set SPI pins for 40MHz speed so we can try faster SPI clock.
BUG=chrome-os-partner:19304
BRANCH=none
TEST=boot system; sspi 2:0 256 9f prints a bunch of FDs then FEEC010001
Change-Id: I10352cff3669d6a087939d9d8e302d70708e9ee3
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/51023
Reviewed-by: Doug Anderson <dianders@chromium.org>
This commits the hacks made during board bringup. Bugs can be filed and
fixed based on this starting point.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Try it and see.
Change-Id: Ia663eaf9a357633873b1b5d5cc6dbdda63513082
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50875
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Several test utility macros have been duplicated across tests. Let's put
them in a single place.
BUG=chrome-os-partner:19236
TEST='make runtests', 'BOARD=spring make tests'
BRANCH=None
Change-Id: Ib0c9f829715425cc23e33b8ef456b17dfadab13c
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50513
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The spec suggests we cannot reliably go over 1.5A and gracefully
recover. Let's avoid going over that limit.
BUG=chrome-os-partner:19267
TEST=Build spring
BRANCH=spring
Change-Id: I07411ff3ce4107e0289c5af5365ef5a23fd23e4e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50321
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This includes:
- Increase overcurrent retry count from 1 to 2.
- Mark overcurrent event regardless of what current PWM duty cycle is.
- PWM duty cycle settles faster.
- PWM duty cycle starts from ~100%.
BUG=chrome-os-partner:19001, chrome-os-partner:19037
TEST=Manual
BRANCH=spring
Change-Id: Idf007fb589fde3baef6c8975dfa1f2fc1ec6e95d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50262
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Perviously we use uint32_t for this, but this doesn't compile for 64-bit
environment (and likely doesn't for 16-bit either.) Use uintptr_t so that
we don't get size mismatch errors.
BUG=chrome-os-partner:19257
TEST=Run host emulated tests
BRANCH=None
Change-Id: I3cd66a745fa171c41a5f142514284ec106586acb
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50358
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This is the first version of pthread-based RTOS emulator. With this, we
will be able to test high-level modules entirely on the host machine.
BUG=chrome-os-partner:19325
TEST='make runtests' and see tests passing.
BRANCH=None
Change-Id: I1f5fcd76aa84bdb46c7d35c5e60ae5d92fd3a319
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49954
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The EC currently assumes the AP only provides USB power during S0, which
is incorrect. This CL adds S3 so that it behaves when the device is
suspended.
BUG=chrome-os-partner:19190
TEST=Suspend and unplug power. Doesn't hear clicking sound.
BRANCH=Spring
Change-Id: Ice1421bda55b2fee408ba062ed3de7a697ccd0c8
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50093
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This specifies the Slippy GPIOs. Because the power controls are completely
different from Link, we have to gut the power sequencing task to do nothing.
For bringup and test, we'll just manually set and get the GPIOs until we
know exactly what we need to do.
This is where the fun starts...
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Built everything, Link still works.
Change-Id: Ic1ce1d4085298f49dd98d99e81e04835eca5f11c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50004
I'll still need to decide what to do differently for Slippy, but for now
let's just identify the places where there will likely be a difference.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Link still works.
Change-Id: I950f0e5356ccf9838f2140d853122235f884e34f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49931
Also renaming to avoid confusion as to what's being charged.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Build everything, Link still works.
Change-Id: I4205a1210c7dfe57cfbbdd740970ef57e6a011b8
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49775
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The state REINIT in TPS65090 charge state machine is more like IDLE0
state in charge_state.h. Rename it so that it's less confusing and
easier to merge the two state machines in the future. Also move the
state name definition to the header file.
BUG=chrome-os-partner:18914
TEST=Boot Spring
BRANCH=None
Change-Id: I116438fedc46ff188dfb6a3964795715b5af4d1f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49732
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This eliminates a per-second hook and removes a duplicated ADC read per
second. Also, TSU6721 is now reset after every detachment. This way, we
don't suffer from TSU6721 dirty state (most commonly seen after OTG
dongle detached.)
BUG=chrome-os-partner:17928
TEST=1. Test plugging/unplugging video dongle.
2. Test Toad cable mode switching.
3. Test charging with 200K charger.
BRANCH=spring
Change-Id: Ic035b7332e07ca385d766c735ce39efd31e46034
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49578
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The voltage rails, inputs, and sequencing is completely different. Easiest
to just handle it separately for each chipset.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Built Link, still works.
Change-Id: Ibf26ef47cdf2284b7bfb3a2e5ccfb6841aba5ac6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49559
Reviewed-by: Randall Spangler <rspangler@chromium.org>
STM32L doesn't need the DMA-based workarounds needed by STM32F, since
the STM32L I2C block isn't broken. DMA adds a lot of code overhead
when transferring 2-3 bytes, and is implemented differently on STM32F
vs STM32L so it doesn't even work on STM32L
Add a simple polled I2C implementation for STM32L. This is not the
final implementation, which will use interrupts, but for now it works,
unlike the DMA-based version.
BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan on pit finds a device at 0x90
Change-Id: Ie2a6c9ac6f62b7fd3c35e313b4015e080d9f937a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49555
With a Toad cable, the user can access the EC serial console through the
micro-B connector.
We probably need to de-activate the input on the EC serial console when
the Write-Protect is on, since we have fairly "powerful" commands on the
EC command-line.
Add a new CONFIG_CONSOLE_RESTRICTED_INPUT on platforms with externally
accessible EC serial port.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=spring
BUG=chrome-os-partner:18716
TEST=on Spring with CONFIG_CONSOLE_RESTRICTED_INPUT set, try with and without
write-protect, use successfully the EC console in the former case, and see
"Console is DISABLED" in the latter case.
Change-Id: Ic9646d5468183f4d8f94b5e5e1d2a727941d7bbe
Reviewed-on: https://gerrit.chromium.org/gerrit/49537
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Also moves the handy i2cscan command to i2c_common. The
platform-dependent interface is now i2c_xfer().
Still more to do in follow-up CLs; for example, i2c_read_string() has
platform-dependent implementation, and the i2c/i2cread console
commands aren't common yet.
BUG=chrome-os-partner:18969
BRANCH=none
TEST=i2cscan on link, spring
Change-Id: Ia53d57beaa157bece293a4262257e20b4107589e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49492
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Daniel Erat <derat@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
When battery flags TERMINATE_CHARGE or OVER_CHARGED alarm, we should
treat them as a signal of battery fully charged.
BUG=chrome-os-partner:18914
TEST=On Spring:
1. Plug in adapter when battery if full, see green LED.
2. Plug in adapter when battery is not full, see yellow LED.
BRANCH=spring
Change-Id: Ica414a0e1667b8f30a0cc9a5d66dba1b119a59ba
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49456
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Should use CPRINTF("[%T...\n]") so the messages are timestamped; this
is really helpful to see when things are going wrong.
No functional changes; just changing debug output.
BUG=none
BRANCH=none
TEST=build pit and spring; see prettier debug output
Change-Id: I9c658385b836a184a3ebb84856b844cbfc3224a7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49551
Reviewed-by: Simon Glass <sjg@chromium.org>
This fixes pmu_init() failing on pit, where the charger task isn't
enabled yet (and thus the charger interrupt is NULL - which can't be
enabled).
BUG=chrome-os-partner:18657
BRANCH=none
TEST=build all platforms; on pit, check that pmu_init() no longer fails
Change-Id: I191bbaeb4df10241e3508ccf7ef5ea83f42c5697
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49550
Reviewed-by: Simon Glass <sjg@chromium.org>
Two states were added, but the descriptions weren't. This caused a crash.
BUG=chrome-os-partner:18914
TEST=boot spring with no battery, wait a few secs; shouldn't crash
BRANCH=spring
Change-Id: I10f9280232259a1f467ea3b02f3b1b61cee57471
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49391
We are moving video power from VFET2 to VFET4. To support old boards, we
need to enable both of them. When new boards are in place, we can then
drop VFET2.
BUG=chrome-os-partner:18186
TEST=Build spring
BRANCH=spring
Change-Id: If0cbc1ac49affc1e3c7ec9650a661f80be826f97
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49431
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Sadly, the existence of fans may not always imply the existence of keyboard
backlights.
BUG=chrome-os-partner:18825
BRANCH=slippy
TEST=manual
Use the Link EC console to make sure that both functions still behave.
faninfo
fanset 4400
faninfo
fanset 9999
faninfo
autofan
faninfo
fanduty 50
faninfo
fanduty 100
faninfo
autofan
kblight 0
kblight 100
kblight 50
kbligth 100
Change-Id: I2e07cd46c21bce2d0d4162275a8ea6ae40135e96
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49355
