Move calibration in the EC to returns raw value with offset already
applied, as recommended by iio interface.
BRANCH=smaug
TEST=On Samus, with kernel change CL:283103
Check raw value are returned properly.
BUG=chromium:506101
Change-Id: I3dcb4f2fcfff35639e3bfdcc6c1468bdb5e53c45
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283161
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This adds a module that attaches to the SPS driver to process
host commands delivered over the SPI slave interface.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
This feature is not yet enabled, so there's nothing new to test.
That will come next.
Change-Id: If57a6fce698a7eb050e2a68b7f4d18d8b0e2956f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284010
Reviewed-by: Randall Spangler <rspangler@chromium.org>
1. Added new config option CONFIG_USB_PD_TRY_SRC
2. Added pd_try_source_enable global flag with console command
3. Added bit to pd.flags to indicate Try.SRC states are active
BUG=chrome-os-partner:39724
TEST=Manual samus to samus with the Try.SRC enabled on both and just
one samus. Tested Samus to Honeybuns and Samus to Zinger connections.
BRANCH=TOT
Change-Id: Ifa5d5d82e443f376e546aaf852ff24d92ef04d72
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/282052
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
1. Add flash control module for emulation board.
2. Fix system jump for Andes core.
3. Change the physical size of the flash on the chip to 256KB.
note:
1. Only IT839x series supports flash write protect by registers.
2. Static DMA method of flash code only for IT839x series and IT838x Dx.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. console command flashwp and flashinfo
1-a. flashwp enable
1-b. WP asserted and reboot
1-c. flashinfo RO protected now
1-d. WP deasserted and reboot
1-e. No protected
1-f. flashwp disable
1-g. WP asserted and reboot
1-h. No protected
2. console sysjump and sysinfo
2-a. sysjump rw
2-b. jumping to image RW
2-c. sysinfo, Copy : RW, Jumped : yes
2-d. sysjump ro
2-e. jumping to image RO
2-f. sysinfo, Copy : RO, Jumped : yes
3. RO/RW firmware image test
3-a. sysjump rw
3-b. use console command "eflash" to erase RO region,
erase OK and system still work.
3-c. reflash firmware
3-d. sysjump rw, sysjump ro
3-e. use console command "eflash" to erase RW region,
erase OK and system still work.
Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8
Reviewed-on: https://chromium-review.googlesource.com/271390
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
The SPS (SPI Slave) driver handles incoming traffic from the SPI
master. This abstracts the basic hardware functions into a clean
API so that the response to the SPI bytes can be put into
separate files.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
If CONFIG_SPI is not defined, incoming SPI traffic is completely ignored.
Even when it's enabled, nothing is reacting to the traffic so
incoming SPI bytes return 0xFF bytes to the master (SPI traffic
is always bidirectional).
Change-Id: I9bbcebc9c5223b942362200fe43a11ac57dfff40
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283581
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
This provides a way to experiment with or support random
functionality not specifically related to the normal EC
operation. With this, we can use a standard host command to pass
opaque data blobs between the AP and EC without specifying a
particular meaning to them.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
Nothing in the normal EC usage sends these messages. I have a
test/example program coming soon.
Change-Id: I77fe434cbd9151e4c2c22bc36d1ed6063d3bf940
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283070
Reviewed-by: Randall Spangler <rspangler@chromium.org>
"RO" is a workaround for GP base instructions.
And now we have added "-mno-gp-direct" option in the NDS32 toolchain.
So the compiler would not generate GP base instructions directly,
and we can remove this "RO".
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=chrome-os-partner:24378
TEST=console "version" and "gpioget"
Change-Id: I23cb6374fb8eb57081d713bf5c70b80a87dd2fb5
Signed-off-by: Dino Li <dino.li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/281862
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
DP Alternate mode specification defines two bytes in the DP
capabilities payload with respect to pin configs. One that governs
the DFP and the other the UFP. The one that the DP source needs to
examine depends upon whether the UFP is a receptacle or a plug.
Previously we just examined the DFP pin config which was correct for
all UFP plugs but not UFP receptacles. This change fixes that by
examining bit <6> of capability message to determe plug vs receptacle
and in case of receptacle choosing the UFP ping config instead.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chromium:505652
TEST=manual, hoho & apple (UFP_D plugs) still work.
While I don't have a test for UFP_D receptacle partner device reports
following for its DP caps which should now decode correctly.
<31:24> 00 Reserved/SBZ
<23:16> 1C UFP pin config == C, D, E
<15:08> 00 DFP pin config zero
<07:00> C5 <6> == 1 == receptacle
Change-Id: Ib9e3a808828ff6b8c062baf0fc3c23b3da33c2c3
Reviewed-on: https://chromium-review.googlesource.com/282621
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
If flash is being written, any pending hash calculation is likely to
be invalid.
BRANCH=None
BUG=chrome-os-partner:38103
TEST=on Cyan, run hundreds of flashrom cycles to make sure there are no
read, erase or write errors
Change-Id: I915f8db7998c56fc12e7d85173232882fb7ed80d
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282211
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Take profit of the hardware input current ramping/back-off integrated
in the BQ2589x charger by setting the current limits higher for BC1.2
USB modes and letting the hardware adjust to the actual charger
limitation depending on the VBUS voltage droop.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42045
TEST=Connect a Nexus 9 DCP charger to Smaug and see the input current
adjusted to 1650mA without brown-out, read back the value properly from
the AP:
$ ectool usbpdpower
Port 0: SNK Charger DCP 4958mV / 1650mA, max 5000mV / 1650mA / 8250mW
Change-Id: I348e5ee4980a5652f72f279ab4e3a7126583b093
Reviewed-on: https://chromium-review.googlesource.com/282584
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
add GPIO_SEL_1P8V flag for 1.8v/3.3v selection.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. To configure 1.8V/3.3V pin to 1.8V,
set GPIO_SEL_1P8V flag in gpio.inc.
2. The corresponding bit will be set as default value if the pin
is not listed in gpio.inc.
Change-Id: Ica02aabe40b83fcb4d33bd28d717a0633bdef5f3
Reviewed-on: https://chromium-review.googlesource.com/281842
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Initial support for Parade PS8740 Type-C redriving switch.
BUG=chrome-os-partner:41696
TEST=Manual on Glados in subsequent commit. Verify set() and get()
functions set and return consistent values. Verify that USB SS device
functions when muxes are set to dock or USB.
BRANCH=None
Change-Id: Iedbe53cc76f30ecd969c2ca99a7377ed3b193729
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/282280
Reviewed-by: Alec Berg <alecaberg@chromium.org>
In preparation for adding support for additional USB-C mux chips, add a
new high-level USB-C mux interface usb_mux.c. usb_mux functions are now
called from pd code instead of board-level functions. usb_mux calls down
into a mux chip-specific driver (currently pi3usb30532) or
board-specific drivers which toggle GPIOs (for legacy boards).
BUG=chrome-os-partner:41696
TEST=Manual on Glados in subsequent commit. Verify set() and get()
functions set and return consistent values. Verify that USB SS device
functions when muxes are set to dock or USB. Also, verify that DP
dongle and USB SS device are functional on both PD ports on samus_pd.
BRANCH=None
Change-Id: Ib6477f489310f3be1430585ea09fea26f57e3752
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/281435
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Refactor the tcpm/tcpc split such that the tcpm driver implements
the alert functionality since it may be unique for different tcpc
chips.
BUG=chrome-os-partner:41842
BRANCH=none
TEST=make -j buildall. run on samus and glados.
Change-Id: I23f2d7f8627d5337b8d001a09bf27622be24fe33
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/281631
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Updated the VDM information to handle properly the DisplayPort alternate
mode.
Switch to 2+2 (DP+USB3.0) if mode D is entered else use 4 lanes of DP
for mode C.
Set the Multi-Function Preferred bit, so laptops select the mode D.
BUG=none
BRANCH=none
TEST=Tested with samus. Verified we get 36W of power + USB2.0 key +
USB3.0 key + external DP display.
Change-Id: I95e3b3640fd5952faeb24312e387468aed6266c7
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/267688
Reviewed-by: Todd Broch <tbroch@chromium.org>
mutex_lock() is called from MEC1322_IRQ_ACPIEC0_IBF
interrupt context, causing deadlock and assertion
in __wait_evt().
In the interrupt context it now checks for mutex lock first.
If the mutex is already locked,, it will disable ACPI
interrupts and defer the memmap mutex lock.
Added LPC interrupt disable/enable functions as needed.
Increased deferred function count where needed.
BRANCH=None
BUG=chrome-os-partner:40820
TEST=Test for suspend-resume, cold, warm reboots and
other general stability.
Change-Id: I3dda0d4635a6b6281faf200c8c7b6fcba8877254
Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/280418
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
There were many CONFIG_* options that were not defined in
include/config.h. This commit fixes that by adding those config options
that were missing with a brief description of each.
BUG=chromium:496893
BRANCH=none
TEST=Verified that every mention of CONFIG_* is in include/config.h.
TEST=make -j buildall tests
Change-Id: Ie60756a8dd48d12b3e9b775639f409455dc5656f
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/281785
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Set the resistance compensation for the charger IC according to the EE
team measurements :
- Resistance compensation = 60 mOhm
- Voltage clamping = 160 mV
- Thermal regulation = 120C
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38603
TEST=dump the BQ25892 registers by using the "bq25" command and see that
REG08 contains 0x77.
Change-Id: I90e9ea4569d77fd90ed0290ec78e66810d744648
Reviewed-on: https://chromium-review.googlesource.com/281660
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Modify PDCMD task to allow for TCPCs that do not support host
commands.
CONFIG_HOSTCMD_PD is a new config option to be used by TCPCs
that implement our host command protocol such as the PD MCU on
glados and oak. Otherwise, the PDCMD task will not send host
commands and will be used simply to check TCPC interrupt status.
BUG=none
BRANCH=none
TEST=test on glados and samus and make sure we can send host
commands from the EC to the PD and that we can negotiate a PD
contract.
Change-Id: I618badb5db3f9e490ae4eedfdb2a0c54513496ff
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/278215
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Changed the alert function to hold the ec_int line until
all of the alert bits are cleared. Added support for the
alert_mask register. In addition, created ec_int_status
variable to distinguish which of 3 ec_int sources is
driving the pd_mcu_int line.
BUG=none
BRANCH=tot
TEST=Tested Zinger to Glados and Zinger to Samus and verified
that it established a power contract in both cases. Did not
test Oak, but put exact same changes in board.c as in glados.
Change-Id: I372e75b8fd5d66a0c01db18b46100b86fd9ac064
Signed-off-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/278256
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Update the recovery key combination to: power key + volume up when the
AP is off.
Add a fastboot key combination: power key + volume down when the AP is
off.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:41629
TEST=on Ryu, shutdown the AP, press "power+volup" or "power+voldown" and
see the right trace.
Change-Id: I42cf368d42885717758fc4b494af5c8a16fc58b0
Reviewed-on: https://chromium-review.googlesource.com/278323
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
For the few platforms without gpio.inc, use this
enum gpio_signal {
GPIO_COUNT
};
instead of this
enum gpio_signal {
NULL
};
The only reason this worked at all is that the headers are
included in a particular order.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I81533f3614d0b4c7389f9edd42cd8ac018581f46
Reviewed-on: https://chromium-review.googlesource.com/278120
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add functions and associated test to read/write a 32 bit register
BRANCH=smaug
TEST=Test on smaug with bm160 driver
BUG=chromium:39900
Change-Id: Ieff24b65f1eb8610874fe13c4a8fadf583a218cb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277535
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add TCPC support for USB VID register and use that register
from the TCPM side to know when the TCPC is ready. TCPC is
ready when phy layer is initialized and CC ADC channels have
been read.
BUG=chrome-os-partner:40920, chrome-os-partner:41258
BRANCH=none
TEST=load and run glados. verify that glados EC doesn't
start sending TCPC commands until it can successfully
read TCPC VID. verify that we can boot with zinger and no
battery.
Change-Id: Iafbab529a16ff904cdb817901baac5e72e3d7220
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277710
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
changes added to support flashrom are:
sysjump support to be able to copy the RO/RW image
and jump to it without causing AP to reboot while
its alreday ON.
LPC init should be reinitialized on sysjump
corrected gpio_set_flags_by_mask to make sure we
update the register only for GPIO_LOW condition and not
all else conditions.
BUG=chrome-os-partner:38103
TEST=commands : flashrom -p ec -w ec.bin
flashrom -p ec -r ec.bin
BRANCH=none
Change-Id: I23892f0378d756052030e73034c3acdd41477e34
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/272000
Reviewed-by: Shawn N <shawnn@chromium.org>
When we are going to S5 with a debug accessory plugged, we cannot
transition through the 'PD_DRP_FORCE_SINK' else we would
disable/re-enable the USB muxes triggering disconnections/glitches on
the USB debug console.
So, rework the management of the dual role toggling special case
(used to detect debug accessories) : remove the special DRP state and
re-write the conditions.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:41399
TEST=on Ryu, connect to the EC console through Suzy-Q and issue
the "apshutdown" command, then see the EC USB console is randomly
disconnected/re-connected or acting up.
Change-Id: Id44a9360a836e7c10a30f5afb2971bc7c3d01a5c
Reviewed-on: https://chromium-review.googlesource.com/277275
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
If task_get_current() is called early during initialization when we have
not yet done a context switch, our current_task pointer is invalid. Add
an assert to detect this case and put it behind CONFIG_DEBUG_BRINGUP, a
new config that's intended to enable possibly-costly pre-production
debugging.
BUG=chrome-os-partner:40677
TEST=Manual on glados. Define CONFIG_DEBUG_BRINGUP, then call i2c_write from
board_init and verify the new assert fails. Remove the i2c_write and verify
the new assert passes.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6014ccf739dcc4c8f4f960be2b89f01e423b65b5
Reviewed-on: https://chromium-review.googlesource.com/273541
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously we supported using a single pi3usb9281 chip, or using two
chips on the same i2c bus behind a mux. Now that we need to support a
third configuration of multiple chips on different busses, it makes
sense to be able to configure the configuration freely at the board
level.
BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None
Change-Id: I120dcb1c3ceb6f013b92407effcd8cb66e7ffcce
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276511
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add command to read the sensors events FIFO from the AP:
FIFO_INFO: get information on the FIFO state
FIFO_READ: read and update the consumer pointer
FIFO_FLUSH: insert a flush meta event and force a interrupt.
A new MKBP event is added to tell the host the FIFO needs processing.
BRANCH=smaug
TEST=Test on ryu
BUG=chrome-os-partner:39900
Change-Id: I11c0cf8cdc3087eb9e323f7d6780e6cf3a16257f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276264
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The in_stream and out_stream interfaces were a first attempt
at providing an abstraction for multiple stream like devices
(usart, USB, I2C/LPC host interfaces...). But, by baking
the queue into the device it proved to be hard to use and
required additional resources (task or deferred hook) to handle
passing data from one stream to another.
Since then the queue policy and producer/consumer interfaces
have replaced the stream interfaces. This CL removes the old
stream interfaces and updates the only users (deleting the
test echo code from the discovery-stm32f072 board and updating
the mcdp28x0 driver to use the queue interfaces).
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ic0d2abf81eafc4fb2e61172540151f2d0ba45caf
Reviewed-on: https://chromium-review.googlesource.com/276163
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Move the task responsible for detection of USB chargers to common code
to reduce code duplication.
BUG=chrome-os-partner:40920
TEST=Manual on samus_pd. Plug USB charger, verify detection is correct
on both charge ports.
BRANCH=None
Change-Id: I362f8b5b51741509e459c66928131f1f6d2a3b1d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276210
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Now that we've removed boards from ToT, also delete board-specific
code used only by the removed boards.
There are still more things to remove (unused charging chips, LED
drivers, COMx support). More CLs coming.
BUG=chromium:493866
BRANCH=none
TEST=make buildall -j
Change-Id: Ie6bdeaf96e61cadd77e3f6336c73b9b54ff4eabb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276524
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Enable charging through debug accessory by setting input
current limit to 3A when debug accessory is detected.
Add new dual-role toggling state for stay sink unless VBUS
is detected, which allows us to detect debug accessory
when we are not normally dual-role toggling.
BUG=none
BRANCH=smaug
TEST=plug suzyQ into ryu in S0 and in S5 and make sure that
we go to the SRC_ACCESSORY state and set charger input
current limit appropriately.
Change-Id: I6262c9d6cd0ae7159f343d36e19d290c2f2e0181
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276368
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add queue_peek_memcpy to peek at queue and move the element using
specific memcpy function.
Also change memcpy prototype argument from void const * to const void*.
BUG=none
BRANCH=none
TEST=Compile and use.
Change-Id: I8c582563e7d204ee5568637f819d63404624faf6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274226
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Add workaround to limit the max input current to 1.5A due to
i2c communication problems at higher currents. Note that this
max should be removed when possible.
This introduces a new CONFIG option to define the maximum input
current limit for a board, as opposed to the already existing
default input current limit.
BUG=none
BRANCH=none
TEST=load on glados, charge with zinger, make sure input current
is set to 1.5A and no recurring i2c errors talking to battery
and charger.
Change-Id: Ib7070772e1bf5475e98a2dc946ae75bf08047b70
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276169
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Use the PDCMD task to handle PD MCU interrupts, and use it
to trigger the tcpc_alert().
Note this fixes bug on Glados and Oak that could cause watchdog
reset because tcpc_alert() which uses i2c to talk to tcpc was
called from hooks task and can delay tickling watchdog.
BUG=chrome-os-partner:40920
BRANCH=none
TEST=load on glados and plug zinger into both ports many times.
make sure we get a stable contract and no watchdog reset.
Change-Id: I37625fae2ca0057d2ee8fa1eea6974f2d26d1b91
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275296
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
sysjump could happen anytime during an I2C transaction. After sysjump and EC
reset, I2C pin will be programmed back as GPIO instead of alternate function,
which will cause the I2C transacation to failed.
MEC1322 I2C also depends on interrupt to handle the I2C transaction, however,
sysjump will disable interrupt, which will cause watchdog timeout/reset since
interupt for I2C transaction are disabled.
BUG=none
TEST=After "sysjump <RO/RW>", "i2cscan" is functional and no watchdog reset.
BRANCH=none
Change-Id: I181084822f0769173c724e48afb59d7099fa1566
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/273710
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
This adds a new task and endpoints to handle large opaque (to the
USB) chunks of data. The expected use case is that the USB
endpoint accepts bytes from the host and passes them blindly to
the blob-handling task. At some point, the blob-handling task may
wish to send bytes back to the host. What those bytes are and
what they mean is determined at higher levels of abstraction.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
This CL doesn't enable the blob-handler; it just makes it
available. The next CL will enable and test it.
Change-Id: I6eba8e8010466e71efe9c5e06848b9f403df835f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275131
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Holding the power button is currently the best known way to bring the AP
back to a state where it is shutdown and not powered.
BUG=chrome-os-partner:40826, chrome-os-partner:40677
TEST=Run `apshutdown` on glados, verify that power state machine transitions
to G3 after several seconds. Run `powerbtn`, verify that state machine
transitions back to S0.
BRANCH=None
Change-Id: Ia799c5f199127f31bd24907b93946c6289d381f8
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275060
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Allow timeout to be set at runtime by controller.
BUG=chrome-os-partner:40780
TEST=Manual on Glados. Verify PD I2C communication is functional.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I582e47c7bebfed7a639789c90064d86ffe1a5401
Reviewed-on: https://chromium-review.googlesource.com/274967
Reviewed-by: Alec Berg <alecaberg@chromium.org>
MOTIONSENSE_CMD_DATA return the value of a sinlge sensor.
BRANCH=none
BUG=chrome-os-partner:39900
TEST=On Smaug, using the new cros-ec-sensors driver,
check sensors data using iio sysfs interface.
Change-Id: I618ff050e0c7b4247ac56cfb0ca25e351270e1d6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274824
Reviewed-by: Alec Berg <alecaberg@chromium.org>
