The ec_boot_mode is used for flashing EC on STM32 and NPCX chips.
The ec_boot_mode pin is an open-drain GPIO. Doing save/restore is
destructive. For example, if DUT is unpowered (ec_boot_mode is "on"),
doing save/restore will force it outputting to "on". We should not
put it to the save/restore list. Instead, set it back to "off" on
exit.
BRANCH=none
BUG=b:80305869
TEST=Ran flash_ec when DUT is unpowered -> failed as expected.
Reran again when powered. Checked EC UART showed-up afterward.
Change-Id: Iecf4b663fe9ae75a673a29a66505a4121d29888c
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1073646
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When grunt is connected via a Suzy-Q cable, it can only be flashed using
npcx_uut. Also when grunt is connected via a servo it shouldn't try to
use npcx_uut, but instead use npcx_spi. This change allows a board to
show up in multiple BOARDS_XXX lists. If there are multiples, it will
either look at the --chips flag, or it will check the VALID_CHIP_COMBO
array to see if chip is valid for the servo type.
BUG=b:77927814
BRANCH=none
TEST=Tested each leg of the logic by changing parameters and variables.
Tested using Suzy-Q: ./util/flash_ec --board=grunt
Also tested using ServoV2: ./util/flash_ec --board=grunt
Change-Id: I7068b5bab0cf20bd2d9ffdd3842a58df1f2f8810
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1044499
Commit-Ready: Martin Roth <martinroth@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
The original UUT mechanism has the limitation that the image size cannot
exceed the code RAM size. Hence, it only allows to flash the EC firmware
by programming RO and RW images seperately.
In this CL, we introduce the "--auto" flag in uartupdattool.
It will divide the firmware into segments (4K bytes) and program
the segments one by one.
It also simplifies the function flash_npcx_uut() in flash_ec because
some actions are moved into the uartupdatetool with auto flag enabled.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=
------------------------------------------------------------------------
1. Connect the servo connector (J24) on npcx7 EVB to servo board v2 via
flex cable.
2. Manually turn the switch SW1.6 to "ON" on npcx7 EVB.
3. Reset ec by issuing Power-Up or VCC1_RST reset.
4. Manually turn the switch SW1.6 to "OFF" on npcx7 EVB.
5. Move npcx7_evb from array BOARDS_NPCX_7M7X_JTAG to BOARDS_NPCX_UUT in
flash_ec.
6. "./util/flash_ec --board=npcx7_evb" or
"./util/flash_ec --board=npcx7_evb --ro"
(Note: this line in flash_ec must be removed in step 6:
https://chromium.googlesource.com/chromiumos/platform/ec/+/master/util/flash_ec#961)
Change-Id: Ifdb6a40ef88c6a9fb435169e158fd615100237cf
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1043825
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Bip has an I2C mux that we need to set before we can program the ITE8320
chip. Set the dut's i2c mux to pass through to the EC.
BRANCH=none
BUG=b:79533605
TEST=flash bip and reef_it8320
CQ-DEPEND=CL:1054559
Change-Id: I690aa253c757c37dfb276d5be897b92a9aa1545e
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1054560
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Use servo to boot EC into the flashing mode. Use the unified control
ec_boot_mode to do so.
CQ-DEPEND=CL:1018206
BRANCH=none
BUG=b:68707064
TEST=Ran the flash_ec script on Cheza using servo-micro
TEST=Ran the flash_ec script on Meowth using CCD, with some servo
overlays to drive the ccd_ec_boot_mode control
Change-Id: I32dfe5baa82dd842b5237f38ea971c09e91c47d3
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1020159
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Without this, we see this line when running flash_ec.
util/flash_ec: line 787: [: =~: binary operator expected
These kind of tests require double brackets.
BUG=b:77825616
BRANCH=none
TEST=run util/flash_ec using servo_micro on staff.
Change-Id: I6baecec2252276ac06992fd2b2e50f74d55805f2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1018560
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
When the FLPRG# strap pin is set to active low, and npcx7 chip is reset,
it will enter uut mode. This CL adds the host tool to communicate with
npcx chip in uut mode to flash ec firmware via UART port.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=
------------------------------------------------------------------------
1. Connect the servo connector (J24) on npcx7 EVB to servo board v2 via
flex cable.
2. Manually turn the switch SW1.6 to "ON" on npcx7 EVB.
3. Reset ec by issuing Power-Up or VCC1_RST reset.
4. Manually turn the switch SW1.6 to "OFF" on npcx7 EVB.
5. Move npcx7_evb from array BOARDS_NPCX_7M7X_JTAG to BOARDS_NPCX_UUT in
flash_ec.
6. "./util/flash_ec --board=npcx7_evb."
Change-Id: I2c588418e809e59f97ef4c3ad7ad13a3fef42f11
Signed-off-by: Dror Goldstein <dror.goldstein@nuvoton.com>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/952037
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: Alexandru M Stan <amstan@chromium.org>
Tested-by: CH Lin <chlin56@nuvoton.com>
Tested-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
flashrom --get-size seems to return a size of 0 in some failure cases.
add specific handling of this case so we don't proceed and end up
failing with a somewhat misleading message like:
Error: Image size doesn't match: stat 524288 bytes, wanted 1048576!
BUG=none
BRANCH=none
TEST=flashrom now fails with "chip size is 0" instead of complaining
about wanting a 1048576 byte image.
Change-Id: Iab4d0843d86ceec9f0ca482d9e060a33c7a58c7a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1011823
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Cr50 is pretty slow to update it's ccd state right now. Add some delays
when flashing devices using uart bitbang, so cr50 will have enough time
to enable bitbang and configure the uarts correctly.
Also add some commands to cleanup to cleanup the cr50 state.
BUG=b:77825616
BRANCH=none
TEST=run util/flash_ec using ccd on reef and scarlet.
Change-Id: I1c84e36c9bb290c49fd15971c7f61f9e1151a424
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1006484
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
We found a symptom that iteflash always programming EC failed
on a specific host machine.
For this failed case, it is caused by the incomplete read from
ftdi_read_data(). For example, we want to read 32 bytes by just
call ftdi_read_data() one time, but ftdi_read_data() may return
(number of bytes read) 10 or 20 but just not 32.
This change will call ftdi_read_data() again and again until all
data is read.
Change draw_spinner() function to use fprintf().
We will show percentage increase from 0 percent to 100 percen
during verifying.
Change of flash_ec script:
Move operations of reinitialize ftdi_i2c interface to cleanup()
and we won't miss them if programming is failed.
BUG=none
BRANCH=none
TEST=To run iteflash on that host machine and flashing is done.
Change-Id: Ifa374652870737c8231fce5a699abe033a1f0237
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/979903
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Cheza board doesn't have the SPI guag programming interface. Should use
Uart to flash it.
BRANCH=none
BUG=b:74395451
TEST=Manual, steps:
* Add Uartupdatetool to the PATH
* Build the Cheza EC image
* Run "flash_ec --board cheza" on a reworked Meowth, which uses the
same EC chip as Cheza
Change-Id: Ica0878778314ad016273877683a85a912890161c
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/969419
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
When flash_ec script is run from /usr/bin it could not find
the ec source directory to calculate the basebord. Handle flash_ec
running from /usr/bin by using the default chroot source layout to
find ec platform dir. If dir is not present, then skip baseboard
check
BRANCH=none
BUG=b:77128456
TEST=sudo emerge ec-devutils && flash_ec --board=yorp
Change-Id: Ib7766e5c7ca701f0a209c6e6e6c1a192284b9d0b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/992993
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
If a baseboard exists in the build.mk for a board, use that
as the unibuild path.
BRANCH=none
BUG=b:77128456
TEST=tested the following command with correct results:
flash_ec --board=yorp (baseboard)
flash_ec --board=bip (baseboard)
flash_ec --board=grunt (non-baseboard)
Change-Id: Ic4573cb01849275d1333ff9e715f69a4c95444b0
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/986753
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This CL adds the driver support for the WoV module which inludes the
following files:
- wov.c
- wov_chip.h
- apm.c
- apm_chip.h
It also supports the console commad "wov" which can test different
configuration and audio quality by entering different parameters.
The detail description of WoV console command is listed below:
------------------------------------------------------------------------
[Note]: Before changing any of settings, please make sure the operation
mode is on the "OFF" state. (ie. run the command wov cfgmod off
first) .
> wov init
Initialize WoV interface, including pin mux and interrupt
registration etc.
> wov mute <enable / disable >
mute enable / disable.
> wov cfgsrc <mono | stereo | left | right>
set audio source, ex: wov cfgsrc left, means audio source from left
MIC.
> wov cfgbis <16|18|20|24>
set audio resolution, ex: wov cfgbit 16 means audio resolution are
16bits.
> wov cfgsfs <8000|12000|16000|24000|32000|48000>
set audio sampling frequency rate, ex: wov cfgsfs 48000 means audio
sampling rate are 48Khz.
> wov cfgbck <32fs|48fs|64fs|128fs|256fs>
set I2S bit clock rate, ex: wov cfgsfs 48000 and wov cfgbck 32fs
means audio sampling rate are 1536Khz (32*48000).
> wov cfgfmt <i2s|right|left|pcma|pcmb|tdm>
set I2S but format, ex: wov cfgfmt right means audio I2S format are
Right-Justify.
> wov cfgmod <off|vad|ram|i2s|rami2s>
set audio operation mode ,ex: wov cfgmod i2s means audio output via
I2S bus.
> wov cfgtdm <0~496 0~496 0~3>
set TDM time slot, the first values is left channel delay counter,
the second is right channel, and the 3rd is startup counting condition.
(chosen LRCK raising or falling edge) .
[Note: this command is just working on cfgmod equal to tdm]
> wov cfgget
retrieve above settings.
> wov vadsens
(currently not support, reserve for next version)
> wov gain (0~31)
set audio data gain value, ex: wov gain 10 means setting audio digital
gain are 10dB.
> wov cfgdck <1.0 | 2.4 | 3.0 >
set digital MIC PDM clock rate. ex: wov cfgdck 2.4 means PDM clock
are 2.4Mhz.
-----------------------------------------------------------------------
This CL also adds the chip ID (0x24) for npcx7m7w. So the console
command "version" can show the chip is npcx7m7w.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST="BOARD=npcx7_evb make"; Flash the image on EVB; Test WoV function
with console commands described above.
Change-Id: Ief2b3e89edbd3e6d2a9d82d317a93c9f0b7a20cd
Signed-off-by: Dror Goldstein <dror.goldstein@nuvoton.com>
Signed-off-by: Simon Liang <CMLiang@nuvoton.com>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/897314
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
With this change, we can do flashing via flex cable.
BRANCH=none
BUG=b:35573714
TEST=To run "~/trunk/src/platform/ec/util/flash_ec --board=reef_it8320"
and flashing is done and cold reset automatically.
CQ-DEPEND=CL:855978
Change-Id: I078afa6d6f6f8f7bf60a1677e4c357dbe906e7dc
Signed-off-by: Donald Huang <donald.huang@ite.com.tw>
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/344481
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Meowth also seems to take enough power when flashing without a battery.
Zoombini has a similar issue, and the fix is to wait 1s to let the
voltage level stabilize before flashing.
This commit just waits 1 second before flashing.
BUG=b:65694390
BRANCH=None
TEST=./util/flash_ec --board meowth; Verify it succeeds without a battery.
Change-Id: Ida34a7eb923187940afe05a32d200b48e71aaa9f
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/894370
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Caveh Jalali <caveh@google.com>
This CL modified the flash_ec and openocd script to support flashing
npcx7m7x chip on npcx7_evb.
BRANCH=none
BUG=none
TEST=Change CHIP_VARIANT to npcx7m7w in board/npcx7_evb/build.mk;
"BOARD=npcx7_evb make"; Move npcx7_evb from array BOARDS_NPCX_7M6X_JTAG
to BOARDS_NPCX_7M7X_JTAG in util/flash_ec; Connect servo JTAG to npcx7
EVB; "./util/flash_ec --board=npcx7_evb"; Make sure the programing
succeed and EVB bootup.
Change-Id: I9d448f55321330cbe9a7103d2b617617963ea307
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/858989
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
A few things needed to be moved around in order for flashing the npcx7
to work over CCD. This commit makes those changes and fixes a small bug
with the serial number parameter for raiden devices. (It just needed a
space). It also fixes using just a SuzyQable to flash.
BUG=b:71548795
BRANCH=None
TEST=`./util/flash_ec --board meowth` with a servo_v4 and verify that
flashing is successful.
TEST=Repeat above test with a servo_v2.
TEST=Repeat above test with a servo_micro.
TEST=Repeat above test with a SuzyQable.
Change-Id: I8ff22fb1d2a5fe7af2ad30a14bf896dbae65c024
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/851354
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Configure it as a fingerprint MCU.
Currently use ZerbleBarn as a proxy for it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=flash and run the image on ZerbleBarn,
do a finger image acquisition with the 'fptest' console command.
Change-Id: I6e060c2d1e950ec81092088e1793b186fc0a5fa0
Reviewed-on: https://chromium-review.googlesource.com/806169
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This CL adds scripts to support updating ec image to the SPI flash by
UUT(UART Update Tool) for npcx ec. A new array BOARDS_NPCX_UUT is
introduced to include the board name which will use the UUT mechanism.
The detail of test setup/procedure is listed below:
1. Connect the following singals between npcx7 evb and Servo board v2.
NPCX7 EVB Servo V2
---------------------------------------
GPIO64/CR_SIN <--> UART1_SERVO_DUT_TX
GPIO65/CR_SOUT <--> UART1_DUT_SERVO_TX
VDD_3.3V <--> PPDUT_UART1_VREF
2. Manually pull the UUT mode strap pin(GPIO65/CR_SOUT) to ground with a
10 KOhm resistor.
3. Assert a EC VCC1_RST reset or issue a Power-Up reset.
4. Remove the pull-down in step 2.
5. Move npcx7_evb from array BOARDS_NPCX_7M6X_JTAG to BOARDS_NPCX_UUT in
flash_ec.
6. ./util/flash_ec --board=npcx7_evb.
BRANCH=none
BUG=none
TEST=Follow the steps above. Dump the SPI flash content to a file via
JTAG. Compare the file and ec image. Make sure their content is all
the same. Check the ec can reboot after programming.
Run "sysjump rw"; make sure RW image works well.
Change-Id: Iada5acb53179bdb78459c4fea7488fd2691575b6
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/826763
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
It's a dead board.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I9f5530afdea07bb5787fa2b674984147f8425fba
Signed-off-by: Philip Chen <philipchen@google.com>
Configure GPIOs to match grunt proto v1.1 schematic.
Change EC chip to npcx7m6f.
Minimal board.c/h, just enough to build.
BUG=b:64935726
BRANCH=none
TEST=make BOARD=grunt
Change-Id: I1a1f581c7ee7b80808c0dde179bc3ee0d69f960e
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/754302
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The llama is a South American relative of the camel, though the llama
does not have a hump. These sturdy creatures are domestic animals used
by the peoples of the Andes Mountains.
BUG=None
TEST=`make buildall -j`
BRANCH=None
Change-Id: I55dbd8d5b0b14c41e27c4ef473833563f38878c3
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/761298
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
One can pass either a board name (e.g. hammer) or a chip name (stm32)
to the flash_ec command. If given a board name, will map to a proper
chip name and then call its chip-flashing method.
The NEED_SERVO variable ("no" if servo not needed) was set according
to the board name. It was broken if only given a chip name. It should
be set according to the chip name.
BUG=b:68943874
BRANCH=None
TEST=Flashed the Staff firmware
SERVO $ dut-control ec_boot_mode:on
DUT $ ectool gpioset PP3300_DX_BASE 0
DUT $ ectool gpioset PP3300_DX_BASE 1
DUT $ flash_ec --chip stm32_dfu --image staff_ec.bin
SERVO $ dut-control ec_boot_mode:off
DUT $ ectool gpioset PP3300_DX_BASE 0
DUT $ ectool gpioset PP3300_DX_BASE 1
Change-Id: I1799f083115bfdf203a405733c5baefadbe3fe3e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/755614
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Flashing STM32 requires the EC UART. The path of EC UART PTY was
originally set under some conditions which didn't reflect the case.
Instead of fixing these conditions, this change simply moves it
inside flash_stm32() as other flash functions don't need EC UART PTY.
BRANCH=none
BUG=b:67010776
TEST=Used servo-micro to flash_ec a STM32 EC, no error on getting EC
UART PTY.
Change-Id: I20c31de8e6c7a99fde259f4f397e53325ee80b07
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/745101
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>
On zoombini, we were taking enough power that the voltage dipped for a
little bit. This commit adds a 1 second delay after applying SPI VREF
but before actually flashing the EC.
BUG=b:65694390
BRANCH=None
TEST=`./util/flash_ec --board zoombini` still works.
Change-Id: I431cbfcc569fd5369971b06dedb85e8d5fdb9a32
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/722354
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
