An earlier commit posted fan-change info to the console. Turns
out it's a little too annoying, and disabling it with the "chan"
command would also hide messages related to thermal shutdown.
This just removes those updates completely.
BUG=chrome-os-partner:33775
BRANCH=ToT,samus
TEST=make buildall -j
Watch the EC console. The messages no longer appear.
Change-Id: Ie8c48d7ce493a25bf0afbd26d280a87dda882c1a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229623
Reviewed-by: Randall Spangler <rspangler@chromium.org>
It's really annoying to have to type two different commands. If I
want to read a location and then write it and then read it back
(which often happens when poking at hardware), then this:
rw 0x40570008
rw 0x40570008 14
rw 0x40570008
is much easier to enter than this:
rw 0x40570008
ww 0x40570008 14
rw 0x40570008
The "ww" command is still there, if you're really attached to it.
BUG=none
BRANCH=none
TEST=manual
Tried the example above. It worked.
Change-Id: I2302ed60df3dd3ec2224afa7c32d997bd2468ec1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229660
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The pull-up on USB D+ is by default enabled, as needed by DFU mode. In
normal operation, we should disable it unless case-closed debugging is
enabled.
BRANCH=None
BUG=chrome-os-partner:33544
TEST=Build ryu
Change-Id: I18d216d8fff61640e4fbc3ce259209b3f149abf1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229797
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If we need to debug host commands, we can always turn on hcdebug and see
the content of host command packets. Let's remove the console messages
to save flash space. This reduces the code size by ~450 bytes.
BUG=chrome-os-partner:32203
TEST=update Zinger with Samus
BRANCH=None
Change-Id: Id72e813dd1217239edcef02f45dfebc06597d6c7
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220510
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Add support for DR_swap, data role swap command.
BUG=chrome-os-partner:33686, chrome-os-partner:28343
BRANCH=samus
TEST=test with samus and zinger. use "pd 1 swap data" command
and verify data role swaps by using twinkie and "pd 1 state".
Change-Id: I410309199cdeecb26847a6bf217523fdfe688cba
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229192
At 48Mhz, due to the flash accessing requiring 1 Wait-State, we need to
enable the flash prefetch buffer to get the full CPU execution speed.
The bit used to enable flash prefetching was fixed :
crosreview.com/219921 , but the change was overriden by the CL enabling
the STOP mode : crosreview.com/219933
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:28335
TEST=plug Zinger into a PD power sink, with the Twinkie protocol
analyzer observe how long Zinger takes to send back GoodCRC after the
Request and SinkCap messages. With the patch, the average delay is going
from 160us to 50us.
Change-Id: I9de1bc10e14485919046c841eea16de3c3b3c800
Reviewed-on: https://chromium-review.googlesource.com/229671
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Implement the API expected by common/timer.c
BUG=chrome-os-partner:33699
BRANCH=none
TEST=manual
Run the "gettime" and "timerinfo" and "taskinfo" and "waitms"
commands. Compare the elapsed time with the real world. They seem
to match.
Change-Id: Ie5acae76780ee09e7dfb6cc0282de25f8063e96f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229642
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Disable most of the pd console command to save space. The command
can still be used with subcommands "state" and "dump" to get state
information and change debug level.
BUG=none
BRANCH=none
TEST=make buildall with CONFIG_CMD_PD defined and undefined. Also
undefined the config option and loaded onto samus and verified that
the pd 0 state command still works.
Change-Id: Ie41bad53122a1e2a9ef4bad6423b9cdc85f53742
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229420
Reviewed-by: Vic Yang <victoryang@chromium.org>
Added hibernate wakeup pin(EC_WAKE) that covers both AC_PRESENT and LID_OPEN. It pulses a
rising edge when either of them have a rising edge.
The power button was also inverted to handle hibernation better, now it's low
except when pressed it temporarly goes high.
BRANCH=None
BUG=chrome-os-partner:33269 chrome-os-partner:32782
TEST=make BOARD=jerry
Try hibernating, all wakeup sources should work, it shouldn't stay hibernated.
All signals(AC, lid, power button) should work equally well as in pinky.
Change-Id: I894135bdfd5600919296f7510dc9cd1acd567ddc
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228763
This enables forwarding of the local PD/EC console
over debug USB. It gates the console functionality
based on the CCD mode that is set.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable partial CCD mode on ryu and verify that it is
enumerated by the host correctly, but doesn't respond
to console input, and doesn't generate output.
Enable full CCD mode on ryu and verify that it is
enumerated and that the console works as expected.
Verify that the console still works by default on the
discovery-stm32f072 board.
Change-Id: I0325ce9689486c41387d6075330be1d7d42f1d42
Reviewed-on: https://chromium-review.googlesource.com/229342
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
This provides a framework for additional work. It
exposes an API (ccd_set_mode) that can be used by the
PD code to enable Case Closed Debug. Enabling CCD will
result in the USB 2.0 lines on Ryu (proto 2) to be
disconnected from the AP and for the USB peripheral to
be enabled and connected to the host. The result is
an enumerated device with no interfaces.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable CCD ryu_p2 and verify that it is enumerated
by the host correctly. This requires a reworked
Ryu (proto 2 with pullup).
Change-Id: I1fbecdd5f94a61519cfc18c5e087892c6bd77fde
Reviewed-on: https://chromium-review.googlesource.com/229139
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Previously enabling USB would automatically (using an
init hook) initialize the USB peripheral. This would
take over the GPIO lines assigned to the USB module.
This is not OK on Ryu for Case Closed Debug because it
interferes with the AP's access to the USB 2.0 lines
even when not in Case Close Debug mode.
This change adds a configuration option to inhibit this
default initialization of the USB peripheral. It also
renames the existing CONFIG_USB_INHIBIT to
CONFIG_USB_INHIBIT_CONNECT now that there are two
possible inhibitions.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: I6734357131b4356e3d4164349d6c74deac196ce5
Reviewed-on: https://chromium-review.googlesource.com/229138
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Allow a charge port to be selected as the override port, which means it
will always be selected as the charge port, if any charge supplier is
available.
BUG=chrome-os-partner:32003
TEST=Attach PD charger and BC1.2 charger. Verify that active charge port
switches to BC1.2 after running `chargeoverride [port]` from console.
Also, pass unit tests.
BRANCH=Samus
Change-Id: Ia1b48ca89641842d51be7eed3b92d36d3eedc9ef
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227730
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When a PD charger is detected, gets its max charge capability, but
initially negotiate for its minimum charge mode. If we later determine
that the port will be the one active charge port, re-negotiate for the
max charge capability.
BUG=chrome-os-partner:32003
TEST=Manual on Samus. Plug in Zinger, verify that current limit is
initially set to 500 mA, then switches to 3000 mA shortly after. Plug in
two Zingers, verify that one provides 3000 mA current while the other
negotiates to 500 mA. Verify that the 500 mA charger bumps up to a high
current once becoming active.
BRANCH=Samus
Change-Id: Ifa562b72d763642fc8bd62bc7f5aaa4eda1ef950
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/225922
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This simply renames ryu to ryu_p1, and ryu_p2 to ryu. 'ryu_p1' will be
kept for a while and will be decommisioned when most developers make
switch to the new boards.
BRANCH=None
BUG=chrome-os-partner:33583
TEST=Build ryu and boot on P2 board.
Change-Id: Ief61c64c6aefdaeae76ac7b86e0ea28131810aa1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229291
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This can save 80mW in S3 when the lid is open.
BUG=chrome-os-partner:33057
BRANCH=samus
TEST=boot on samus, go to suspend with powerd_dbus_suspend and ensure
that the touchscreen is in reset.
Change-Id: I63c24ad5a8f8cb389ee0d6139edbbb46dec5423b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229106
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Previously the usb driver used #ifs to select a mechanism to
enable and disable the DP pullup. This doesn't scale well,
especially when the knowledge of how to do this is not known
to the chip specific code, but instead is board specific (as
it is with the STM32F373).
This change uses the build systems ability to build chip family
specific files per build to select the appropriate behavior.
And on the STM32F3 family of parts it just calls out to a board
specific pair of connect/disconnect functions.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: I976e02fbc7acbb0f85817d7295b26ee9ecab0711
Reviewed-on: https://chromium-review.googlesource.com/229040
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Previously the USB RAM size was off by a factor of two
for chips that required 32-bit alignment of accesses,
even though the underlying memory was 16-bits in size.
This change adds an additional configuration for the
access size (it still assumes that the underlying memory
is 16-bits in size) and uses that to adjust the USB_RAM
memory section in the linker scripts.
This change also removes the default values for the USB
RAM from stm32/config_chip.h because they mask issues
when new chips are added. It is better for a new chip
to fail to compile until these values are provided.
Finally, this change introduces a common USB API header
so that common code doesn't need to include the STM32
specific header.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: Id118627f53e9e8ff1bd09fb51f1f9634ff495d19
Reviewed-on: https://chromium-review.googlesource.com/228833
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
The next board revision will reset the ID to zero, so we
can no longer rely on the old versions for workarounds.
However those boards no longer work without modification due
to GPIO changes anyway so we can just remove the old code
and since there are no more workarounds left remove the board
version enum since it is no longer used.
BUG=chrome-os-partner:32895
BRANCH=samus
TEST=build and boot on samus EVT2
Change-Id: I3f76cda6b533fe195a743baa7981a0e67d371313
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229003
Reviewed-by: Alec Berg <alecaberg@chromium.org>
During the discovery identity phase of type-C devices that support it
there is some info that could be useful to kernel & userland for
policy decisions. CL starts by passing up the vid, pid & product type
(ptype) of the discover identity VDO.
BRANCH=samus
BUG=chrome-os-partner:32650
TEST=manual,
From host, w/ hoho in port 1
ectool --name=cros_pd infopddev 1
Port:1 Device:4 Hash: 0x57b1e4e0 0x7204075f 0x65c0fa72 0xdcca15ed 0xf3231237
Port:1 ptype:6 vid:0x18d1 pid:0x5010
Change-Id: Ie05d191149ada0ec860b713d780b0345eab3a647
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226899
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Once a mode is entered object position (OPOS ... AKA alternate mode) field in
the VDM header should always track that mode.
CL fixes DP status & config messages which did not add the correct OPOS. In
fixing I mapped to the UFPs function pd_alt_mode which for the DFP did require
the addition of port parameter. Finally I cleaned up code to use this function
throughout common policy layer where previously I'd just accessed the pe
structure directly.
BRANCH=samus_pd
BUG=none
TEST=manual, compiles, insert hoho/dingdong into samus and see OPOS=1 from samus
for enter, dp_config, dp_status SVDMs
Change-Id: I66448c3386be01bae58768632da216aff41a9a30
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228130
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Wait to send source cap packet until port partner is showing
UFP on CC line. This is necessary because while we are applying
VBUS, the other side could toggle its role, and when VBUS is
finally up, we must wait to send source cap until other side
is pulling down.
BUG=none
BRANCH=samus
TEST=make buildall
Change-Id: If7e811913f5ec9eed28171ffca0cec98712b96fe
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227722
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Move tDRPHold timeout to after vbus is on. This makes sure we give
the right amount of time for a dual-role device to recognize that
it should be the UFP.
BUG=none
BRANCH=samus
TEST=make buildall
Change-Id: I8432eb172783c689d636a435073bb86828488b06
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227720
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
The console code never worked with the old style STM32 USB
peripherals because no chips with that version of the peripheral
were being used. The STM32F373 uses the older USB peripheral.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: I77d36c33712521d7840b4e3ca02ebbea5de3d5df
Reviewed-on: https://chromium-review.googlesource.com/227741
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Add delay for power supply startup time before sending source
capabilities packets.
BUG=none
BRANCH=samus
TEST=load on samus, plug in C to A receptacle adapter, see that
VBUS enabled before source cap packet sent.
Change-Id: If3b595e1671d089e859693b420841a639fdb146b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227423
Initial versions of the USB Power Delivery (v0.7) had this bit defined but in
later versions its been removed and should be zero.
BRANCH=samus
BUG=none
TEST=manual,
capture message header with twinkie and see that message header <15> is no
longer asserted.
Change-Id: Ib3e099322b681a49a75b07e1ff929083c71eb44a
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227421
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
When PD traffic is seen on CC1 / CC2, turn on respectively the green LED
and the red LED.
When the samples are properly exported through USB without overrun, the
blue LED is lightly blinking.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=plug a Zinger into a power sink through the Twinkie and see it
blinking in a different color depending on the plug polarity.
Change-Id: Icde9de5c807045d4df725e702690246367bcfd1d
Reviewed-on: https://chromium-review.googlesource.com/226590
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
For request message, add the operational and max current for each
board. If the requested power is less than the operational power
required, then set mismatch bit.
BUG=none
BRANCH=samus
TEST=make buildall. load onto samus, plug in zinger and see
that request 20V, operational current 3000mA and max
current of 3000mA.
Change-Id: I4df45d88b7e060f66ff5b806f6fe30803f1afcf7
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227393
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
I managed to mess this up previously, the STM32L and STM32F should
use uint32_t and so should the STM32F3 it turns out. Only the
STM32F0 uses uint16_t right now.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ieca4368c4280a0f25c928b6670aeccbaf8eabbef
Reviewed-on: https://chromium-review.googlesource.com/227740
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@google.com>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Update GPIOs to reflect changes in Plankton v3. The default values are
set so that case closed debugging is disabled. Also, rename CABLE_FLIP
to MUX_FLIP to match the schematic. (Plus that MUX_FLIP is a more
suitable name for what it does.)
This change be functionally compatible with Plankton v2, except that the
change on PA7 causes a 0.33mA leakage current on Plankton v2, which
should not be a problem.
BRANCH=None
BUG=None
TEST=Compile only
Change-Id: I50c56a1c583015d3624ec9f5901ed477d07233f4
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@google.com>
Reviewed-on: https://chromium-review.googlesource.com/227980
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Remove redundant 5V source PDOs in source cap packet. We only
need one 5V advertisement with the maximum current that we can
provide.
BUG=none
BRANCH=samus
TEST=make buildall
Change-Id: I94a01813787eb92fafbf600dcbbc8a2f0aa69e2b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227392
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Add support for PR_SWAP command as per PD specification.
BUG=chrome-os-partner:28343
BRANCH=samus
TEST=test by connecting two samus' and running 'pd 1 swap power'
from console. verified that both sides switch power roles by
observing console output. also tested against third party
devices.
Change-Id: I0e8738b544de9f9a4348250630e67d0fefb4486d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/225559
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Update source and sink capacity tables for all PD boards. As
per spec, the first entry in both tables must be a fixed power
supply PDO. Added dual-role capable bit to fixed PDOs and added
new state variable to keep track of that information for each
port. This will be used to make decisions in charge manager and
to pass up via host commands.
BUG=chrome-os-partner:28869
BRANCH=samus
TEST=make buildall. use "pd 1 status" to check
if part partner is dual-role capable and check zinger is not,
C to A receptable adapter is not, and another samus is.
Change-Id: I49f034a372bc145cd524577c17ca210eec4c1013
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227170
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Modules that are enabled are listed below:
- Power Sequencing
- Keyboard Scan and Protocol
- LPC to support Keyboard
- Power Button Task
ec.spi.bin has to be generated manualy using
pack_ec.py
BUG=None
BRANCH=None
TEST=Tested on Stargo-Proto board
Change-Id: Ic5d504c3d6e9c7c5f3482fb7e9e37800b6274824
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/226303
Reviewed-by: Vic Yang <victoryang@chromium.org>
The fans on samus have a recommended minimum duty cycle of 20%
while running, but 30% in order to start. We've been using the
EC's built-in fan controller for the start requirement, but it
has a minimum fast-start duty cycle of 50%. It turns out that
that speed is noticeably noisy.
This change handles the startup with logic in the EC instead, so
that the fan only tries to spin at 30% initially (or if it drops
too much below the minimum turning speed).
BUG=chrome-os-partner:33429
BRANCH=ToT,samus
TEST=make buildall -j
Boot the system, let it idle with the browser windows closed, the
browse a bit, then idle. Listen for changes to the fans.
Before, I could hear the fans kick in and out as the AP load
changed. Now it's much quieter.
Change-Id: Id35215520c064eb6843686ec8bb5f3618dac6cf6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227658
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When the battery cut-off command is issued with external power present,
the battery can end up in one of the following two states:
1. The battery stays responsive but is waiting for the external power
to go away.
2. The battery decides to cut itself off right away.
In case 1, we are already avoiding charging the battery again, so we're
good. However, in case 2, the charge state machine mistakenly thinks the
battery is dead and tries to revive it. Fix this by checking if the
battery is cut off before starting to revive it.
BRANCH=None
BUG=chrome-os-partner:33372
TEST=Cut off the battery with external power connected. Wait for a while
and then disconnect external power. Check the battery is sure cut off.
Repeat for several times.
Change-Id: Icf343b168a556a490bc1786802a8a6e230863a28
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227521
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
