The rambi board has issues using the SERIRQ method
for triggering the keyboard IRQ. Namely, the current
level-shifter in place for the bidrectional SERIRQ
signal introduces delay resulting in the SERIRQ
being out of phase with the clock. Moreover, there
appears to be a mismatch of expectations with the
number of start frames on the SEIRQ line. Bay Trail
uses a fixed 8 while the TI docs suggest it only
supports 6.
BUG=chrome-os-partner:23965
BRANCH=None
TEST=Built and booted rambi with keyboard working in
kernel with interrupts.
CQ-DEPEND=CL:177223
Change-Id: I05c2b113d801b3fc434a402620cebae0301839f2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177189
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is the initial commit of mec1322 support. This includes:
- Basic GPIO driver. Interrupt not supported yet.
- Microsecond timer
- UART driver
The script to pack the firmware binary will be checked in in
following-up CL.
BUG=chrome-os-partner:24107
TEST=Build and boot on eval board
BRANCH=None
Change-Id: I9013c908049d1f740f84bb56abca51b779f39eef
Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175716
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The keyscan task is short enough on stack space that turning on
keyboard debugging causes a stack overflow. This was previously not
the default, but https://chromium-review.googlesource.com/#/c/174373/
made it the default. Reverting that change just masks the problem;
enabling keyboard debugging on Spring would still cause a stack
overflow.
Rather than reverting that change, increase the stack size of the
keyscan task so that it doesn't overflow. There is sufficient space
to do this. Even after increasing the keyboard stack from 256 bytes to
320 bytes and doing a 'sysjump rw' to force jump tags to populate,
'shmem' reports 132 bytes free.
BUG=chrome-os-partner:23834
BRANCH=none
TEST=Boot Spring.
ksstate on
Bang on keyboard for a bit
taskinfo -> shows KEYSCAN task at 292/320 bytes free
sysjump rw
shmem -> shows 132 bytes free, 0 used
Change-Id: Idf9fdce5b9e6ca4d05d80a62ae9ea831ed508e3a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177355
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For some reason the SCI# is not working properly when the
LPC module controls the pad. Instead, utilize CONFIG_SCI_GPIO
option and put that GPIO pad into open-drain mode.
BUG=chrome-os-partner:24003
BRANCH=None
TEST=Built and booted rambi with dependency change. 'lidclose' and
'lidopen' cause ACPI interrupts.
Change-Id: I5df455bc2fc9af4c43517a93c5a35dc598fd54e9
Reviewed-on: https://chromium-review.googlesource.com/176805
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
The ACOK buffer from EC to PCH was not being triggered when
the chipset powers up or down, instead it was only triggering
when AC state was changed.
Since we want it to be driven in S5 I added HOOK_CHIPSET_PRE_INIT
to the power sequence in the G3S5 state transition.
BUG=chrome-os-partner:23752
BRANCH=none
TEST=power on samus proto1b with AC inserted and see PCH_ACOK
go high, power off and see it go low again. Ensure that it is
also changed with AC state transitions.
Change-Id: I4cbe123322e234dc07f10fd1cdff5a8b771a4e02
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176630
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The backlight_interrupt() function is defined to NULL if the magic
CONFIG_BACKLIGHT_REQ_GPIO is not defined.
Enabling that exposed an issue where the backlight workaround was
attempted in interrupt context and should instead be deferred since
it involves i2c transactions.
BUG=chrome-os-partner:23752
BRANCH=none
TEST=build and boot on samus proto1b and see recovery screen
Change-Id: Id1377033c791a5c279fdb4faeecc4b2c0d142eaa
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176514
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
In board.c, we initialize this struct:
struct i2c_port_t {
const char *name; /* Port name */
int port; /* Port */
int kbps; /* Speed in kbps */
};
extern const struct i2c_port_t i2c_ports[];
The port field refers to the physical I2C bus on the EC.
Meanwhile, in board.h, we've identified the bus where each I2C device is
attached:
Up until this CL, we've been picking one of those device-to-bus macros to
initialize port fields of the i2c_ports[] array. That's wrong and confusing.
This change specifies the physical channel with the physical number.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=manual
Renaming only. There should be no change in observed behavior.
Change-Id: I5427c26290572133f060b6cf0d9ebea5015adba1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176176
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Added low power idle functionality to rambi but left it off by default.
To turn it on, define CONFIG_LOW_POWER_IDLE in rambi's board.h file.
BRANCH=none
BUG=chrome-os-partner:23947
TEST=Verified that the EC does not go into deep sleep when in S0, and that
it does go into deep sleep in S3, S5, and G3. Tested to make sure that
flashec works when the EC is in low speed deep sleep. Also verified
that the EC console times out after the timeout period and that it wakes
up on the next command. Did not measure power usage.
Change-Id: I0ab1a2dc7ca7ae4577fe5d0894c1bf82205dfea6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176159
Reviewed-by: Todd Broch <tbroch@chromium.org>
The XPSHOLD is not floated. It connects to +1.8V_VDDIO, which indicates
high when AP is on. So, bring it back.
Also remove the duplicated GPIO definition (GPIO_PWR_LED1).
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
BUG=chrome-os-partner:23929
BRANCH=nyan
TEST=verified on nyan. successfully boot up the machine.
Change-Id: I293a899bcdf255f36f6117627f66ed8231c9a70f
Reviewed-on: https://chromium-review.googlesource.com/176046
Reviewed-by: Yen Lin <yelin@nvidia.com>
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Commit-Queue: Yung-chieh Lo <yjlou@chromium.org>
Tested-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This adds the driver and a console command to read an Intersil ISL29305
light sensor connected to the EC.
BUG=chrome-os-partner:23380
BRANCH=samus
TEST=manual
Run the "als" command from the EC console, while pointing the sensor in
various directions. It should give higher numbers when facing a light
source. If you get "Error 1", it means the ALS isn't powered.
Change-Id: I855ed64dab7fc60e29126ab3e97669be24dc6a64
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176056
Rambi has a 65W adapter, so shouldn't be asking for 4A @ 19V.
BUG=chrome-os-partner:23597
BRANCH=none
TEST=charger command shows I_in = 3392 mA (which is the closest step below
3.42A that the charger can set).
Change-Id: I4b044b594566a6abcb94c3f674a0d287c8fc2b30
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175611
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Refine the GPIO list according to the schematic. Comment out the XPSHOLD in
power/tegra.c for compiling. Will fix later.
BUG=None
BRANCH=None
TEST=emerge-nyan chromeos-ec &&
make runtests -j 32 && make BOARD=nyan tests -j 32
Change-Id: Id0d682fd5d48e8a8a07785e86c07f45f07d866ab
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175534
Modify board.h and board.c to describe both fans.
BUG=chrome-os-partner:23530
BRANCH=samus
TEST=manual
Power things up, poke at the fans through the EC console. Observe that
they're both working and controllable:
faninfo
fanset 0 2000
faninfo
fanduty 1 30
faninfo
fanauto 0
faninfo
fanauto 1
faninfo
Change-Id: I2ba9356f084be12dab0fe0b9a004f66feace1878
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175369
This adds explicit "int fan" args to the exported functions from
common/fan.c: fan_set_percent_needed() and fan_percent_to_rpm(). Within that
file, multiple fans are handled independently.
This is not complete, though. Host commands and sysjump support still only
handle a single fan, so at the moment multiple fans are treated identically
in those cases.
BUG=chrome-os-partner:23530
BRANCH=none
TEST=manual
All boards build, "make runtests" passes.
On a multi-fan system, the EC command "faninfo" displays multiple results:
> faninfo
Fan 0 Actual: 0 rpm
Fan 0 Target: 0 rpm
Fan 0 Duty: 0%
Fan 0 Status: 0 (not spinning)
Fan 0 Mode: rpm
Fan 0 Auto: yes
Fan 0 Enable: yes
Fan 1 Actual: 0 rpm
Fan 1 Target: 0 rpm
Fan 1 Duty: 0%
Fan 1 Status: 0 (not spinning)
Fan 1 Mode: rpm
Fan 1 Auto: no
Fan 1 Enable: no
>
and the "fanduty", "fanset", and "fanauto" all require the fan number as the
first arg:
> fanduty 0 30
Setting fan 0 duty cycle to 30%
> fanset 1 2000
Setting fan 1 rpm target to 2000
> fanauto 0
> fanauto 1
On single-fan systems, there is no visible change.
Change-Id: Idb8b818122e157960d56779b2a86e5ba433bee1b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175368
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Update comments with more info, or remove if no longer applicable.
No code changes.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: I5b56eeb500bc0f00e84e91ef99684f4b1b310972
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175418
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
- disable PP1800_PGOOD internal pullup
- add PP3300_DSW_EN control on PF6, turned on in S5 and off in G3
- change PCH_WAKE_L and PCH_PWRBTN_L to open drain signals
- add PCH_BL_EN interrupt on PM3 for rising edge to put backlight
controller into PWM mode, remove 1 second hook
- add samus-specific extpower handler for AC_PRESENT to buffer the
AC_PRESENT input to the new PCH_ACOK output on PM6. this is driven
high in S5/S3/S0 when AC_PRESENT is high, otherwise driven low.
BUG=chrome-os-partner:23752
BRANCH=samus
TEST=emerge-samus chromeos-ec
Change-Id: Ie8ab538610e41914212ee1f3a6287b63474fb85b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175281
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
No code changes, just comment fixes. Added config #ifdefs for the
debug commands as requested; they're enabled for Spring, so
functionality is unchanged.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build spring; see that ilim and batdebug commands still exist
Change-Id: I7c9f12281afa7ec68aa7e62dcfcd51682d88a16a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175216
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Rather than compile it by default for host-based tests, only compile
it for the few tests that actually use it. Since those (and all
boards) now only use if if they also have a keyscan task, we can get
rid of the #ifdefs in keyboard_mkbp.c as well.
And remove a TODO we'll never do...
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards; pass unit tests. These pass:
util/make_all.sh
make BOARD=pit tests
Change-Id: I44d1806cfb375027a7ed0b33a5e9bdbbed8ccddc
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174513
There is a logical difference between PWM controls for things like
backlights and fan controls for actual fans. This change separates them into
two different data structures, for better abstraction.
BUG=chrome-os-partner:23530
BRANCH=none
TEST=manual
make runtests, make all boards, test on Link and Falco.
Change-Id: Ib63f2d1518fcc2ee367f81bf5d803360c1aa5c76
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175151
Instead of just configuring fan support as yes/no, we'll use it to specify
the number of fans on the board. Undefined (not zero!) means no fan support
at all.
Syntax change only. No new functionality.
BUG=chrome-os-partner:23530
BRANCH=none
TEST=manual
make runtests, build all platforms, build and test on Link.
Change-Id: Iff65efa69e05f3e1a54fdc2a8da9001b4e8487ca
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175150
This looks like a lot, but it's really just moving the non-board-specific
stuff from chip/lm4/fan.c into common/fan.c, updating the appropriate
headers, and renaming functions to better match the new location.
This is entirely code refactoring and renaming. No new functionality.
BUG=chrome-os-partner:23530
BRANCH=none
TEST=manual
make runtests, build all platforms, build and test on Link.
Change-Id: I7dc03d6732bad83cf838a86600b42a7cff5aa7aa
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175012
If the input current limit is too high the EC sees the AC_PRESENT signal
toggle rapidly, probably due to the adapter browning out. By
trial-and-error, we found a value that seems to stop that happening.
BUG=chrome-os-partner:23449
BRANCH=samus
TEST=emerge-samus chromeos-ec
Let the battery run down a bit, plug the adapter in, watch the EC console to
see what happens. Make sure it doesn't go nuts.
Change-Id: I812685efd312fce82eb117bb722425ae6276fdd1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175037
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Due to power topology, PP5000 needs to be enabled as soon after
PP3300_DSW as possible. Since PP3300_DSW is what powers the EC, the
EC needs to turn on PP5000 by default and leave it on.
BUG=chrome-os-partner:23673
BRANCH=none
TEST=reboot ap-off (this boots the EC without doing AP power sequencing)
gpioget -> shows PP5000_EN=1, PP5000_GOOD=1
Change-Id: I5d493877d330b2543a493f8a2f3411003d5964ca
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174989
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
These were being driven push-pull, causing leakage.
BUG=chrome-os-partner:23639
BRANCH=none
TEST=rambi still boots main processor out of reset
Change-Id: I39a18e48307b66fc767ce2c8256d828d4e6962e0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174897
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
To conform to our mutating naming conventions, let's rename the
chip-specific PWM header file to have the string "_chip" in it.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: I6584be8e54fd24c8638559817e150c707bc0edb5
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174884
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Needed for shipping systems. Puts battery into shutdown mode until AC
reapplied.
BUG=chrome-os-partner:23634
BRANCH=none
TEST=With system on battery power, 'battcutoff'. System will shut off
after a few seconds. Power button will not turn it on. Plugging
AC power in will turn system back on.
Change-Id: I10a28c3c21623508dc8e4dee1cc5dc8d6fb9a6af
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174888
Reviewed-by: Dave Parker <dparker@chromium.org>
Update the comments in several board.c files to accurately describe which
pwm control circuit is being used for what purpose.
BUG=chrome-os-partner:23530
BRANCH=none
TEST=none
No code changes, comments only.
Change-Id: I29cef5a2bfee4d7d44bedd092783d9f1d2ea5ef3
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174901
Picked some reasonable values. Subject to later tweaking.
BUG=chrome-os-partner:23634
BRANCH=none
TEST=On AC power, charging = yellow
On AC power, done charging = green
No battery = blinking red
On battery, AP on = dim green
On battery, AP off = off
Change-Id: I2eb901ea4de98fec8cd83e403d6ed8a06a2a9ca9
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174778
Reviewed-by: Dave Parker <dparker@chromium.org>
Using best-guess numbers for input current limit. Battery voltage and
temperature limits are set from actual battery spec.
BUG=chrome-os-partner:23597
BRANCH=none
TEST=battery and charger commands print reasonable info
battery charges when system plugged in
Change-Id: I812276cbe46c8463a855c7ba3e0bfec4852e6f97
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174766
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This is tidier than every board defining its own module_id enum, and
encourages standard naming of modules.
A subsequent CL will do more cleanup (standardizing on MODULE_LED
instead of MODULE_POWER_LED and MODULE_LED_KIRBY), but it's easier to
do that as a separate CL than part of this one.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: If0fcef284fb3aa2fa145bc9ff3d1f3f2d25a2e47
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174382
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Originally, the ARM boards printed the keyboard scan matrix whenever
it changed. This generated a lot of output, so we filtered that at
the console channel level. When we refactored the keyboard scan
module, that changed so that the scan matrix was not printed by
default, and the 'ksstate' debug command was used to enable printing
it. But on ARM boards, 'ksstate on' wouldn't do anything without ALSO
using 'chan -1' to turn the keyboard console channel back on. And
without the scan matrix printing by default, there's no reason to keep
the keyboard channel off by default.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards
bang on keyboard on pit and don't see much debug output
ksstate on
now bang on keyboard and see matrix changes
Change-Id: I554b42e7582d507530cdecad7b35df71ca0e634f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174373
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Previously, it was really confusing whether I2C_PORT_HOST meant the
port where the EC was the master, or the port used to talk to the AP.
No functional changes, just a global find/replace and some tidying of
unused comments.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms; pass unit tests
Change-Id: Ia591ba4577d3399729556e0234ba0db3a0e3c5ea
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174546
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Device-specific headers belong in driver/ or chip/. The include/
directory should be for common interfaces.
Code should not normally need to include driver-specific headers. If
it does, it should use the full relative path from the EC project root
(for example, drivers/charger/bq24715.h).
Change-Id: Id23db37a431e2d802a74ec601db6f69b613352ba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173746
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This improves WiFi stability after resume since powering down may
erase or otherwise stymy the firmware.
Signed-off-by: Paul Stewart <pstew@chromium.org>
BUG=chrome-os-partner:22175
BRANCH=none
TEST=Suspend and resume bolt, make sure WiFi is still operable
Change-Id: Ia9e39464955b373e6f03a36ca5af5c475e957208
Reviewed-on: https://chromium-review.googlesource.com/174257
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>
Commit-Queue: Paul Stewart <pstew@chromium.org>
CG_CTRL0 is already set to 2 by pmu_init_registers(), and the battery
charge rate hack was temporary.
BUG=chrome-os-partner:23425
BRANCH=none
TEST=build daisy
Change-Id: I863c8d6d5d5f30375dce14b7d2a30e9e710ef969
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173915
Reviewed-by: Jeremy Thorpe <jeremyt@chromium.org>
This dev board hasn't seen much love. Add bug links for the unloved
bits and remove an empty interrupt handler.
BUG=chrome-os-partner:23494
BRANCH=none
TEST=build mccroskey
Change-Id: Ic521c6cba4ca438bf54f9ce77eb0cba99be57602
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174082
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Some of the comments no longer apply. Others needed more info.
No code changes; just comment changes.
BUG=none
BRANCH=none
TEST=build all platforms
Change-Id: I1d52aa9a98427a78c9d9a8cf44934fb04c3c00c8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174084
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The pin has a 100k series resistor, which is overwhelmed by the
internal pullup.
BUG=chrome-os-partner:23489
BRANCH=none
TEST=gpioget wp_l, with screw present and removed. With screw present,
signal should read 0; with it removed it should read 1.
Change-Id: I35ee867111d0d7e8626dd3ac8010e9a10f46ccf7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174094
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
There is an analog temperature line on the Samus battery connector. We don't
yet know what it means, but there's a pull-up on it, so if it's reading
close to ADC_READ_MAX, we can probably assume there's no battery.
This change says that any reading within 90% of ADC_READ_MAX means the
battery pack is not present, so we can go ahead and boot without trying to
wake it up first.
BUG=chrome-os-partner:23449
BRANCH=none
TEST=manual
Connect the battery, boot. It should happen quickly.
Disconnect the battery, boot. It should STILL happen quickly.
Running "adc" on the EC console should show an entry for "BatteryTemp". If
no battery is connected, it should read somewhere close to 4095.
Change-Id: I1e41bccb2a988d34de09192ebb0a68b91b1b0b24
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174046
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This code is pretty much the same across all x86 chipsets. In the
long run, maybe it should be moved to x86_common.c, but for now,
simply implement on bolt what we did on samus and all the other
haswell systems.
BUG=chrome-os-partner:20372
BRANCH=none
TEST=build bolt; don't have a bolt to test on
Change-Id: I01c2795192fcbd3980ed464c1e3e1dfb64fdb228
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173798
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Falco has shipped, so those numbers are evidently good enough.
Slippy is not being developed and won't be fixed. Simply note that
numbers are estimates.
Comment changes only; no code changes.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build falco and slippy.
Change-Id: I064896235626af8a5b7214b410908bba91434f7f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173911
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Changed the low power idle task to use the low speed clock in deep
sleep. The low power idle task is currently only enabled for Peppy,
Slippy, and Falco. This change decreases power consumption when
the AP is not running.
Note that the low speed clock is slow enough that the JTAG cannot be
used and the EC console UART cannot be used. To work around that,
this commit detects when the JTAG is in use and when the EC console
is in use, and will not use the low speed clock if either is in use.
The JTAG in use never clears after being set and the console in use
clears after a fixed timeout period.
BUG=None
BRANCH=None
TEST=Passes all unit tests.
Tested that the EC console works when in deep sleep.
Tested that it is possible to run flash_ec when in deep sleep and
using the low speed clock.
Change-Id: Ia65997eb8e607a5df9b2c7d68e4826bfb1e0194c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173326
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Rambi shares several of the control signals (CTL1, ILIM_SEL) between
both ports, and hard-wires some of the others (CTL2, CTL3). It still
has separate enable lines for each port.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=boot system; gpioget shows (in part)
1 USB_CTL1
0 USB_ILIM_SEL
1 USB1_ENABLE
1 USB2_ENABLE
Then do 'apshutdown' and gpioget shows
1 USB_CTL1
0 USB_ILIM_SEL
0 USB1_ENABLE
0 USB2_ENABLE
Change-Id: Ib3d321ca2b0aa7dce08ddd6633810a75641bc9a8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173737
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Every chipset had its own header file just to declare a GPIO interrupt
handler. Since this seems to be a common feature of the power
interface, make a standard power_interrupt() API provided by
chipset.h. This lets us get rid of 4 include files, and makes it
easier to add more chipsets in the future.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I1fc5612d42625ea46e0a8e16a83085b66d476664
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173745
On many of the Haswell boards, RCIN# was attached to PL6, which is not
an open-drain capable GPIO. As a workaround, we toggle it to an input
to get it into a high-Z state. Now that we understand the problem,
document it and remove the FIXME tag from the comments.
Baytrail systems map RCIN# to a different pin, so don't need this
workaround at all.
BUG=chrome-os-partner:20173
BRANCH=none
TEST=build all boards; pass unit tests
Change-Id: I545a90a523e2967fad40bd47cb47a51983a37bdb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173796
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This pin should not be driven, it is the source of massive leakage
from PP3300_EC rail into PP3300_PCH.
BUG=chrome-os-partner:23449
BRANCH=samus
TEST=emerge-samus chromeos-ec, verifed with scope
Change-Id: I8b4ba7e2e842505244b2c7c55cd661ae9363dbad
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173839
Reviewed-by: Randall Spangler <rspangler@chromium.org>
These are changes ported from other haswell systems that are
useful in development. Pause in S5 can be used for power cycle
testing and the CPU throttle is important for runin since there
is no other active throttle methods.
BUG=chrome-os-partner:23449
BRANCH=samus
TEST=emerge-samus chromeos-ec
Change-Id: I8774a466141f2cdc671a5e14705ae29433f94981
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173838
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The backlight controller EEPROM is not enabling PWM mode and
it is reloaded every time the backlight state is changed.
Since we no longer have signals indicating when the PCH is
enabling or disabling backlight this hack will read the
controller every second at runtime to determine if it needs
to enable PWM mode.
This should be removed with the next build when the EEPROM is
changed to enable PWM mode by default.
BUG=chrome-os-partner:23449
BRANCH=samus
TEST=emerge-samus chromeos-ec
Change-Id: I5c4acb1115acb7a4a5b04d09c1317778eeb2998d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173836
Reviewed-by: Randall Spangler <rspangler@chromium.org>
