Add build information (date/time/builder) which can be displayed at the
EC console.
Generate a version from the board name and the branch tag.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chromium-os:27013
TEST=on BDS, run version command on the console.
inspect the built binary.
Change-Id: Idb1f68898ba6b811d02919f17ab4536ed9f8934a
This is necessary to support SCI/SMI events.
Note that this breaks compatibility with previous ectool builds - and
probably also breaks flashrom support.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8253
TEST='ectool hello' and 'ectool flashinfo' still work
and 'ectool usbchargemode 3 1' fails with error 2
Change-Id: If39e5b6e7cdcec1b5ec765594e8492925b430b10
Implement LPC commands and ectool commands to
1. Set/get threshold temperature values.
2. Toggle on/off automatic fan speed control.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8251
TEST=Manual test
Change-Id: Ia4282a6fa47a838aed26540f33c1eb7acc92ef0e
The thermal engine monitors the temperature readings from all sensors.
For each sensor, five threshold temperatures can be set:
1. Low fan speed.
2. High fan speed.
3. SMI warning.
4. Shutdown CPU.
5. Shutdown everything we can.
Each of these thresholds can be set to either a fixed value or disabled.
Currently the real implementation of SMI warning and shutting down is
left as TODO, as indicated in the comment.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8250
TEST=Manually change threshold value to test all actions can be triggered.
Change-Id: If168dcff78ef2d7a3203cb227e1739a08eca961e
Actual RPM is now read from LPC mapped space. Modify this command to
return target RPM so we can verify EC receives target RPM.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8238
TEST=Get the same value after setting target RPM.
Change-Id: I9bcc9edd327cec1311b51fd0fcbc4a43b353daff
We now read temp sensor readings using the EC mapped space.
So we don't need this command.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8239
TEST="ectool temps 0" works.
Change-Id: I47f425e45cea992b19734f39ac6d9f6db6433d39
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8097
TEST=manual
faninfo
should report fan is disabled
powerbtn
system turns on, fan turns on
faninfo
should report fan is enabled
powerbtn
system turns off, fan turns off
faninfo
should report fan is disabled again
Change-Id: I1be67004edb23ccd18ad434c9340bfbecc22e7c4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8097
TEST=manual
faninfo
should report fan is disabled
powerbtn
system turns on, fan turns on
faninfo
should report fan is enabled
powerbtn
system turns off, fan turns off
faninfo
should report fan is disabled again
Change-Id: I8e94c142bf18d07f83bac05287bcd503a098cee7
Add a task to update temperature values in LPC mapped value space every
second. Also modify ectool to read directly from LPC mapped space.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8065
TEST="ectool temps" gives same result as "temps" from ec console.
Change-Id: Idcdef8d822724f9bd22d7e819c717cba5af5eb77
A temperature polling task is added to achieve temporal correction and
also reduce the latency of reading temperature.
Factor out sensor specific part to keep code clean.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:7801
TEST=On link, 'temps' shows all temperature readings.
Cover each sensor with hand and see object temperature rise.
Compilation succeeded on bds/adv/daisy/discovery.
Change-Id: I3c44c8b2e3ab2aa9ce640d3fc25e7fba56534b86
Add a LPC command to control USB charging mode. Also add the command to
ectool.
BUG=chrome-os-partner:7476
TEST=Manually test on link proto-0.
Change-Id: Ica87d0a690bc86e28844bd695f31641398b21939
Signed-off-by: Vic Yang <victoryang@chromium.org>
This CL attempts to abstract underlying bus from i8042 code. Nearly
all i8042 logic is isolated already. This patch is intended to allow
us to use i8042 logic for processing keys and commands on boards which
do not necessarily use LPC as the host <--> KBC bus interface.
This CL does the following:
- Define KBC bus <--> host (kbc_host_bus) on a per-board basis in
board.c.
- Add generic wrappers in place of lpc_keyboard_* in i8042 code.
- Define the behavior of generic wrappers in EC-specific keyboard
sources. If board.c specifies LPC, then send via LPC.
TODO: This needs to be tested on real hardware...
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=None
TEST=Locally compiled for Link, BDS and Discovery.
Change-Id: I9cabd514bd44fd6b508c26994eccc3011eedbc0f
The temperature calculation currently uses fixed point operations.
Change it to use floating point for better readability and maintenance.
Also changes disable_fpu() to accept parameter which serves as
optimization barrier to prevent floating point operations after
disabling FPU.
BUG=chrome-os-partner:7801
TEST=In console, tempremote "tempremote 29715 -105000 6390" gives 28506.
Change-Id: Ib766904b8feb9a78eac9f7cd53afeca85091c5a5
Signed-off-by: Vic Yang <victoryang@chromium.org>
This will allow more efficient access to EC-provided data (temperature,
fan, battery) by the main processor.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7857
TEST='ectool hello' from link main processor should still work
Change-Id: I2dc683f3441b34de9fb4debf772e386b9fdcfa82
Implement enable_fpu() and disable_fpu().
enable_fpu() disables interrupt and then enables FPU.
disable_fpu() disables FPU and enables interrupt.
Also added a CONFIG_FPU flag.
BUG=chrome-os-partner:7920
TEST=none
Change-Id: I2d71f396d9c7d7ac4a6a2d525f3d86f8aae87521
Signed-off-by: Vic Yang <victoryang@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7451
TEST=hold down no keys; KB init state should be blank
hold down reload (F3); KB init should indicate recovery key pressed
hold down F3 + ESC; same
hold down F3 + F2 + ESC; KB init should NOT indicate recovery key pressed
Change-Id: I0fbf15407b20669396f667e6499ee5a9d545a4d5
These provide 8-bit accesses to registers within an I2C device.
BUG=chrome-os-partner:7839
TEST=none
Testing will come when I start using them.
Change-Id: Ib53d3347253bccee93cb9c5da12db92970155d92
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Remove id field from temp_sensor_t struct, since it's only used by the
console command (which already knows the id, because it's looping over
it).
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST='temps'
Change-Id: I0970850073d644509cd5501d7ac4421c7373143b
This change adds a common part of smart battery driver. Following
features are not implemented, or in chip specific driver:
Battery access control, authentication, factory mode
Manufacturer access/data commands
Block read/write, device name, flash data
Chip specific features, per cell info/temp/capacity
Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7856
TEST=console command check battery staus
[unplug power]
> battery
[check voltage,current,capacity,time to empty]
[plug power]
> charger voltage 8400
> charger current 4250
> battery
[check current,time to full]
> charger input 4032
> battery
[check current,time to full]
[wait 130 seconds, charger watch dog timeout]
> battery
[check current]
Change-Id: Ifac17a0892f52e8f37eebc14b00e71f18360776c
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7493
TEST='powerbtn' to boot main processor, then 'temps' and 'pecitemp'
Change-Id: Id57526ebb37c8aecb05ecebccc2824f462b9de1a
Implement TMP006 object temperature calculation. Also add a console
command to calculate temperature with manually entered data.
BUG=chrome-os-partner:7801
TEST=In console, "tempremote 29715 -105000 6390" gives 285.00K.
Change-Id: I0f9193fb970fdc36566399e7083e73ab58965a85
Battery charging state machine contains many file changes.
This is the 1st part of the break down. Refactor original
test code into board dummy driver. Normalize charger API.
And import link's charger IC driver.
Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7855
TEST=build without warning and error
BOARD=bds make
BOARD=link make
BOARD=discovery make
Change-Id: I34b6e9862a45331378916bc77653d4adb22ca548
Record commands used previously and use up/down arrow key to navigate in
the command history.
Also removed the command '.' of repeating last command as we can use up
arrow key now.
Also changed the behaviour of uart_write_char() to be blocking on
transmit FIFO full, so that we do not lose echoed character and do not
need to flush.
BUG=chrome-os-partner:7815
TEST=Type 'help' and enter. Then type 'aaaa' and up arrow key, should
show 'help', and pressing enter prints help.
Type 'hellp' and enter. Then type 'aaaaaa' and up arrow key, should show
'hellp'. Should be able to use left/right arrow key and backspace to
correct it to 'help', and pressing enter prints help.
Type 'help' and enter. Then type 'aaa', up arrow key, and down arrow
key. Should show 'aaa'.
Change-Id: I65c615d61bf63acb31bea329aa91a3202d4db0ad
- Add #ifdef CONFIG_TEMP_SENSOR before #include'ing temp_sensor.h
which actually requires temp_sensor_id to be defined.
Revert the forward declare used earlier since it is not the
correct solution in this case.
- Add #ifdef CONFIG_CHARGER before calling charger_init()
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=None
TEST=compiled on both BDS and Discovery
Change-Id: I60b7e4ba91eb958b3ad724cc9ffa9a12fe9c3a71
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7488
TEST=type things into the x86 console UART; should appear on the u-boot prompt
Change-Id: I75fd225842c03d11d79280fb7453ad37695279e3
This is a trivial patch to fix compilation for boards that are not
based on LM4 (e.g. Discovery).
Signed-off-by: David Hendricks <dhendrix@chromium.org>
TEST=Compiled for Discovery
BUG=None
Change-Id: Ia1f29c61ff4a1f65fe65c43a8e58def7d1217ab2
Refactor board/chip-specific code into corresponding directories.
Add support of the four I2C temp sensor in Link.
Use table lookup to handle different types of temperature sensors.
BUG=chrome-os-partner:7527
TEST=Correctly read EC internal temperature on bds.
Compile for link succeeded.
Change-Id: I694cfa54e1545798d877fafdf18c5585ab5f03e2
The problem comes from the different assumption of interrupt mode in EC and
the PCH. The PCH assumes IRQ1 is edge-triggered and triggered at a rising edge.
However, the auto-IRQ functino of EC is level-triggered and uses low-active to
assert an IRQ. This makes the deadlock so that the kernel never gets an
interrupt until a byte is manually pulled from host.
So, the solution is manually firing an IRQ_1 to host after EC puts a byte to
port 0x60. Note that the auto IRQ needs to be disabled in order to avoid
the interference with manual IRQ generation.
This CL also moves chip specific code to lm4/lpc.c and handle some minor
keyboard commands.
BUG=none
TEST=on hacked baord.
Change-Id: Ib57f5a4d749cb019e4c3c00da110054c4f335c7b
The ADC input pin was always configured as BDS. Modified it to configure
the correct pin.
BUG=none
TEST=On Link, "rw 0x4002451C" show 0xff instead of 0xf7.
Change-Id: I1efd5cd59ad65f55cd673529afa6153add63ecac
Refactor ADC code and move board/chip-specific part to corresponding
directories.
Implement function and console command to read Link charger current.
BUG=chrome-os-partner:7527
TEST=Read EC temperature and POT input on BDS.
Change-Id: I7fafd310ea49d9b2781f10c3453f5488da29a08a
