Alexandru M Stan 2d25b40b75 cortex-m0: NVIC: Fix macro for the priority registers
We actually need to care about x, the PRI register is actually a list of
registers (and we have code that uses some of the later ones).

BUG=None, discovered while chrome-os-partner:33451
TEST=Change priorities of irqs(like UART over GPIO(spi_event)), note how they
actually work and override each other as told
BRANCH=None

Change-Id: I9f5bf7ba9d4211f782ff260fbce17deb7c53a31f
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/236087
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2014-12-18 00:46:33 +00:00
2014-12-18 00:46:27 +00:00
2014-03-31 22:45:09 +00:00
2012-05-11 09:11:52 -07:00
2014-12-15 22:46:25 +00:00
2014-04-02 19:58:53 +00:00
2014-05-15 05:20:14 +00:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit
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