Dino Li 2ea7b194d9 nds32: fix interrupt
1. To enable INT_PRI (hardware interrupt priority level 0~3)
   register, bit0@INT_CTRL = 0.
2. GIE need to be enabled before UART is initialized.
   [symptom]
   To define CONFIG_RWSIG / CONFIG_RSA / CONFIG_SHA256, then power on:
   after RW image is verified, firmware stuck in uart_flush_output().

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. bit0@INT_CTRL = 0.
     2. The RW image is verified and jump to image RW.

Change-Id: I393a3d5f87ea257885b872c91bfce43aecbaea8b
Reviewed-on: https://chromium-review.googlesource.com/309400
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2015-11-01 19:45:58 -08:00
2015-11-01 19:45:57 -08:00
2015-11-01 19:45:57 -08:00
2015-11-01 19:45:58 -08:00
2015-05-07 00:00:47 +00:00
2015-08-15 01:32:39 +00:00
2015-10-30 23:02:23 -07:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2014-05-15 05:20:14 +00:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit
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