Dino Li 5fd8fead54 it83xx: espi: workaround for changing PLL
We need to change PLL settings if host apply eSPI operating
frequency higher than 50MHz, because FND clock is required
to be higher than half of operating frequency.

BRANCH=none
BUG=b:70537592
TEST=Change PLL succeed with chip select is low.

Change-Id: Ieba62f33ed024aed7a8e7f4cc48b1398ed781170
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/817717
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-12-12 22:00:36 -08:00
2017-08-07 19:29:13 -07:00
2017-07-08 20:38:53 -07:00
2017-10-10 22:13:43 -07:00
2017-11-17 20:18:38 -08:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2017-11-16 21:07:40 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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