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649b3e2714fd9d0fc2fccb8955e5bf787412ee6f
The kernel driver now correctly handles EC_RES_IN_PROGRESS.
This reverts commit 62e9444161.
BRANCH=pit
BUG=chrome-os-partner:22825
TEST=Run flashrom, bang on the keyboard, and issue i2c commands to
TPSCHROME. Observe that I2C_PASSTHRU and MKBP_STATE commands do not
interleave with GET_COMMS_STATUS commands
Change-Id: I8589552f6c7a1506a32b5510fe340dba29702e13
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170844
Reviewed-by: Simon Glass <sjg@chromium.org>
In the most general case, the flash layout looks something like this: +---------------------+ | Reserved for EC use | +---------------------+ +---------------------+ | Vblock B | +---------------------+ | RW firmware B | +---------------------+ +---------------------+ | Vblock A | +---------------------+ | RW firmware A | +---------------------+ +---------------------+ | FMAP | +---------------------+ | Public root key | +---------------------+ | Read-only firmware | +---------------------+ BIOS firmware (and kernel) put the vblock info at the start of each image where it's easy to find. The Blizzard EC expects the firmware vector table to come first, so we have to put the vblock at the end. This means we have to know where to look for it, but that's built into the FMAP and the RO firmware anyway, so that's not an issue. The RO firmware doesn't need a vblock of course, but it does need some reserved space for vboot-related things. Using SHA256/RSA4096, the vblock is 2468 bytes (0x9a4), while the public root key is 1064 bytes (0x428) and the current FMAP is 644 bytes (0x284). If we reserve 4K at the top of each FW image, that should give us plenty of room for vboot-related stuff.
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