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Due to what appaers to be a leakage issue, this patch drives the SYS_RST_ODL (aka PMU_RSTBTN_N) pin low for 1sec while the power state transitions from S3 to S0. This is a workaround for a proto board issue that prevents the SoC from booting. BUG=chrome-os-partner:53791 BRANCH=none TEST=SoC boots with CL:347754 applied on proto and EVT boards Change-Id: I88c3ccf18280acf5dfe3b99f99483dc4e4e27873 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/372044 Reviewed-by: Martin Roth <martinroth@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit For instructions on building from source, refer to http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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