Shawn Nematbakhsh 4c294d144b npcx: gpio: Configure pin attributes before setting as output ...

When a pin power-on default is input, it is necessary to configure output
level, pull up, etc. before setting the pin to output. Otherwise, the
pin may be set to an undesired logic level for a short time.

BUG=chrome-os-partner:51722
TEST=Power-up kevin, verify that CR50_RESET_L (default input, configured
as high + open drain output by default) does not go low for a short
period at boot.
BRANCH=None

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ieaa08e14e6ea15a908f3ff4ee9188e14b17583cf
Reviewed-on: https://chromium-review.googlesource.com/335344
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>

2016-03-29 15:56:22 -07:00

..

lfw

nuc: Add SHI driver for arm-based platform in chip folder.

2015-06-26 18:57:32 +00:00

spiflashfw

nuc: Fixed flash layout issue for npcx

2015-09-21 20:50:56 -07:00

adc_chip.h

wheatley / nuc: Modified the internal ref voltage of ADC to 2.816V

2016-02-17 02:02:03 -08:00

adc.c

common: adc/i2c: Mark task_waiting volatile

2015-12-01 18:52:53 -08:00

build.mk

npcx: Rename CONFIG_SHI to CONFIG_HOSTCMD_SPS

2016-03-08 13:56:38 -08:00

clock_chip.h

nuc: Adjust core clock from 16/12 MHz to 15/13 MHz.

2016-01-20 20:36:53 -08:00

clock.c

nuc: Modify divider of apb2 to 1 if it's freq isn't divisible by 1MHz

2016-02-10 15:45:52 -08:00

config_chip.h

npcx: Add CHIP_VARIANT variant for different versions of npcx ec.

2016-03-05 11:36:32 -08:00

config_flash_layout.h

npcx: Add 256KB alignment of RO & RW regions for npcx5m6g.

2016-03-15 21:49:36 -07:00

fan_chip.h

nuc: Support rpm mode for fan control.

2016-01-06 20:43:32 -08:00

fan.c

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

flash.c

nuc: Remove unnecessary NPCX_EC_FLASH_SIZE definition in npcx.

2015-10-19 21:26:52 -07:00

gpio.c

npcx: gpio: Configure pin attributes before setting as output

2016-03-29 15:56:22 -07:00

header.c

wheatley: Add CONFIG_LTO definition to reduce FW size.

2015-12-30 20:40:48 -08:00

hwtimer_chip.h

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

hwtimer.c

nuc: Add support for CONFIG_LOW_POWER_S0.

2016-02-06 01:57:58 -08:00

i2c.c

npcx: Add 1.8V IO support for some GPIOs and I2C pins.

2016-03-05 04:03:23 -08:00

jtag.c

nuc: Enable JTAG directly by NPCX_ENABLE_JTAG definition

2015-10-17 04:56:09 -07:00

keyboard_raw.c

NPCX: Convert keyboard pins to use ALTERNATE macro

2016-03-02 11:22:51 -08:00

lpc_chip.h

nuc:Using LRESET interrupt to re-initialize LPC settings after warm boot

2015-08-12 18:12:27 +00:00

lpc.c

skylake: do not clear masks in S0ix -> S0 transition

2016-02-22 09:00:52 -08:00

peci.c

nuc:

2015-07-25 01:22:32 +00:00

pwm_chip.h

nuc: Simplify adc/pwm/fan drivers and related structures in boards

2015-09-29 21:11:41 -07:00

pwm.c

npcx: pwm: Fix PWM module

2016-03-28 21:55:19 -07:00

registers.h

npcx: pwm: Fix PWM module

2016-03-28 21:55:19 -07:00

rom_chip.h

nuc: Add SHI driver for arm-based platform in chip folder.

2015-06-26 18:57:32 +00:00

shi_chip.h

npcx: Rename CONFIG_SHI to CONFIG_HOSTCMD_SPS

2016-03-08 13:56:38 -08:00

shi.c

nuc: Add SHI driver for arm-based platform in chip folder.

2015-06-26 18:57:32 +00:00

spi.c

common: change interface to SPI flash

2015-07-30 19:57:55 +00:00

system_chip.h

nuc: Support hibernate_wake_pins on wheatley, npcx_evb and npcx_evb_arm.

2016-01-14 22:12:05 -08:00

system.c

GPIO: Rename and move board_set_gpio_hibernate_state

2016-03-21 13:16:35 -07:00

uart.c

nuc: Modify divider of apb2 to 1 if it's freq isn't divisible by 1MHz

2016-02-10 15:45:52 -08:00

watchdog.c

nuc: Reduce the period of watchdog check timer

2016-02-02 23:48:28 -08:00