Aaron Durbin 90b934d4e9 reef: keep analogix pd chip in reset
The gpio settings for the USB_PD_RST_ODL signal had the default
state high while the power enable, EN_USB_TCPC_PWR, was low. This
is combination of settings is invalid for the part. Therefore,
keep USB_PD_RST_ODL low until board_set_tcpc_power_mode() is called
to bring the pd chip online.

BUG=chrome-os-partner:53035
BRANCH=None
TEST=Rachel confirmed things still working.

Change-Id: I8b6b54a474c00165a4d0af944fb60f2923b9ef5c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347000
Reviewed-by: Shawn N <shawnn@chromium.org>
2016-05-24 15:46:02 -07:00
2015-05-07 00:00:47 +00:00
2016-05-24 10:19:01 -07:00
2016-05-20 17:08:34 -07:00
2016-05-20 17:08:34 -07:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2015-12-08 20:05:05 -08:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit

For instructions on building from source, refer to

http://www.chromium.org/chromium-os/ec-development/getting-started-building-ec-images-quickly
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