Files
OpenCellular/chip/npcx
Jett Rink bdcbd67fc2 lpc: Removing unnecessary register writes
According to Nuvoton datasheet, when SHM windows are in IO mode, only the
bottom 16-bits of registers @ offset xF4 and xF8 are used.

"This register is ignored when WRAM1_IO bit in WIN_CFG register is set to
1 (LPC / eSPI Peripheral Channel I/O access with 16-bit address). This
register is set to its default value by Host Domain reset."

BRANCH=none
BUG=none
TEST=boot grunt and verify host communication still works.

Change-Id: I3e48ea1b09355eaf6967b9f7522bc3d35459b76b
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/919006
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
2018-02-16 15:12:18 -08:00
..
2017-09-07 15:01:05 -07:00
2016-10-04 16:33:21 -07:00
2017-11-14 10:11:19 -08:00
2017-11-14 10:11:19 -08:00