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Author SHA1 Message Date
jackcybertan
29c68b49a9 WIFI-14917 Add a package to backup specific log files.
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>
2025-09-23 15:16:02 +08:00
41 changed files with 534 additions and 2858 deletions

View File

@@ -1,14 +0,0 @@
--- a/hostapd/ctrl_iface.c 2025-09-24 14:15:25.135668867 +0800
+++ b/hostapd/ctrl_iface.c 2025-09-24 15:32:46.082317382 +0800
@@ -2657,6 +2657,11 @@ static int hostapd_ctrl_iface_chan_switc
break;
}
+ /* Initialize HT/VHT/HE parameters */
+ settings.freq_params.ht_enabled = iface->conf->ieee80211n;
+ settings.freq_params.vht_enabled = iface->conf->ieee80211ac;
+ settings.freq_params.he_enabled = iface->conf->ieee80211ax;
+
if (settings.freq_params.center_freq1)
dfs_range += hostapd_is_dfs_overlap(
iface, bandwidth, settings.freq_params.center_freq1);

View File

@@ -48,9 +48,7 @@ ALLWIFIBOARDS:= \
indio-um-510axp-v1 \
indio-um-510axm-v1 \
indio-um-325ax-v2 \
indio-um-335ax \
indio-um-525axp \
indio-um-525axm \
muxi-ap3220l \
plasmacloud-pax1800 \
wallys-dr5018 \
@@ -446,9 +444,7 @@ $(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-325ax-v2,Indio UM-325AX V2))
$(eval $(call generate-ath11k-wifi-package,indio-um-335ax,Indio UM-335AX))
$(eval $(call generate-ath11k-wifi-package,indio-um-525axp,Indio UM-525AXP))
$(eval $(call generate-ath11k-wifi-package,indio-um-525axm,Indio UM-525AXM))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-312g,Sonicfi RAP630W 312G))

View File

@@ -17,12 +17,11 @@ edgecore,eap104)
ucidef_set_led_default "power" "POWER" "green:power" "on"
;;
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "led_2g" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "led_5g" "phy1tpt"
ucidef_set_led_default "power" "POWER" "led_sys" "on"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy1tpt"
ucidef_set_led_netdev "wan" "wan" "yellow:uplink" "eth0"
ucidef_set_led_default "power" "POWER" "green:power" "on"
;;
cig,wf186h|\
cig,wf186w)

View File

@@ -49,8 +49,6 @@ qcom_setup_interfaces()
"6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp)
ucidef_set_interface_wan "eth1"
ucidef_set_interface_lan "eth0"

View File

@@ -143,8 +143,6 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp|\
optimcloud,d60|\
optimcloud,d60-5g|\
@@ -188,7 +186,6 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
ath11k/qcn6122/hw1.0/caldata_2.bin)
case "$board" in
indio,um-325ax-v2|\
indio,um-525axm|\
indio,um-525axp|\
wallys,dr5018|\
edgecore,eap104|\
@@ -208,7 +205,6 @@ ath11k/qcn6122/hw1.0/caldata_2.bin)
;;
ath11k/QCN9074/hw1.0/caldata_1.bin)
case "$board" in
indio,um-335ax|\
optimcloud,d60|\
optimcloud,d60-5g|\
optimcloud,d50|\
@@ -244,7 +240,6 @@ ath11k-macs)
edgecore,oap101e-6e|\
indio,um-325ax-v2|\
indio,um-525axp|\
indio,um-525axm|\
optimcloud,d60|\
optimcloud,d60-5g|\
optimcloud,d50|\

View File

@@ -82,9 +82,7 @@ platform_check_image() {
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axp|\
indio,um-525axm|\
optimcloud,d60|\
optimcloud,d60-5g|\
optimcloud,d50|\
@@ -112,9 +110,7 @@ platform_do_upgrade() {
board=$(board_name)
case $board in
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axp|\
indio,um-525axm|\
edgecore,oap101|\
edgecore,oap101-6e|\
edgecore,oap101e|\

View File

@@ -1,731 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-335AX";
compatible = "indio,um-335ax", "qcom,ipq5018-ap-mp03.1", "qcom,ipq5018-mp03.1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
led-boot = &led_red;
led-failsafe = &led_red;
led-running = &led_red;
led-upgrade = &led_red;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
reserved-memory {
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1800000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4C800000 {
no-map;
reg = <0x0 0x4C800000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4C900000 {
no-map;
reg = <0x0 0x4C900000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4CA00000 {
no-map;
reg = <0x0 0x4CA00000 0x0 0x200000>;
};
qcn9000_pcie0: qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x2600000>;
};
#if defined(__CNSS2__)
mhi_region1: dma_pool1@4F200000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4F200000 0x0 0x900000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_blue: led_5g {
label = "led_5g";
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green: led_2g {
label = "led_2g";
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red: led_sys {
label = "led_sys";
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@33 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led@34 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "on";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
// status = "disabled";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&blsp1_uart1 {
status = "ok";
};
&ssuniphy_0 {
status = "ok";
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
status = "ok";
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&wcss {
status = "ok";
};
&pcie_x2phy {
status = "ok";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "ok";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x20>;
qti,disable-rddm-prealloc;
qti,rddm-seg-len = <0x1000>;
#address-cells = <0x2>;
#size-cells = <0x2>;
#if defined(__CNSS2__)
memory-region = <0>,<&mhi_region1>;
#else
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4DF00000>;
etr-addr = <0x4E000000>;
qcom,caldb-addr = <0x4E100000>;
pageable-addr = <0x4E900000>;
qcom,tgt-mem-mode = <0x1>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,tgt-mem-mode = <1>;
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi3 {
/* QCN9000 5G */
board_id = <0xa0>;
hremote_node = <&qcn9000_pcie0>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* QCN9000 tgt-mem-mode=2 layout - 17MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4C900000 | 11MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4D400000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4D500000 | 1MB |
* +---------+--------------+---------+
* | Pageable| 0x4D600000 | 4MB |
* +==================================+
*/
base-addr = <0x4C900000>;
m3-dump-addr = <0x4D400000>;
etr-addr = <0x4D500000>;
caldb-addr = <0>;
pageable-addr = <0x4D600000>;
caldb-size = <0>;
hremote-size = <0xB00000>;
tgt-mem-mode = <0x2>;
pageable-size = <0x400000>;
#elif __IPQ_MEM_PROFILE_512_MB__
/* QCN9000 tgt-mem-mode=1 layout - 26MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4CB00000 | 12MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4D700000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4D800000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x4D900000 | 8MB |
* +---------+--------------+---------+
* | Pageable| 0x4E100000 | 4MB |
* +==================================+
*/
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4D700000>;
etr-addr = <0x4D800000>;
caldb-addr = <0x4D900000>;
pageable-addr = <0x4E100000>;
caldb-size = <0x800000>;
hremote-size = <0xC00000>;
tgt-mem-mode = <0x1>;
pageable-size = <0x400000>;
#else
/* QCN9000 tgt-mem-mode=0 layout - 53MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4CB00000 | 35MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4EE00000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4EF00000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x4F000000 | 8MB |
* +---------+--------------+---------+
* | Pageable| 0x4F800000 | 8MB |
* +==================================+
*/
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4EE00000>;
etr-addr = <0x4EF00000>;
caldb-addr = <0x4F000000>;
pageable-addr = <0x4F800000>;
hremote-size = <0x2300000>;
caldb-size = <0x800000>;
tgt-mem-mode = <0x0>;
pageable-size = <0x800000>;
#endif
status = "ok";
};

View File

@@ -1,941 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-525AXM";
compatible = "indio,um-525axm", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
//led-failsafe = &led_red;
//led-running = &led_green;
//led-upgrade = &led_green;
//led-gateway = &led_blue;
//led-factory = &led_blue;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E400000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F400000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 14MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D300000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D400000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D600000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E800000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4ED00000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4FD00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4FE00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4FF00000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x5400000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D400000 {
no-map;
reg = <0x0 0x4D400000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
no-map;
reg = <0x0 0x4D600000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
no-map;
reg = <0x0 0x4E600000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
no-map;
reg = <0x0 0x4E700000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
no-map;
reg = <0x0 0x4E800000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4ED00000 0x0 0x1000000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
no-map;
reg = <0x0 0x4FD00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
no-map;
reg = <0x0 0x4FE00000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
no-map;
reg = <0x0 0x4FF00000 0x0 0x500000>;
};
#endif
};
soc {
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_5g {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_blue: led@34 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led_green: led@33 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led_red: led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "off";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x50>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "disabled";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,rproc = <&q6_wcss_pd3>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0xb0>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data2>;
#else
memory-region = <&q6_qcn6122_data2>;
#endif
status = "ok";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
#status = "disabled";
#perst-gpio = <&tlmm 18 1>;
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
#status = "disabled";
#perst-gpio = <&tlmm 15 1>;
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};

View File

@@ -102,15 +102,6 @@ define Device/indio_um-325ax-v2
endef
TARGET_DEVICES += indio_um-325ax-v2
define Device/indio_um-335ax
DEVICE_TITLE := Indio UM-335ax
DEVICE_DTS := qcom-ipq5018-indio-um-335ax
SUPPORTED_DEVICES := indio,um-335ax
DEVICE_PACKAGES := ath11k-wifi-indio-um-335ax ath11k-firmware-qcn9000 ath11k-firmware-ipq50xx-spruce
DEVICE_DTS_CONFIG := config@mp03.1
endef
TARGET_DEVICES += indio_um-335ax
define Device/indio_um-525axp
DEVICE_TITLE := Indio UM-525axp
DEVICE_DTS := qcom-ipq5018-indio-um-525axp
@@ -120,15 +111,6 @@ define Device/indio_um-525axp
endef
TARGET_DEVICES += indio_um-525axp
define Device/indio_um-525axm
DEVICE_TITLE := Indio UM-525axm
DEVICE_DTS := qcom-ipq5018-indio-um-525axm
SUPPORTED_DEVICES := indio,um-525axm
DEVICE_PACKAGES := ath11k-wifi-indio-um-525axm ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
endef
TARGET_DEVICES += indio_um-525axm
define Device/udaya_a6_id2
DEVICE_TITLE := Udaya A6 - ID2
DEVICE_DTS := qcom-ipq5018-udaya-a6-id2

View File

@@ -0,0 +1,34 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=log-helper
PKG_VERSION:=1.0
PKG_RELEASE:=1
PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION)
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/cmake.mk
define Package/log-helper
SECTION:=utils
CATEGORY:=Utilities
TITLE:=Log backup helper
DEPENDS:=+libuci +libubus +libubox
endef
define Package/log-helper/description
This service that backs up files on boot.
endef
define Package/log-helper/install
$(INSTALL_DIR) $(1)/etc/config
$(INSTALL_BIN) ./files/log-helper.uci $(1)/etc/config/log-helper
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/log-helper.init $(1)/etc/init.d/log-helper
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/log-helper $(1)/usr/sbin/
endef
$(eval $(call BuildPackage,log-helper))

View File

@@ -0,0 +1,30 @@
#!/bin/sh /etc/rc.common
USE_PROCD=1
START=15
PROG=/usr/sbin/log-helper
#add directory that need to be preserved during OpenWRT sysupgrade
check_upgrade_conf() {
dir="$1"
grep -q ${dir} /etc/sysupgrade.conf
[ $? -ne 0 ] && {
echo "/${dir}/" >> /etc/sysupgrade.conf
}
}
start_service() {
local enabled
config_load log-helper
config_get_bool enabled global enabled 0
[ ${enabled} -eq 0 ] && return 1
config_get backup_dir global backup_dir "backup_storage"
check_upgrade_conf ${backup_dir}
procd_open_instance
procd_set_param command $PROG
procd_close_instance
}

View File

@@ -0,0 +1,18 @@
config log-helper 'global'
option enabled '1'
# Directory in overlay file system for backed up files.
option backup_dir 'backup_storage'
# Free space safety margin in KB.
# A backup will be skipped if available space of overlay is less than (file_size + threshold).
option space_threshold '2048'
# To specify the maximum number of rotations.
option max_rotations '3'
option backup_file 'backup.tgz'
list file_list '/sys/fs/pstore/dmesg-ramoops-0'
list file_list '/sys/fs/pstore/console-ramoops-0'
list file_list '/sys/fs/pstore/pmsg-ramoops-0'

View File

@@ -0,0 +1,22 @@
cmake_minimum_required(VERSION 2.6)
INCLUDE(CheckFunctionExists)
PROJECT(log-helper C)
ADD_DEFINITIONS(-Os -Wall -Werror)
ADD_DEFINITIONS(-std=gnu99 -g3 -Wmissing-declarations -Wno-unused-parameter)
SET(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "")
SET(SOURCES main.c)
FIND_LIBRARY(uci NAMES uci)
FIND_LIBRARY(ubus NAMES ubus)
FIND_LIBRARY(ubox NAMES ubox)
ADD_EXECUTABLE(log-helper ${SOURCES})
TARGET_LINK_LIBRARIES(log-helper ${uci} ${ubus} ${ubox})
INSTALL(TARGETS log-helper
RUNTIME DESTINATION sbin
)

View File

@@ -0,0 +1,341 @@
/*
* Copyright (c) 2025, CyberTAN Technology Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions, and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions, and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of CyberTAN Technology Inc. nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <syslog.h>
#include <sys/stat.h>
#include <sys/statvfs.h>
#include <libgen.h>
#include <limits.h>
#include <errno.h>
#include <stdbool.h>
#include <uci.h>
#include <libubus.h>
#define DEFAULT_BACKUP_DIRECTOR "backup_storage"
#define DEFAULT_BACKUP_FILE_NAME "backup.tgz"
#define DEFAULT_MAX_ROTATIONS 3
#define DEFAULT_SPACE_THRESH 2048
#define UCI_CONFIG_FILE "log-helper"
#define OVERLAYFS_ROOT "/overlay/upper"
static int rotate_logs(const char *base_log_path, int max_rotations);
static int move_file(const char *src_path, const char *dest_dir);
static void do_backup(void);
static char backup_dir[1024];
/**
* @brief Performs log rotation.
* @param base_log_path The path of the base log file, e.g., "app.log".
* @param max_rotations The maximum number of backup files to keep.
* @return 0 on success, -1 on failure.
*/
static int rotate_logs(const char *base_log_path, int max_rotations) {
struct stat info;
char log_name[NAME_MAX] = {0};
char log_path[1024] = {0};
char src_path[PATH_MAX] = {0};
char dest_path[PATH_MAX] ={0};
int len;
if (!strlen(backup_dir) || stat(backup_dir, &info) != 0) {
syslog(LOG_ERR, "Wrong backup directory: %s", backup_dir);
return -1;
}
if (max_rotations <= 1) {
syslog(LOG_ERR, "max_rotations must be greater than 1: %d", max_rotations);
return -1;
}
strncpy(log_name, basename((char *)base_log_path), sizeof(log_name));
len = snprintf(log_path, sizeof(log_path), "%s/%s", backup_dir, log_name);
if (len >= sizeof(log_path)) {
syslog(LOG_ERR, "Buffer too small, path was truncated.");
return -1;
}
if (access(log_path, F_OK) != 0) {
syslog(LOG_DEBUG, "File not found: %s", log_path);
return 0;
}
// Remove the oldest backup file (e.g., app.log.5).
snprintf(dest_path, sizeof(dest_path), "%s.%d", log_path, max_rotations);
if (remove(dest_path) == 0) {
syslog(LOG_DEBUG, "Deleted oldest backup: %s", dest_path);
}
// Rename files in reverse order, from the second to last backup.
for (int i = max_rotations - 1; i >= 0; --i) {
// Generate the source file path.
if (i) {
// the source is the .i backup file.
snprintf(src_path, sizeof(src_path) - 2, "%s.%d", log_path, i);
} else {
// the source is the original log file.
src_path[strlen(log_path)] = '\0'; // Ensure null-termination.
}
// Generate the destination file path (i+1).
snprintf(dest_path, sizeof(dest_path), "%s.%d", log_path, i + 1);
// Check if the source file exists before trying to rename it.
if (access(src_path, F_OK) == 0) {
if (!rename(src_path, dest_path)) {
syslog(LOG_DEBUG, "rename '%s' to '%s'.", src_path, dest_path);
} else {
syslog(LOG_ERR, "Could not rename '%s' to '%s'.", src_path, dest_path);
return -1;
}
}
}
return 0;
}
/**
* @brief Moves a file from a source path to a destination directory.
* * @param src_path Absolute path to the source file.
* @param dest_dir Absolute path to the destination directory.
* @return 0 on success, -1 on failure.
*/
static int move_file(const char *src_path, const char *dest_dir) {
size_t len;
FILE *fd_s, *fd_d;
char buffer[4096] = {0};
char dest_path[PATH_MAX] = {0};
snprintf(dest_path, sizeof(dest_path) - 1, "%s/%s", dest_dir, basename((char *)src_path));
fd_s = fopen(src_path, "rb");
if (!fd_s) {
syslog(LOG_ERR, "Failed to open source file %s: %s", src_path, strerror(errno));
return -1;
}
fd_d = fopen(dest_path, "wb+");
if (!fd_d) {
syslog(LOG_ERR, "Failed to open destination file %s: %s", dest_path, strerror(errno));
fclose(fd_s);
return -1;
}
while ((len = fread(buffer, 1, sizeof(buffer), fd_s)) > 0) {
if (fwrite(buffer, 1, len, fd_d) != len) {
syslog(LOG_ERR, "Error writing to destination file: %s", dest_path);
fclose(fd_s);
fclose(fd_d);
return -1;
}
}
unlink(src_path);
fclose(fd_s);
fclose(fd_d);
return 0;
}
static int build_file_list(char *file_list, size_t list_size, const char *path) {
size_t current_len = strlen(file_list);
size_t path_len = strlen(path);
struct stat st;
if (stat(path, &st) != 0) {
syslog(LOG_WARNING, "Backup source file not found: %s", path);
return 0;
}
if (current_len + path_len + 1 > list_size - 1) {
syslog(LOG_ERR, "Buffer too small.");
return -1;
}
if (strlen(file_list)) {
strcat(file_list, " ");
}
strcat(file_list, path);
return 0;
}
/**
* @brief Performs the backup task based on UCI configuration.
*/
static void do_backup(void) {
struct uci_context *ctx = uci_alloc_context();
struct uci_package *pkg = NULL;
struct uci_section *s = NULL;
struct uci_element *e = NULL;
struct uci_option *o = NULL;
struct statvfs vfs;
struct stat st;
long space_threshold_kb;
long available_kb;
long max_rotations;
long file_kb;
const char *str = NULL;
char file_list[1024] = {0};
char cmd[1024] = {0};
char backup_file[256] = {0};
char tmp_file[256] = {0};
int n, ret;
if (uci_load(ctx, UCI_CONFIG_FILE, &pkg) != UCI_OK) {
syslog(LOG_ERR, "Failed to load UCI config: %s", UCI_CONFIG_FILE);
return;
}
s = uci_lookup_section(ctx, pkg, "global");
if (!s) {
syslog(LOG_ERR, "UCI section 'global' not found in %s", UCI_CONFIG_FILE);
goto backup_exit;
}
// Iterate through the list of files to be backed up
uci_foreach_element(&s->options, e) {
struct uci_element *le;
o = uci_to_option(e);
if (o->type != UCI_TYPE_LIST || strcmp(o->e.name, "file_list") != 0)
continue;
list_for_each_entry(le, &o->v.list, list) {
const char *f = le->name;
if (build_file_list(file_list, sizeof(file_list), f) != 0) {
goto backup_exit;
}
}
}
if (!strlen(file_list)) {
goto backup_exit;
}
// Get the backup directory
str = uci_lookup_option_string(ctx, s, "backup_dir");
if (!str || strlen(str)==0)
str = DEFAULT_BACKUP_DIRECTOR;
snprintf(backup_dir, sizeof(backup_dir) - 1 , "/%s", str);
mkdir(backup_dir, 0755);
// Get the backup file name
str = uci_lookup_option_string(ctx, s, "backup_file");
if (!str || strlen(str)==0)
str = DEFAULT_BACKUP_FILE_NAME;
n = snprintf(backup_file, sizeof(backup_file) - 1, "%s/%s", backup_dir, str);
if (n >= sizeof(backup_file)) {
syslog(LOG_ERR, "File buffer is too small.\n");
goto backup_exit;
}
n = snprintf(tmp_file, sizeof(tmp_file) - 1, "/tmp/%s", str);
if (n >= sizeof(tmp_file)) {
syslog(LOG_ERR, "Tmp buffer is too small.\n");
goto backup_exit;
}
// Create the backup tgz file in /tmp/
n = snprintf(cmd, sizeof(cmd) - 1, "tar -czf %s %s", tmp_file, file_list);
if (n >= sizeof(cmd)) {
syslog(LOG_ERR, "Command buffer is too small.\n");
goto backup_exit;
}
ret = system(cmd);
if (ret){
syslog(LOG_ERR, "The tar command failed with return code: %d\n", ret);
goto backup_exit;
}
// Get available space on the overlay filesystem
if (statvfs(OVERLAYFS_ROOT, &vfs) != 0) {
syslog(LOG_ERR, "Failed to get overlay filesystem stats: %s", strerror(errno));
goto backup_exit;
}
available_kb = (vfs.f_bavail * vfs.f_bsize) / 1024;
str = uci_lookup_option_string(ctx, s, "space_threshold");
space_threshold_kb = str ? atol(str) : DEFAULT_SPACE_THRESH;
syslog(LOG_INFO, "Overlay available space: %ldKB", available_kb);
// Check if there is enough space
stat(tmp_file, &st);
file_kb = st.st_size / 1024;
if (available_kb < (file_kb + space_threshold_kb)) {
syslog(LOG_ERR, "Overlay space insufficient for %s. (Available: %ldKB, Required: %ldKB)",
tmp_file, available_kb, (file_kb + space_threshold_kb));
goto backup_exit;
}
// Get the maximum number of rotations
str = uci_lookup_option_string(ctx, s, "max_rotations");
max_rotations = str ? atol(str) : DEFAULT_MAX_ROTATIONS;
if (max_rotations > 1 && access(backup_file, F_OK)==0) {
rotate_logs(backup_file, max_rotations);
}
if (move_file(tmp_file, backup_dir) == 0) {
syslog(LOG_INFO, "Successfully backed up to '%s'.", backup_file);
} else {
syslog(LOG_ERR, "Failed to move '%s' to '%s': %s", tmp_file, backup_file, strerror(errno));
}
backup_exit:
uci_free_context(ctx);
}
/**
* @brief Main entry point of the application.
*/
int main(int argc, char **argv) {
// Set up syslog with the program name
openlog("log-helper", LOG_PID, LOG_DAEMON);
do_backup();
closelog();
return 0;
}

View File

@@ -0,0 +1 @@
../../feeds/ipq807x_v5.4/log-helper

View File

@@ -169,8 +169,7 @@
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "sgmii";
phy-handle = <&phy30>;
phy-handle2 = <&phy1>;
phy-handle = <&phy1>; // add phy handler
mtd-mac-address = <&factory 0x24>;
};
@@ -194,16 +193,6 @@
nvmem-cell-names = "phy-cal-data";
};
phy30: ethernet-phy@30 { // AN8801SB
compatible = "ethernet-phy-idc0ff.0421";
reg = <30>; //0x1e
phy-mode = "sgmii";
full-duplex;
pause;
airoha,surge = <0>;
airoha,polarity = <2>;
};
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9471";
reg = <24>; // set phy address to 0x18
@@ -211,8 +200,9 @@
reset-assert-us = <600>;
reset-deassert-us = <20000>;
phy-mode = "sgmii";
};
};
};
};
};
&hnat {

View File

@@ -43,11 +43,6 @@ $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for EAP105
endef
define Package/ath12k-wifi-edgecore-oap106
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for OAP106
endef
define Package/ath12k-wifi-emplus-wap7635
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for WAP7635
@@ -122,13 +117,6 @@ define Package/ath12k-wifi-edgecore-eap105/install
$(INSTALL_DATA) ./board-2.bin.eap105.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef
define Package/ath12k-wifi-edgecore-oap106/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.eap105.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.eap105.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef
define Package/ath12k-wifi-emplus-wap7635/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
@@ -225,7 +213,6 @@ endef
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189))
$(eval $(call BuildPackage,ath12k-wifi-edgecore-eap105))
$(eval $(call BuildPackage,ath12k-wifi-edgecore-oap106))
$(eval $(call BuildPackage,ath12k-wifi-emplus-wap7635))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap7110c-341x))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750e-h))

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@@ -17,7 +17,6 @@ ipq53xx_setup_interfaces()
sercomm,ap72tip|\
sonicfi,rap750w-311a)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
ucidef_add_switch "switch1" "0u@eth1" "3:lan" "2:lan" "1:lan"
;;
sonicfi,rap7110c-341x|\
sonicfi,rap750e-h|\

View File

@@ -1,914 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ5332 RDP480 board device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ipq5332.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "EdgeCore oap106";
compatible = "edgecore,oap106", "qcom,ipq5332-ap-mi01.13", "qcom,ipq5332";
/* Layout for IPQ5332 + QCN9224 + QCN9224 + QCN9160
* +==========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +---------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4A900000 | 27MB |
* | data | | |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | data | 0x4C400000 | 21MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | M3 Dump | 0x4D900000 | 1MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | QDSS | 0x4DA00000 | 1MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | CALDB | 0x4DB00000 | 5MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | data | 0x4E000000 | 21MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | M3 Dump | 0x4F500000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | QDSS | 0x4F600000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | CALDB | 0x4F700000 | 5MB |
* +---------+--------------+-------------------------+
* | QCN9160 | | |
* | data | 0x4FC00000 | 14MB |
* +---------+--------------+-------------------------+
* | QCN9160 | | |
* | M3 Dump | 0x50A00000 | 1MB |
* +---------+--------------+-------------------------+
* | QCN9160 | | |
* | QDSS | 0x50B00000 | 1MB |
* +---------+--------------+-------------------------+
* | QCN9160 | | |
* | CALDB | 0x50C00000 | 5MB |
* +---------+--------------+-------------------------+
* | | | |
* | MLO | 0x51100000 | 18MB |
* +---------+--------------+-------------------------+
* | | | |
* | WKK1 | 0x52300000 | 50MB |
* | | | |
* +---------+--------------+-------------------------+
* | | | |
* | WKK0 | 0x55500000 | 50MB |
* | | | |
* +---------+--------------+-------------------------+
* | | | |
* | MHI0 | DYNAMIC | 9MB |
* | | | |
* +---------+--------------+-------------------------+
* | | | |
* | MHI1 | DYNAMIC | 9MB |
* | | | |
* +==================================================+
* | |
* | |
* | |
* | Rest of memory for Linux |
* | |
* | |
* | |
* +==================================================+
*/
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
q6_mem_regions: q6_mem_regions@4A900000 {
no-map;
reg = <0x0 0x4a900000 0x0 0x6800000>;
};
q6_code_data: q6_code_data@4A900000 {
no-map;
reg = <0x0 0x4a900000 0x0 0x1B00000>;
};
q6_ipq5332_data: q6_ipq5332_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0x1500000>;
};
m3_dump: m3_dump@4D900000 {
no-map;
reg = <0x0 0x4D900000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4DA00000 {
no-map;
reg = <0x0 0x4DA00000 0x0 0x100000>;
};
q6_ipq5332_caldb: q6_ipq5332_caldb@4DB00000 {
no-map;
reg = <0x0 0x4DB00000 0x0 0x500000>;
};
q6_qcn6432_data_1: q6_qcn6432_data_1@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x1500000>;
};
m3_dump_qcn6432_1: m3_dump_qcn6432_1@4F500000 {
no-map;
reg = <0x0 0x4F500000 0x0 0x100000>;
};
q6_qcn6432_etr_1: q6_qcn6432_etr_1@4F600000 {
no-map;
reg = <0x0 0x4F600000 0x0 0x100000>;
};
q6_qcn6432_caldb_1: q6_qcn6432_caldb_1@4F700000 {
no-map;
reg = <0x0 0x4F700000 0x0 0x500000>;
};
q6_qcn9160_data_2: q6_qcn9160_data_2@4FC00000 {
no-map;
reg = <0x0 0x4FC00000 0x0 0xe00000>;
};
m3_dump_qcn9160_2: m3_dump_qcn9160_2@50A00000 {
no-map;
reg = <0x0 0x50A00000 0x0 0x100000>;
};
q6_qcn9160_etr_2: q6_qcn9160_etr_2@50B00000 {
no-map;
reg = <0x0 0x50B00000 0x0 0x100000>;
};
q6_qcn9160_caldb_2: q6_qcn9160_caldb_2@50C00000 {
no-map;
reg = <0x0 0x50C00000 0x0 0x500000>;
};
mlo_global_mem0: mlo_global_mem_0@51100000 {
no-map;
reg = <0x0 0x51100000 0x0 0x1200000>;
};
qcn9224_pcie1: qcn9224_pcie1@52300000 {
no-map;
reg = <0x0 0x52300000 0x0 0x03200000>;
};
qcn9224_pcie0: qcn9224_pcie0@55500000 {
no-map;
reg = <0x0 0x55500000 0x0 0x03200000>;
};
mhi_region0: dma_pool0@0 {
compatible = "shared-dma-pool";
no-map;
size = <0x0 0x00900000>;
};
mhi_region1: dma_pool1@1 {
compatible = "shared-dma-pool";
no-map;
size = <0x0 0x00900000>;
};
};
aliases {
serial0 = &blsp1_uart0;
serial1 = &blsp1_uart1;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
stdout-path = "serial0";
};
soc@0 {
mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
/*gpio22 for manhattan reset*/
phy-reset-gpio = <&tlmm 22 GPIO_ACTIVE_LOW>;
phyaddr_fixup = <0xC90F018>;
uniphyaddr_fixup = <0xC90F014>;
mdio_clk_fixup; /* MDIO clock sequence fix up flag */
status = "okay";
phy0: ethernet-phy@0 {
reg = <12>;
compatible ="ethernet-phy-ieee802.3-c45";
};
phy1: ethernet-phy@1 {
reg = <8>;
compatible ="ethernet-phy-ieee802.3-c45";
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
status = "okay";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x2>; /* lan port bitmap */
switch_wan_bmp = <0x4>; /* wan port bitmap */
switch_mac_mode = <0xd>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xd>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <12>;
ethernet-phy-ieee802.3-c45;
};
port@1 {
port_id = <2>;
phy_address = <8>;
ethernet-phy-ieee802.3-c45;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a504000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <8>;
qcom,link-poll = <1>;
phy-mode = "usxgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <12>;
qcom,link-poll = <1>;
phy-mode = "usxgmii";
};
/* EDMA host driver configuration for the board */
edma@3ab00000 {
qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
qcom,rx-queue-start = <0>; /* Rx queue start */
qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
<0 164 4>, /* Tx complete ring id #5 IRQ info */
<0 165 4>, /* Tx complete ring id #6 IRQ info */
<0 166 4>, /* Tx complete ring id #7 IRQ info */
<0 167 4>, /* Tx complete ring id #8 IRQ info */
<0 168 4>, /* Tx complete ring id #9 IRQ info */
<0 169 4>, /* Tx complete ring id #10 IRQ info */
<0 170 4>, /* Tx complete ring id #11 IRQ info */
<0 171 4>, /* Tx complete ring id #12 IRQ info */
<0 172 4>, /* Tx complete ring id #13 IRQ info */
<0 173 4>, /* Tx complete ring id #14 IRQ info */
<0 174 4>, /* Tx complete ring id #15 IRQ info */
<0 139 4>, /* Rx desc ring id #12 IRQ info */
<0 140 4>, /* Rx desc ring id #13 IRQ info */
<0 141 4>, /* Rx desc ring id #14 IRQ info */
<0 142 4>, /* Rx desc ring id #15 IRQ info */
<0 191 4>, /* Misc error IRQ info */
<0 155 4>, /* RxFill ring id #4 IRQ info */
<0 156 4>, /* RxFill ring id #5 IRQ info */
<0 157 4>, /* RxFill ring id #6 IRQ info */
<0 158 4>, /* RxFill ring id #7 IRQ info */
<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
};
wsi: wsi {
id = <0>;
num_chip = <3>;
status = "okay";
chip_info = <0 2 1 2>,
<1 2 0 2>,
<2 2 0 1>;
};
q6v5_wcss: remoteproc@d100000 {
boot-args = <0x1 0x5 0x3 0x0 0x26 0x2 0x0>,
<0x1 0x5 0x4 0x2 0x2C 0x0 0x0>;
memory-region = <&q6_mem_regions>,
<&mlo_global_mem0>;
upd-firmware-names = "IPQ5332/q6_fw1.mdt",
"IPQ5332/q6_fw3.mdt";
/delete-node/ remoteproc_pd1;
/delete-node/ remoteproc_pd3;
q6_wcss_pd1: remoteproc_pd1 {
compatible = "qcom,ipq5332-wcss-ahb-mpd";
firmware = "IPQ5332/q6_fw1.mdt";
m3_firmware = "IPQ5332/iu_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_ipq5332_data>,
<&m3_dump>,
<&q6_etr_region>,
<&q6_ipq5332_caldb>,
<&mlo_global_mem0>;
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5332-wcss-pcie-mpd";
firmware = "IPQ5332/q6_fw3.mdt";
m3_firmware = "qcn9160/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_qcn9160_data_2>,
<&m3_dump_qcn9160_2>,
<&q6_qcn9160_etr_2>,
<&q6_qcn9160_caldb_2>;
status = "ok";
};
};
};
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_i2c1 {
clock-frequency = <400000>;
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "okay";
gpio_expander: gpio@74 {
compatible = "ti,tca9539";
reg = <0x74>;
gpio-controller;
#gpio-cells = <2>;
status = "okay";
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
led_o {
gpios = <&gpio_expander 0 GPIO_ACTIVE_HIGH>; // P00
gpio-export,name = "led_o";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
led_g {
gpios = <&gpio_expander 1 GPIO_ACTIVE_HIGH>; // P01
gpio-export,name = "led_g";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
led_b {
gpios = <&gpio_expander 2 GPIO_ACTIVE_HIGH>; // P02
gpio-export,name = "led_b";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
w_disable1 {
gpios = <&gpio_expander 3 GPIO_ACTIVE_HIGH>; // P03
gpio-export,name = "w_disable1_l";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
w_disable2 {
gpios = <&gpio_expander 4 GPIO_ACTIVE_HIGH>; // P04
gpio-export,name = "w_disable2_l";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
heater_1 {
gpios = <&gpio_expander 7 GPIO_ACTIVE_HIGH>; // P07
gpio-export,name = "heater_1";
gpio-export,direction = "out";
gpio-export,output = <0>;
};
heater_2 {
gpios = <&gpio_expander 8 GPIO_ACTIVE_HIGH>; // P10
gpio-export,name = "heater_2";
gpio-export,direction = "out";
gpio-export,output = <0>;
};
tpm_int {
gpios = <&gpio_expander 9 GPIO_ACTIVE_LOW>; // P11
gpio-export,name = "tpm_int_l";
gpio-export,direction = "in";
};
tpm_rst {
gpios = <&gpio_expander 10 GPIO_ACTIVE_LOW>; // P12
gpio-export,name = "tpm_rst_l";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
gps_rst {
gpios = <&gpio_expander 11 GPIO_ACTIVE_LOW>; // P13
gpio-export,name = "gps_rst_l";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
ble_rst {
gpios = <&gpio_expander 12 GPIO_ACTIVE_LOW>; // P14
gpio-export,name = "ble_rst_l";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
ble_backdoor {
gpios = <&gpio_expander 13 GPIO_ACTIVE_HIGH>; // P15
gpio-export,name = "ble_backdoor";
gpio-export,direction = "in";
};
m2_coex_txd {
gpios = <&gpio_expander 14 GPIO_ACTIVE_HIGH>; // P16
gpio-export,name = "m2_coex_txd";
gpio-export,direction = "out";
gpio-export,output = <1>;
};
m2_coex_rxd {
gpios = <&gpio_expander 15 GPIO_ACTIVE_HIGH>; // P17
gpio-export,name = "m2_coex_rxd";
gpio-export,direction = "in";
};
};
};
st33htpi: tpm@2e {
compatible = "infineon,slb9673";
reg = <0x2e>;
status = "okay";
};
};
&blsp1_spi0 {
pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "n25q128a11", "micron,n25q128a11", "jedec,spi-nor";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
};
};
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo {
clock-frequency = <24000000>;
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qspi_default_state>;
pinctrl-names = "default";
status = "disabled";
nandcs@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&pcie0_phy {
status = "okay";
};
&pcie1_phy {
status = "okay";
};
&pcie0 {
pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
status = "okay";
pcie0_rp {
reg = <0 0 0 0 0>;
qcom,mhi@2 {
reg = <0 0 0 0 0>;
boot-args = <0x2 0x4 0x34 0x3 0x0 0x0 /* MX Rail, GPIO52, Drive strength 0x3 */
0x4 0x4 0x18 0x3 0x0 0x0 /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
memory-region = <&qcn9224_pcie0>, <&mhi_region0>;
qcom,board_id = <0x12>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <1>;
};
};
};
&pcie1 {
pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
phys = <&pcie1_phy>;
num-lanes = <1>;
perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
status = "okay";
pcie1_rp {
reg = <0 0 0 0 0>;
qcom,mhi@1 {
reg = <0 0 0 0 0>;
memory-region = <&qcn9224_pcie1>, <&mhi_region1>;
qcom,board_id = <0x4>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <2>;
};
};
};
&qcn9224_pcie0 {
status = "okay";
};
&qcn9224_pcie1 {
status = "okay";
};
/* PINCTRL */
&tlmm {
qspi_default_state: qspi-default-state {
qspi_clock {
pins = "gpio13";
function = "qspi_clk";
drive-strength = <8>;
bias-pull-down;
};
qspi_cs {
pins = "gpio12";
function = "qspi_cs";
drive-strength = <8>;
bias-pull-up;
};
qspi_data {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "qspi_data";
drive-strength = <8>;
bias-pull-down;
};
};
serial_1_pins: serial1-pinmux {
pins = "gpio33", "gpio34", "gpio35", "gpio36";
function = "blsp1_uart2";
drive-strength = <8>;
bias-pull-up;
};
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";
function = "blsp1_i2c0";
drive-strength = <8>;
bias-pull-up;
};
pcie0_default_state: pcie0-default-state {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-low;
};
pcie1_default_state: pcie1-default-state {
pins = "gpio47";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-low;
};
button_pins: button-state {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio13";
function = "sdc_clk";
drive-strength = <8>;
bias-disable;
};
cmd-pins {
pins = "gpio12";
function = "sdc_cmd";
drive-strength = <8>;
bias-pull-up;
};
data-pins {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "sdc_data";
drive-strength = <8>;
bias-pull-up;
};
};
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-down;
};
spi_0_cs_pins: spi-0-cs-state {
pins = "gpio17";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-up;
};
};
&license_manager {
status = "okay";
};
&usb3 {
qcom,select-utmi-as-pipe-clk;
status = "okay";
dwc3@8a00000 {
phys = <&hs_m31phy_0>;
phy-names = "usb2-phy";
};
};
&hs_m31phy_0 {
status = "okay";
};
&wifi0 {
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,tgt-mem-mode = <0>;
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0 0x0>;
qcom,caldb-addr = <0x4DB00000 0x4DB00000 0x4DB00000 0x0 0x0 0x0>;
qcom,caldb-size = <0x500000>;
qcom,board_id = <0x13>;
mem-region = <&q6_ipq5332_data>;
memory-region = <&q6_ipq5332_data>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <0>;
status = "ok";
};
&qcn9224_pcie0 {
status = "ok";
};
&qcn9224_pcie1 {
status = "ok";
};
&mhi_region1 {
status = "ok";
};
&wifi3 {
hremote_node = <&qcn9224_pcie0>;
/* QCN9224 radio 5G
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x55500000 | 28MB |
* +---------+--------------+---------+
* | M3 Dump | 0x57100000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x57200000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x57300000 | 8MB |
* +---------+--------------+---------+
* |Pageable | 0x57B00000 | 12MB |
* +==================================+
*/
base-addr = <0x55500000>;
m3-dump-addr = <0x57100000>;
etr-addr = <0x57200000>;
caldb-addr = <0x57300000>;
pageable-addr = <0x57B00000>;
hremote-size = <0x1C00000>;
pageable-size = <0xC00000>;
tgt-mem-mode = <0x0>;
board_id = <0x2>;
status = "ok";
};
&wifi4 {
hremote_node = <&qcn9224_pcie1>;
/* QCN9224 radio 6G
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x52300000 | 28MB |
* +---------+--------------+---------+
* | M3 Dump | 0x53F00000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x54000000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x54100000 | 8MB |
* +---------+--------------+---------+
* |Pageable | 0x54900000 | 12MB |
* +==================================+
*/
base-addr = <0x52300000>;
m3-dump-addr = <0x53F00000>;
etr-addr = <0x54000000>;
caldb-addr = <0x54100000>;
pageable-addr = <0x54900000>;
hremote-size = <0x1C00000>;
pageable-size = <0xC00000>;
tgt-mem-mode = <0x0>;
node_id=<0x1>;
board_id = <0x4>;
status = "ok";
};
//&wifi5 {
// qcom,multipd_arch;
// qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
// qcom,rproc = <&q6_wcss_pd3>;
// qcom,tgt-mem-mode = <0>;
// qcom,board_id = <0x101>;
// qcom,bdf-addr = <0x4FC00000 0x4FC00000 0x4FC00000 0x0 0x0 0x0>;
// qcom,caldb-addr = <0x50C00000 0x50C00000 0x50C00000 0x0 0x0 0x0>;
// qcom,caldb-size = <0x500000>;
// m3-dump-addr = <0x50A00000>;
// mem-region = <&q6_qcn9160_data_2>;
// memory-region = <&q6_qcn9160_data_2>;
// qcom,pci_slot_id = <2>;
// status = "ok";
//};

View File

@@ -52,19 +52,6 @@ define Device/edgecore_eap105
endef
TARGET_DEVICES += edgecore_eap105
define Device/edgecore_oap106
DEVICE_TITLE := Edgecore OAP106
DEVICE_DTS := ipq5332-edgecore-oap106
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_CONFIG := config@mi01.13
IMAGES := sysupgrade.tar kernel.bin rootfs.bin
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/kernel.bin := append-kernel
IMAGE/rootfs.bin := append-rootfs
DEVICE_PACKAGES := ath12k-wifi-edgecore-oap106 ath12k-firmware-qcn92xx ath12k-firmware-ipq5332
endef
TARGET_DEVICES += edgecore_oap106
define Device/emplus_wap7635
DEVICE_TITLE := EMPLUS WAP7635
DEVICE_DTS := ipq5332-emplus-wap7635

View File

@@ -0,0 +1,47 @@
From 7fa9e9b683f1c573c58a14755347988919bc7d06 Mon Sep 17 00:00:00 2001
From: YenLin Pan <yenlin.pan@zyxel.com.tw>
Date: Wed, 14 May 2025 13:47:06 +0800
Subject: [PATCH] pinctrl: make the switch LED works
Enable switch LED pin definition for LED0/LED1/LED2 control
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
---
src/init/ssdk_mht_pinctrl.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/init/ssdk_mht_pinctrl.c b/src/init/ssdk_mht_pinctrl.c
index 2debe59..1ae0002 100755
--- a/src/init/ssdk_mht_pinctrl.c
+++ b/src/init/ssdk_mht_pinctrl.c
@@ -33,11 +33,17 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
/*PINs default MUX Setting*/
MHT_PIN_SETTING_MUX(0, MHT_PIN_FUNC_INTN_WOL),
MHT_PIN_SETTING_MUX(1, MHT_PIN_FUNC_INTN),
-#if 0
+#if 1
MHT_PIN_SETTING_MUX(2, MHT_PIN_FUNC_P0_LED_0),
MHT_PIN_SETTING_MUX(3, MHT_PIN_FUNC_P1_LED_0),
MHT_PIN_SETTING_MUX(4, MHT_PIN_FUNC_P2_LED_0),
MHT_PIN_SETTING_MUX(5, MHT_PIN_FUNC_P3_LED_0),
+ MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_P0_LED_2),
+ MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_P1_LED_2),
+ MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_P2_LED_2),
+ MHT_PIN_SETTING_MUX(9, MHT_PIN_FUNC_P3_LED_2),
+#endif
+#if 0
MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_PPS_IN),
MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_TOD_IN),
MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_RTC_REFCLK_IN),
@@ -49,7 +55,7 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
MHT_PIN_SETTING_MUX(13, MHT_PIN_FUNC_P0_TOD_OUT),
MHT_PIN_SETTING_MUX(14, MHT_PIN_FUNC_P0_CLK125_TDI),
MHT_PIN_SETTING_MUX(15, MHT_PIN_FUNC_P0_SYNC_CLKO_PTP),
-#if 0
+#if 1
MHT_PIN_SETTING_MUX(16, MHT_PIN_FUNC_P0_LED_1),
MHT_PIN_SETTING_MUX(17, MHT_PIN_FUNC_P1_LED_1),
MHT_PIN_SETTING_MUX(18, MHT_PIN_FUNC_P2_LED_1),
--
2.34.1

View File

@@ -23,7 +23,6 @@ let ubus = libubus.connect();
let uci = libuci.cursor();
let state = DISCOVER;
let discovery_method = "";
let discovery_block_list = [];
let validate_time;
let offline_time;
let orphan_time;
@@ -103,9 +102,6 @@ function gateway_load() {
}
function discovery_state_write() {
if (length(discovery_method) == 0)
return;
let discovery_state = {
"type": discovery_method,
"updated": time()
@@ -159,7 +155,6 @@ function set_state(set) {
ulog(LOG_INFO, 'Wait for validation\n');
validate_time = time();
state = VALIDATING;
push(discovery_block_list, discovery_method);
break;
case ONLINE:
@@ -168,7 +163,6 @@ function set_state(set) {
ulog(LOG_INFO, 'Setting cloud controller to validated\n');
gateway_write({ valid: true });
discovery_state_write();
discovery_block_list = [];
}
break;
@@ -237,13 +231,6 @@ function time_is_valid() {
return valid;
}
function is_discover_method_blacked() {
if (discovery_method in discovery_block_list)
return true;
return false;
}
function interval_handler() {
printf(`State ${state}\n`);
switch(state) {
@@ -273,21 +260,19 @@ function interval_handler() {
if (!time_is_valid())
return;
discovery_method = DISCOVER_DHCP;
if (discover_dhcp())
return;
if (system('/usr/bin/est_client enroll'))
return;
discovery_method = DISCOVER_DHCP;
if (!is_discover_method_blacked() && discover_dhcp())
return;
discovery_method = DISCOVER_FLASH;
if (!is_discover_method_blacked() && !discover_flash())
if (!discover_flash())
return;
discovery_method = DISCOVER_LOOKUP;
redirector_lookup();
discovery_block_list = [];
break;
case VALIDATING:

View File

@@ -4,7 +4,6 @@ PKG_NAME:=ucentral-client
PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-client.git
PKG_MIRROR_HASH:=2935998d6074f0c290d9b96c2988c89aae6f405608f12a0063fa7215498bae9a
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-08-11
PKG_SOURCE_VERSION:=549e84e5fea7230c5471d6a3dbddcc7d3152f665

View File

@@ -2,8 +2,6 @@
'use strict';
push(REQUIRE_SEARCH_PATH, '/usr/share/ucentral/*.uc');
import * as libubus from 'ubus';
import * as libuci from 'uci';
import * as uloop from 'uloop';
@@ -38,7 +36,6 @@ let ucentral_running = false;
let pending_events = [];
let relay = {};
let net_config = {};
let vlan_refcount = {};
function config_load() {
@@ -55,20 +52,6 @@ function config_load() {
net_config = {};
}
function vlan_refcount_init() {
let stations = require('wifi.station');
vlan_refcount = {};
for (let k, v in stations) {
let vlan = split(k, '-v')[1];
let count = length(v);
if (vlan && count > 0) {
vlan_refcount[vlan] = count;
}
}
}
function match(object, type, list) {
if (object in list || type in list)
return true;
@@ -275,13 +258,6 @@ handlers = {
},
vlan_add: function(notify) {
let vlan_id = `${notify.data.vlan_id}`;
vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 0) + 1;
if (vlan_refcount[vlan_id] > 1) {
return;
}
if (config.config.swconfig)
return handlers.vlan_add_swconfig(notify);
@@ -304,14 +280,6 @@ handlers = {
},
vlan_remove: function(notify) {
let vlan_id = `${notify.data.vlan_id}`;
vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 1) - 1;
if (vlan_refcount[vlan_id] > 0) {
return;
}
delete vlan_refcount[vlan_id];
if (config.config.swconfig)
return;
for (let wan in wan_ports) {
@@ -656,7 +624,6 @@ let ubus_methods = {
};
config_load();
vlan_refcount_init();
hapd_subscriber = ubus.subscriber(hapd_subscriber_notify_cb, hapd_subscriber_remove_cb);
dhcp_subscriber = ubus.subscriber(dhcp_subscriber_notify_cb, dhcp_subscriber_remove_cb);

View File

@@ -4,10 +4,10 @@ PKG_NAME:=ucentral-schema
PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-schema.git
PKG_MIRROR_HASH:=f72d2e5b01ecb7a488d50d860da63664d992e50c7e046fed866be6733bab3c1c
PKG_MIRROR_HASH:=dd37ce95e77af90424d4792f1d292e90242d66ebf5c6552afdf364fd33c58af8
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-09-29
PKG_SOURCE_VERSION:=676e1550c53b7d48a54aa759f65d341168627c5e
PKG_SOURCE_DATE:=2025-08-12
PKG_SOURCE_VERSION:=a1e7571a07ad309301954149884b13f71fbf74be
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_LICENSE:=BSD-3-Clause

View File

@@ -1,10 +1,7 @@
#!/usr/bin/ucode
import { readfile } from "fs";
let nl = require("nl80211");
let def = nl.const;
let board_name = rtrim(readfile('/tmp/sysinfo/board_name'), '\n');
let phy_index = 0;
function phy_get() {
let res = nl.request(def.NL80211_CMD_GET_WIPHY, def.NLM_F_DUMP, { split_wiphy_dump: true });
@@ -15,11 +12,5 @@ function phy_get() {
return res;
}
switch(board_name) {
case 'edgecore,eap112':
phy_index = 1;
break;
}
let phys = phy_get();
printf("%d\n", phys[phy_index].max_ap_assoc || 32);
printf("%d\n", phys[0].max_ap_assoc || 32);

View File

@@ -1,22 +1,16 @@
From 937c4ba769b4d3a0b5cb804e54fd8bece8efac47 Mon Sep 17 00:00:00 2001
From: Shubham Vishwakarma <shubhamvis98@fossfrog.in>
Date: Mon, 29 Sep 2025 10:35:54 +0530
Subject: [PATCH 58/68] ramips: mt7621: add mt7621 indio um-305ax
From ec135e7aefac08806fbabb0634a2bd88a169dfc6 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 15 Jul 2023 15:25:59 +0200
Subject: [PATCH 58/68] ramips: add mt7621_indio_um-305ax
Changelog:
- Fix MAC address assignment for Ethernet ports
- Fix Ethernet port configuration (was not working in the current DTS
because GPIOs 23 and 24, used for LEDs, are RGMII2 pins)
- Add package kmod-7915-firmware to enable Wi-Fi
Signed-off-by: Shubham Vishwakarma <shubhamvis98@fossfrog.in>
Signed-off-by: John Crispin <john@phrozen.org>
---
target/linux/ath79/image/generic.mk | 22 +--
.../ramips/dts/mt7621_indio_um-305ax.dts | 168 ++++++++++++++++++
.../ramips/dts/mt7621_indio_um-305ax.dts | 146 ++++++++++++++++++
target/linux/ramips/image/mt7621.mk | 11 ++
.../mt7621/base-files/etc/board.d/02_network | 6 +
.../etc/hotplug.d/ieee80211/10_fix_wifi_mac | 6 +
5 files changed, 202 insertions(+), 11 deletions(-)
5 files changed, 180 insertions(+), 11 deletions(-)
create mode 100644 target/linux/ramips/dts/mt7621_indio_um-305ax.dts
diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
@@ -61,30 +55,27 @@ index 5882feafcb..a98a5e816f 100644
DEVICE_VENDOR := YunCore
diff --git a/target/linux/ramips/dts/mt7621_indio_um-305ax.dts b/target/linux/ramips/dts/mt7621_indio_um-305ax.dts
new file mode 100644
index 0000000000..42837dd9fe
index 0000000000..79cffbdec2
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_indio_um-305ax.dts
@@ -0,0 +1,168 @@
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>
+ */
+
+/dts-v1/;
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "indio,um-305ax", "mediatek,mt7621-soc";
+ model = "Indio UM-305AX";
+ model = "INDIO UM-305AX";
+
+ aliases {
+ led-boot = &led_green;
+ led-failsafe = &led_green;
+ led-running = &led_green;
+ led-upgrade = &led_green;
+ led-failsafe = &led_red;
+ led-running = &led_blue;
+ led-upgrade = &led_red;
+ label-mac-device = &wan_port;
+ };
+
+ chosen {
@@ -93,11 +84,6 @@ index 0000000000..42837dd9fe
+ };
+
+ leds {
+ /*
+ * GPIO 23 and 24 LEDs wont work because these pins are part of the RGMII2 pin group.
+ * To make the LEDs work, we need to change the &state_default nodes group variable
+ * to "rgmii2", which restores LED functionality but disables the Ethernet ports.
+ */
+ compatible = "gpio-leds";
+
+ led_blue: blue {
@@ -133,7 +119,7 @@ index 0000000000..42837dd9fe
+
+&state_default {
+ gpio {
+ groups = "jtag", "wdt";
+ groups = "rgmii2";
+ function = "gpio";
+ };
+};
@@ -150,19 +136,15 @@ index 0000000000..42837dd9fe
+};
+
+&gmac0 {
+ status = "okay";
+ nvmem-cells = <&macaddr_offset>;
+ nvmem-cell-names = "mac-address";
+ mtd-mac-address = <&factory 0x4>;
+};
+
+&switch0 {
+ ports {
+ port@0 {
+ wan_port: port@0 {
+ status = "okay";
+ label = "wan";
+ nvmem-cells = <&macaddr_offset>;
+ nvmem-cell-names = "mac-address";
+ mac-address-increment = <1>;
+ mtd-mac-address = <&factory 0x28>;
+ };
+
+ port@1 {
@@ -223,16 +205,6 @@ index 0000000000..42837dd9fe
+ };
+};
+
+&factory {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_offset: macaddr@4 {
+ reg = <0x4 0x6>;
+ };
+};
+
diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index 962d7ef440..8790a2fa50 100644
--- a/target/linux/ramips/image/mt7621.mk
@@ -297,5 +269,5 @@ index 3467e783f0..d5bd50fdf7 100644
[ "$PHYNBR" = "1" ] && \
macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1 > /sys${DEVPATH}/macaddress
--
2.47.3
2.34.1

View File

@@ -15,6 +15,4 @@ packages:
- qca-ssdk-shell
- iperf3
- sysstat
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
- kmod-cig-poe-judgment

View File

@@ -14,6 +14,4 @@ packages:
- qca-ssdk-shell
- iperf3
- sysstat
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
- kmod-cig-poe-judgment

View File

@@ -14,6 +14,4 @@ packages:
- qca-ssdk-shell
- iperf3
- sysstat
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
- kmod-cig-poe-judgment

View File

@@ -24,6 +24,5 @@ packages:
- kmod-iio-ilps22qs
- kmod-cig-poe-judgment
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_STTY=y

View File

@@ -12,5 +12,3 @@ include:
packages:
- ipq53xx
- qca-ssdk-shell
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0

View File

@@ -1,14 +0,0 @@
---
profile: edgecore_oap106
target: ipq53xx
subtarget: generic
description: Build image for the edgecore oap106
image: bin/targets/ipq53xx/generic/openwrt-ipq53xx-edgecore_oap106-squashfs-sysupgrade.tar
feeds:
- name: qca
path: ../../feeds/qca-wifi-7
include:
- ucentral-ap
packages:
- ipq53xx
- qca-ssdk-shell

View File

@@ -1,18 +0,0 @@
---
profile: indio_um-335ax
target: ipq50xx
subtarget: generic
description: Build image for the Indio um-335ax
image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-indio_um-335ax-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
include:
- ucentral-ap
packages:
- ipq50xx
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=512
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_STTY=y

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@@ -1,17 +0,0 @@
---
profile: indio_um-525axm
target: ipq50xx
subtarget: generic
description: Build image for the Indio um-525axm
image: bin/targets/ipq50xx/generic/openwrt-ipq50xx-indio_um-525axm-squashfs-sysupgrade.tar
feeds:
- name: ipq807x
path: ../../feeds/ipq807x_v5.4
include:
- ucentral-ap
packages:
- ipq50xx
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=512
CONFIG_BUSYBOX_CUSTOM=y
CONFIG_BUSYBOX_CONFIG_STTY=y

View File

@@ -13,5 +13,3 @@ packages:
- ipq53xx
- qca-ssdk-shell
- e2fsprogs
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0

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@@ -87,7 +87,7 @@ def setup_tree():
for patch in patches:
run(["git", "am", "-3", str(base_dir / patch)], check=True)
run(
["ln", "-rs", profiles, "profiles"], check=True,
["ln", "-s", profiles, "profiles"], check=True,
)
print("### Patches done")
except: