Add queue_peek_memcpy to peek at queue and move the element using
specific memcpy function.
Also change memcpy prototype argument from void const * to const void*.
BUG=none
BRANCH=none
TEST=Compile and use.
Change-Id: I8c582563e7d204ee5568637f819d63404624faf6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274226
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Add workaround to limit the max input current to 1.5A due to
i2c communication problems at higher currents. Note that this
max should be removed when possible.
This introduces a new CONFIG option to define the maximum input
current limit for a board, as opposed to the already existing
default input current limit.
BUG=none
BRANCH=none
TEST=load on glados, charge with zinger, make sure input current
is set to 1.5A and no recurring i2c errors talking to battery
and charger.
Change-Id: Ib7070772e1bf5475e98a2dc946ae75bf08047b70
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276169
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
ISL9237 is a buck-boost narrow output voltage DC charger. This change
provides interfaces to satisfy external dependencies for
charge_state_v2.
ISL9237's charging voltage control is different from smart battery
chargers. And there's no SBC compatible charging mode and status. So
this CL modified charger_set_voltage() behavior by controlling VSYS
voltage.
BRANCH=none
BUG=none
TEST=ran on reworked glados
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: Ibbbf805bbbe1ee06f87a41cde3e39acbf2e105b4
Reviewed-on: https://chromium-review.googlesource.com/272882
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Trybot-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Enable CONFIG_CHARGE_MANAGER to handle charging on two ports.
For now, we only use the type-C pull-up supplier and the PD supplier.
This adds Pericom BC1.2 suppliers as well even though we aren't
using them.
Currently, on Glados, we can't detect VBUS unless charge_en GPIO is
asserted. This means, when no charger is plugged in, we must have
both ports enabled. And when one charger is plugged in, we must
disable the other port. Practically, this means we always charge
from first charger plugged in since we can't detect the second one.
And, this means that if you do chgoverride -1, which normally stops
charging, this will actually enable charging on both ports.
BUG=chrome-os-partner:40920
BRANCH=none
TEST=load onto glados and plug in zinger and donette onto both
ports. verify that we always charge from first charger plugged in.
plug in hoho to either port and make sure it gets VBUS.
Change-Id: Ia5d5725ee86b25f6fec0f276d4c471f533c81112
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275686
Reviewed-by: Shawn N <shawnn@chromium.org>
Enable ADC channels on Glados. For now only VBUS is scaled
accurately into mV, the rest are ADC counts.
BUG=none
BRANCH=none
TEST="adc" from EC console and verify VBUS measurement matches
for zinger at 20V and donette at 5V.
Change-Id: I1af70df5b851ba654c8feb7c97d190d393421a29
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275685
Reviewed-by: Shawn N <shawnn@chromium.org>
Use the PDCMD task to handle PD MCU interrupts, and use it
to trigger the tcpc_alert().
Note this fixes bug on Glados and Oak that could cause watchdog
reset because tcpc_alert() which uses i2c to talk to tcpc was
called from hooks task and can delay tickling watchdog.
BUG=chrome-os-partner:40920
BRANCH=none
TEST=load on glados and plug zinger into both ports many times.
make sure we get a stable contract and no watchdog reset.
Change-Id: I37625fae2ca0057d2ee8fa1eea6974f2d26d1b91
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275296
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This is needed to allow cleanup and refactoring of the EC codebase in
ToT. All of these boards use firmware from branches and uploaded to
BCS, so they don't actually care that ToT can't build their firmware.
BUG=chromium:493866
TEST=build on the following using cbuildbot:
daisy-paladin
falco-paladin
link-paladin
nyan-paladin
peppy-paladin
samus-paladin
squawks-paladin
daisy_spring-paladin
CQ-DEPEND=CL:274121,CL:274127
BRANCH=none
Change-Id: I19598843755ded7b2385cc712ef463e5de4411b8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274121
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
sysjump could happen anytime during an I2C transaction. After sysjump and EC
reset, I2C pin will be programmed back as GPIO instead of alternate function,
which will cause the I2C transacation to failed.
MEC1322 I2C also depends on interrupt to handle the I2C transaction, however,
sysjump will disable interrupt, which will cause watchdog timeout/reset since
interupt for I2C transaction are disabled.
BUG=none
TEST=After "sysjump <RO/RW>", "i2cscan" is functional and no watchdog reset.
BRANCH=none
Change-Id: I181084822f0769173c724e48afb59d7099fa1566
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/273710
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Add USB PD support for port 1 (on the flex cable).
BUG=chrome-os-partner:40920
BRANCH=none
TEST=load onto glados and test zinger and hoho in both
polarities on both ports and verify PD contract established.
Change-Id: Ib7ac2e630c0a8f278c8b74c348cc6dc7183f53ec
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275072
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This enables the USB blob interface. Due to partner issue 40693,
we have to disable one of the other interfaces, instead of just
adding this one.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
Also, connect to the Cr50 via USB and run
cd extra/usb_console
make
./usb_console -p 5014 -e 1
Strings typed into this application will be case-swapped and
returned.
Change-Id: If94006490ec9c6033e8520297aa42ed623d4daf6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275132
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This adds a new task and endpoints to handle large opaque (to the
USB) chunks of data. The expected use case is that the USB
endpoint accepts bytes from the host and passes them blindly to
the blob-handling task. At some point, the blob-handling task may
wish to send bytes back to the host. What those bytes are and
what they mean is determined at higher levels of abstraction.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
This CL doesn't enable the blob-handler; it just makes it
available. The next CL will enable and test it.
Change-Id: I6eba8e8010466e71efe9c5e06848b9f403df835f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275131
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Holding the power button is currently the best known way to bring the AP
back to a state where it is shutdown and not powered.
BUG=chrome-os-partner:40826, chrome-os-partner:40677
TEST=Run `apshutdown` on glados, verify that power state machine transitions
to G3 after several seconds. Run `powerbtn`, verify that state machine
transitions back to S0.
BRANCH=None
Change-Id: Ia799c5f199127f31bd24907b93946c6289d381f8
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275060
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Ensure that we put a proper start bit if the transfer only contains a
read but has the start flag set.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:40919
TEST=On Smaug (P6), at the Linux prompt, do
"cat /sys/class/power_supply/bq27742-0/current_now" and see a proper
value rather than an error.
Change-Id: I10cc9907476b3cfb006f2c1540688139366c9195
Reviewed-on: https://chromium-review.googlesource.com/275079
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Puthikorn Voravootivat <puthik@chromium.org>
Charger task is overflowing and causing crash.
Increased charger task stack size by 128 bytes.
Also increased console/hook by 128 bytes as these
are also close to its limit.
BRANCH=None
BUG=chrome-os-partner:40766
TEST=1.Program EC image.
2. Run various tests to verify charger stack doesn't
overflow.
Change-Id: I6e350584508fa3a47769982b1e0cf3e3aea9ded6
Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/274204
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Allow timeout to be set at runtime by controller.
BUG=chrome-os-partner:40780
TEST=Manual on Glados. Verify PD I2C communication is functional.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I582e47c7bebfed7a639789c90064d86ffe1a5401
Reviewed-on: https://chromium-review.googlesource.com/274967
Reviewed-by: Alec Berg <alecaberg@chromium.org>
MOTIONSENSE_CMD_DATA return the value of a sinlge sensor.
BRANCH=none
BUG=chrome-os-partner:39900
TEST=On Smaug, using the new cros-ec-sensors driver,
check sensors data using iio sysfs interface.
Change-Id: I618ff050e0c7b4247ac56cfb0ca25e351270e1d6
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274824
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Clean up pd_tx_disable() so that it doesn't toggle a couple times
when we stop transmitting. Need to first set the CC pin to Hi-Z
and then the TX_DATA line since the CC pin is normally held low
during transmission.
BUG=none
BRANCH=none
TEST=test on glados. use twinkie to capture traffic and note that
without this change, the CC line toggles an extra time at the end
of each transmission. With this change it is a lot cleaner.
Change-Id: If26c7a10bbb08bc55b972bb0145115836579d37b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274884
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Implement the TCPC RX Detect register and use it for the TCPM to
enable and disable PD communication. When no type-C connection,
disable TCPC RX so that we don't send goodCRC when we are not
ready. Once TCPM establishes a type-C connection, enable TCPC RX.
BUG=none
BRANCH=none
TEST=tested on glados and on samus. On glados, without this change,
sometimes when you plug in zinger, we get into a hard reset loop
because TCPC is sending goodCRC to source cap while TCPM is still
debouncing CC and is not ready. With this change, we reliably form
PD contract.
Also tested enabling and disabling PD comms from the TCPM console
with "pd enable 0|1".
Change-Id: I8c9e696f2597978436f6ceccfe06ffb021c95ea3
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274811
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Copy task stack sizes from Samus. These can be tuned later if necessary.
BUG=chrome-os-partner:40790,chrome-os-partner:40677
TEST=`make buildall -j`
BRANCH=None
Change-Id: I862c55ca924879ffb08062eaf1466fd3d4a3090c
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274415
Reviewed-by: Alec Berg <alecaberg@chromium.org>
I'm planning to add functionality to the kernel which periodically
dumps the EC console log and concatenates it so we can use it in bug
reports and feedback. However, stitching together logs collected
using the existing SNAPSHOT/READ commands is difficult. This adds a
new version of READ which acts mostly the same but will only give you
the difference between the two most recent snapshots when you pass
the corresponding argument.
BRANCH=ToT
BUG=chromium:492721
TEST=On samus with kernel interface, cat
/sys/kernel/debug/cros_ec/console_log
and verify that the most recent bit of the log is printed,
use spammy commands like 'accelinfo on' and make sure nothing breaks,
check that 'ectool console' behavior has not changed
Change-Id: Ib8216caa917715820c3e265400f0db2125e8808b
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273581
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Initial support for glados PD. Charging and PD
communication only work on port 0.
BUG=none
BRANCH=none
TEST=make BOARD=glados, make BOARD=glados_pd
Connect hoho to glados and verify power contract successful.
Connect zinger to glados and verify power contract and
charging.
Change-Id: I42e7b8d154a79de2f8502648d9af7d4cfc00a266
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273138
Reviewed-by: Shawn N <shawnn@chromium.org>
Add TCPM on EC side and TCPC on PD side to allow PD
communication. Enable PD communication on port 0.
BUG=none
BRANCH=none
TEST=load on oak. plug in hoho on port 0, and make sure
we successfully negotiate a PD contract. (note: you have
to manually enable 5V VBUS right now)
Change-Id: I0ce7c016545bc56c5e10f66b49b73722187f12dc
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/271829
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Commit-Queue: Sheng-liang Song <ssl@chromium.org>
BUG=chrome-os-partner:40569
BRANCH=none
TEST=Begin
1. Install noraml linux images
2. Connected Battery which is having old firmware(100)
3. power on DUT and goto crosh (In normal mode)
4. run "battery_firmware update "
5. Remove AC to interrupt the update
6. Power OFF and power on the DUT again
7. Now seen critical firmware update screen.
8. Reboot around 4 min.
9. See login window.
End
Change-Id: I2090cfa9200a7402a5fba2e111073dd1d7e7b422
Signed-off-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273660
Reviewed-by: Shawn N <shawnn@chromium.org>
When CONFIG_MKBP_EVENT is enabled, the current code is incorrect because
we have a race condition when sending a new event (we force first the
interrupt, then send the actual event content to the mkbp event
framework which forces again the interrupt level).
If the software still called EC_CMD_MKBP_STATE while CONFIG_MKBP_EVENT
is enabled, this will kill the interrupt as soon as the FIFO is empty
even though other events are pending in order to be backward compatible
with firmware using the interrupt has a hint when polling the keyboard.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:33194
TEST=make buildall
fiddle with keyboard on Oak.
Change-Id: Iafaf4174124934328c4a0172adeca651e5551f28
Reviewed-on: https://chromium-review.googlesource.com/274070
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Firmware's original get_info command always returns the same values
for family, chipid, irom & fw despite indeed having different
versions.
Currently its:
family:000e chipid:0001 irom:1.0.0 fw:0.0.0
As we have a new stepping of the chip ('BB') and a corresponding new
firmware (>=0.74) we need a mechanism to verify and log this change.
CL uses the newly hatched appstest command (0x12) message 0x28 to
surface information that properly reflects both hardware and firmware
running.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:35939
TEST=manual,
For devices running 0.54 | 0.74 fw see gpio MCDP_READY asserted.
With CONFIG_CMD_MCDP in board/hoho/board.h see the following responses
when executing 'mcdp info'
Stepping | FW | Response
--------------------------------------------------------------------
'BA' 0.53 fails as expected
'BA' 0.54 family:0010 chipid:2850 irom:2.0.0 fw:0.54.0
'BB' 0.73 fails as expected
'BB' 0.74 family:0010 chipid:2850 irom:2.1.0 fw:0.74.0
Change-Id: I2c36393a298c617f903389dab24da631b60ec574
Reviewed-on: https://chromium-review.googlesource.com/274049
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
'muxes' refers to bus 0, port 1, not bus 0, port 0.
BUG=chrome-os-partner:40677
BRANCH=None
TEST=Manual on Glados. Run 'i2cscan', verify that bus "1" is scanned,
and devices respond with ACK.
Change-Id: I734306928a128fea5e70b37735a71a64483f4e88
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274125
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Allow to negotiate the packet command and responses to
whatever values the EC can support.
Set the buffer size including the necessary V3 header.
If the EC run v3 protocol with large packet support, but the kernel
does not have v3 support (3.10), we can not support sending or
receiving large commands.
Be aware that on 3.10, commands like ectool console will fail if
the EC wants to send command larger than the kernel can handle.
Copied kernel_version_ge from libusb-1.0.19/libusb/os/linux_usbfs.c.
BUG=chrome-os-partner:31989,chrome-os-partner:31660,chromium:454324,chrome-os-partner:39265
BRANCH=none
TEST=Build a special firmware to exchange 300 bytes.
Check ectool console works with the righ size.
Check that ectool is calling uname.
Check on Nyan_big: without change, "ectool version" crashes kernel. With
changes, "ectool version" works.
In conseuqence, it reverts commit be0bd9b835,
"ectool: Do not increase buffer size after probe max size from ec"
Change-Id: I54ffd43488ea81272f30789dc87a261085769fe0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274086
Reviewed-by: Shawn N <shawnn@chromium.org>
The USB spec mandates that all structs are little-endian over the
wire. Since we're a little-endian architecture (and the code
we're changing is intentionally chip-specific), we can just cast
the hardware buffer into the correct struct. This makes the code
easier to read and understand.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ib2d3b04f4db1a531cb3f5ada1a2e6ee82e8a23aa
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274130
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This change is necessary to ensure power-up of edge-case Skylake parts.
BUG=chrome-os-partner:40677
TEST=Manual on Glados. Boot system to S0, run "i2cxfer r 4 0x60 0x38",
verify that 0x7a is read.
BRANCH=None
Change-Id: Id9e62731aaa75fb2357a05d898ba2d4d28f87d9e
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274114
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
PCH_SLP_SUS_L can take up to 29ms to be deasserted after power-on or
RTC reset.
BUG=chrome-os-partner:40677
BRANCH=None
TEST=Manual on glados. Power board, verify that state machine
transitions to S0. Run "reboot" on EC console, verify that state machine
again transitions to S0.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I3f6e89eee1190a3fe84fdc7d939c05dfe5b94953
Reviewed-on: https://chromium-review.googlesource.com/274077
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Our USB buffers are just arrays of uint8_t in program RAM, so
let's treat them that way. The DMA descriptors are in normal RAM,
too.
BUG=chrome-os-partner:40693
BRANCH=none
TEST=make buildall
Change-Id: Ibafe1a557a328bbf8cf37ce113675fcd35bad376
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273918
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Fix tcpc_alert() so it can handle multiple alert bits. This is
needed since the initial version of tcpc_alert() is read/clear
and so we need to service all bits or else it will get lost.
BUG=none
BRANCH=none
TEST=test on glados. see multiple alert bits and handle both
of them.
Change-Id: I4d2a19a5d5d6f85cad3d67a96217d65e6e65715c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274084
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
- Don't re-send our slave address if we're not generating a start
condition.
- Handle repeated start vs new transaction properly in the Rx case.
BUG=chrome-os-partner:40677
BRANCH=none
TEST=Manual on glados. Verify 'battery' dumps correct info, and i2cscan
succeeds. Also verify that tcpc communication with PD transmits the expected
data.
Change-Id: I30315d2d82857d6031fda6d4e6a787a52ec01382
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273956
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Change refines HPD debounce values into both upstream and downstream
values for packetizing across the type-C link.
For LVL, the upstream type-C device will packetize any HPD transition
>=2ms as either HIGH or LOW. On the downstream side the value is
driven immediately. Additional debouncing should be done by true
upstream device according to specification.
For IRQ, the upstream type-C device will packetize any HPD pulse
>250usec as an IRQ. On the downstream side it will be de-packetized
to create 750usec pulse.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:39717
TEST=samus|macbook(2015) + hoho|dingdong|apple HDMI type-C dongles
still drive screens successfully.
Change-Id: Ide58f3b2d675a82c12ca6afc2be53ca6e2561ace
Reviewed-on: https://chromium-review.googlesource.com/273867
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Always enable these signals to help debug power sequencing. We'll need
to revert this change later.
BUG=chrome-os-partner:40677
BRANCH=none
TEST=sequence to S0 on glados and stay there
Change-Id: Ia845532fe7aed71bcb42b4ca6a9bfa20aa9e3e00
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273900
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This moves the STM32-specific code out of the common header file
and into the chip directory where it belongs. Note that this
doesn't actually change the code for non-STM32 SoCs; that will
happen in a separate CL for clarity.
BUG=chrome-os-partner:40693
BRANCH=none
TEST=make buildall
Change-Id: Ifdf0086e86a1088fb011b9ac4d6c70ab8da47aec
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273577
Reviewed-by: Randall Spangler <rspangler@chromium.org>
