The previous commits left npcx in a bad state. Change
CONFIG_PROGRAM_MEMORY_BASE to point to the actual start of code memory
and correct the linker file.
This still results in a non-working npcx image (more changes
forthcoming) but it does build.
BUG=chrome-os-partner:23796
TEST=make clean; make buildall -j
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ia300c5d18695dccd8d9fd9a6122cd7d30353adfa
Reviewed-on: https://chromium-review.googlesource.com/300295
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add config option to use the old accelerometer reference frame,
which is used on samus and products using 3.14 or earlier kernel.
This fixes samus so that the lid angle calculation is correct
again.
This also moves the accel_orientation structure out of the board
directory and into common code, since it purely is a function of
the reference frame being used.
BUG=chrome-os-partner:43494
BRANCH=none
TEST=test on samus, verify lid angle calculation is correct once
again. also, enable the motion_lid test and verify that it passes.
Change-Id: I948a74a71964b54c68be66e828a030ddd0418947
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300510
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Fix motion_sense task to make sure the task never exits. Note,
before this change a task_wake(TASK_ID_MOTIONSENSE) would end
the task because task_wait_event() would return 0.
BUG=none
BRANCH=smaug
TEST=with following CL, run motion_lid test and make sure it
passes
Change-Id: I67bd2e535d67215baa0cc1dfd0010b8199152dbd
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300630
Commit-Ready: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Update TCPCI to match specification version RC3.
BUG=none
BRANCH=none
TEST=tested on glados and samus by plugging in a zinger with
both polarities and verifying we make a power contract.
Change-Id: I9cd6d8db7b7149995847ec1b071fba1f4d4cd5a3
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299713
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Since there is no more concept of a flash region belonging only to the
EC, we only need one FLASH_SIZE config, which represents the actual
physical size of flash.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6
Reviewed-on: https://chromium-review.googlesource.com/297824
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In order to support architectures with non-contiguous writable and
protected regions, change storage offsets to be relative to writable and
protected regions, rather than relative to "the start of the region of
storage belonging to the EC".
Spec doc available at https://goo.gl/fnzTvr.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I796f8e7305a6336495bd256a78774595cb16a2e4
Reviewed-on: https://chromium-review.googlesource.com/297823
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
CDRAM / CODERAM configs were previously used for chips which copied code
from external SPI to program memory prior to execution, and were used
inconsistently between npcx and mec1322.
These CONFIGs are now completely redundant given new configs like
CONFIG_MAPPED_STORAGE_BASE and CONFIG_EXTERNAL_STORAGE.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I0e054ab4c939f9dcf54abee8e5ebd9b2e42fe9c4
Reviewed-on: https://chromium-review.googlesource.com/297804
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Kick the PD task when the dual role toggling is enabled to ensure we
start toggling immediatly and detect a UFP (USB device).
The issue was visible with the CONFIG_USB_PD_LOW_POWER change where the
task was waking up only every minute when the toggling was disabled,
the whole system would take up to a minute after resume to detect a peripheral
connected while in S3.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:45347
TEST=On Smaug, put the system into S3, plug a USB device (e.g. a USB
key), transition to S0 and verify that the kernel is receiving
immediatly the "host mode" notification.
Change-Id: I12d10941f9d2cefdfe711847ba0aec9f269e9bcd
Reviewed-on: https://chromium-review.googlesource.com/299796
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 6a0e8ec3b9b1a7a0eb222a9e6c132d88d33f60e2)
Reviewed-on: https://chromium-review.googlesource.com/299807
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
This commit adds a new basic driver for the Kionix KX022 Accelerometer.
Currently, the driver is capable of reading the sensor data and
manipulating its ODR, resolution, and range.
This sensor also has integrated support for Directional
Tap/Double-Tap(TM), however that functionality is not yet implemented in
the driver.
Lastly, since this accelerometer is very similar to the previous KXCJ9,
this commit tries to combine the drivers.
Note, the variant of the Kionix accelerometer MUST be specified in the
private data structure.
BUG=chrome-os-partner:43494
BRANCH=None
TEST=Build GLaDOS EC with driver enabled and verify that valid
accelerometer data is read, and that range, resolution, and odr can all
be modified.
TEST=Build samus EC image and verify that the lid still
works. Additionally, verify that I can change the odr, rate, and
resolution.
TEST=make buildall tests
Change-Id: I238ff1dc13f5342a93f8f701a0da85c52f25d214
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/299013
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Oak board relies on TCPCI power status. When board init, PD should
update it's VBUS status and TCPM needs to get power status after enable
TCPC power status mask.
BRANCH=none
BUG=chrome-os-partner:44952
TEST=manual
build and load on oak, disconnect battery.
power on system with zinger, and check PD state.
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: Ic0d4b50d38ac39ff31b3a257c4b3b5dde0ebda4b
Reviewed-on: https://chromium-review.googlesource.com/297871
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add all swap commands to USB_PD_CONTROL host command: data,
power, and vconn swap.
BUG=none
BRANCH=smaug
TEST=tested on both samus and ryu while connected to each other.
Change-Id: I280a0da2d3c5a5436243134ab3f2ec353ebf6ab8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/299290
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Gesture recognition can be done in software (by the EC) or in
hardware, by the sensor itself.
Add variable to compile gesture.c only in the software case.
BRANCH=smaug
TEST=compile.
BUG=b:23570481
Change-Id: I22bef0bf744516df267020d9458e0299a4da3d72
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296211
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Allow accelrate to suspend a sensor, even if the AP is using it.
For debugging only.
BRANCH=smaug
TEST=before accelrate 0 0 would not suspend the accelerometer in SO,
the AP is using it.
BUG=b:23570481
Change-Id: Iea4f616d0a0d1b4a0b0fa2bc942d05b2a2425926
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296210
Reviewed-by: Alec Berg <alecaberg@chromium.org>
If the ALS is not enabled in S3/S5 states then it will generate
errors when trying to read so should be gated.
This could be done with a check for chipset_state or adding a
new CONFIG_ALS_POWER_GPIO to check. However the ALS is also not
needed when the host is in S3/S5 yet the task continues to run
in the background every 1 second.
This commit adds a new task enable/disable hook to disable the
task when the system is suspended and enable the task when it
is resumed.
In order to fit this new task in glados the als console command
is guarded by a new config option. Since this is not a very
frequently used/needed console command it is disabled by default.
And finally the kunimitsu and strago boards try to enable ALS
but they never actually enabled the ALS task so this new code was
failing to build because TASK_ID_ALS did not exist. Also samus
was enabling it but as TASK_NOTEST so tests will fail, though
they are disabled globally on samus.
BUG=chrome-os-partner:43493
BRANCH=none
TEST=enable ALS on glados and successfully build and use it,
also successfully build EC and tests for kunimitsu, strago,
and samus which are the other boards that use the ALS task.
Change-Id: I192940d7f306a1663c7cb789c313151bbb5f2b90
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/298156
Reviewed-by: Shawn N <shawnn@chromium.org>
The original waiting time is 5 mesc, but it isn't enough for Oak during
sysjump from RO to RW, so, increase to 8 msec.
BUG=chrome-os-partner:44584, chrome-os-partner:44952
BRANCH=none
TEST=tested on Oak with a battery, with zinger attached,
Issue EC console commands:
> reboot
> sysjump RW (EC_SYNC isn't enabled in bootloader)
And check the PD status:
> pd 0 state
or
> pd 1 state
Change-Id: I846866a95d7730eef679ea9090883b33313d5007
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/298420
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Fix override host command so that if we are in the middle of
power swapping to handle one override command, that we return
an error if another override command is received.
BUG=chrome-os-partner:44958
BRANCH=smaug
TEST=make -j buildall
Change-Id: I2503120aed76b82166dd36a45c410f2b6ea921bd
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297837
Reviewed-by: Shawn N <shawnn@chromium.org>
Move asking for a power swap to become a source to happen
anytime we stop charging from a dual-role port. We used to
ask for a power swap when a dual-role override port was
cancelled, but with CONFIG_CHARGE_MANAGER_DRP_CHARGING we
can be charging from a dual-role port without having chosen
it as the override port, so this guarantees that we always
ask to become the source when we stop charging from a port.
BUG=chrome-os-partner:44958
BRANCH=smaug
TEST=build and run unit tests
Change-Id: I009178b479a4626888d11a9993c8738d928fbaf9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297880
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Add option to charge automatically from dual-role devices. This
also changes the charge override behavior such that any new
device attached will clear the override because any new source
is a potential device we might charge from.
BUG=chrome-os-partner:44958
BRANCH=smaug
TEST=tested charge_manager unittests with
CONFIG_CHARGE_MANAGER_DRP_CHARGING both defined and undefined
Change-Id: Iac77ff0c501826d5fb5a9d50f88399ebc3955b87
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297789
Reviewed-by: Shawn N <shawnn@chromium.org>
When a debug accessory is connected to the type-C port while the write
protection is enabled, put the case closed debugging in "partial" mode
rather than "full".
Update the "partial" mode to provide read-only access to the AP and EC
consoles.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:44700
TEST=check the EC console input/output over USB is still working with SuzyQ
on a write-protected system, verify that the console input is disabled.
Change-Id: I5baa03d6e738d06437c45469f46b286e76a755a4
Reviewed-on: https://chromium-review.googlesource.com/297141
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When all BMI160 sensors are suspended, FIFO is invalid.
Put the test to check if all sensors are disable within the processing
loop: otherwise, the FIFO can become invalid while we are processing it.
Add printf to be sure we are not processing invalid FIFO.
Add a macro around ODR to really check the ODR rate, excluding the
roundup flag.
BRANCH=smaug
BUG=chrome-os-partner:44381
TEST=Using a special patch (see 44381#14) add delay
to simulate a loaded EC (like at resume).
Using a script flip-flop sensors frequency (to simulate suspend/resume).
Check that:
- we are not crashing anymore (we were before this patch)
- the driver is not hitting invalid FIFO content.
Change-Id: I7c9e86f5dcfc231ab89472a6ea03af22e2c2ac32
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297178
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Before oak rev4, BC 1.2 status change was polled on VBUS change. The
designed is changed to use a single interrupt pin for both ports.
BRANCH=none
BUG=chrome-os-partner:42610
TEST=manual
make EXTRA_CFLAGS=-DBOARD_REV=3 BOARD=oak -j
emerge-oak chromeos-ec
load on oak rev3 and check BC 1.2 charging current
Change-Id: I9e6cdbb83468b5e4086cc86caadf7f2e3cbe6e48
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294442
Send soft reset to all connected USB PD ports before a user
initiated reset (via console or host command). This fixes a problem
where EC will send PD hard reset to a charger after an EC reboot, which
will cause another reboot if battery is not present.
BUG=chrome-os-partner:44085
BRANCH=none
TEST=tested on glados without a battery. with zinger attached, issue
'reboot' from console and verify that we only reboot once.
Change-Id: Id6c56cda33c289e3425cb433f7fcbe76669d2dff
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295889
Reviewed-by: Shawn N <shawnn@chromium.org>
(refer to CL:273620) enable the MKBP event feature to send host event
and wire up the PD specific events.
But, CONFIG_MKBP_EVENT conflicts with CONFIG_KEYBOARD_PROTOCOL_MKBP,
due to the GPIO name of EC interrupt pin. Align the GPIO naming of EC
interrupt pin to EC_INT_L.
BRANCH=none
BUG=chrome-os-partner:44643
TEST=On Oak rev3, plug/unplug USB devices and add kernel trace to see
the PD events happening.
Change-Id: I10de9c6611583bb6165bdc1848e542d4b8bba954
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/296012
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
This accounts for the extra head room in the RO image.
BRANCH=none
BUG=chrome-os-partner:43025, chrome-os-partner:44625
TEST=the cr50 image validates *and jumps to* the RW image at boot.
Change-Id: I8c87e7a9e7da187c19f135176ae5144cbc609cb9
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/296453
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Add config settings for ODR and EC rate per requestor and
per power state (1 for the AP, 3 for the EC).
This way we can finely set ec rate and ODR depending on usage.
On chromeos, AP is not setting frequency, so EC sets for different power
state. On some platform, sensors can now be suspended in S3/S5.
Allow EC oversampling when AP is only looking for a few samples.
It is useful for double tap detection where high accelerator ODR is
required.
BRANCH=ryu
TEST=Tested on Ryu
BUG=chromium:513458
Change-Id: Ic3888a749699f07b10c5da3bc07204afd4de70da
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295637
Light was gathered too often:
- missing timestamp when reading completes.
- error when calculating next timestamp.
BRANCH=ryu
BUG=chrome-os-partner:32829
TEST=check the light is sampled ~ every seconds, whatever the
motion task frequency
Change-Id: Id070af3c8d2e080780334822278dda267bea058c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295636
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Simplify sensor get_data_rate, get_range and get_resolution.
Error code was not checked and these functions as currently implemented
have no reason to fail.
BRANCH=ryu,samus,cyan,strago
BUG=chromium:513458
TEST=Check on ryu, compile
Change-Id: I40dca41cee29a19f65b2f84d434b4c19eb6cbf3c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295635
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Add a slow inverse matrix calculation function.
It is needed to apply factory offset properly.
Also consider the NULL matrix the identity matrix.
BRANCH=smaug,cyan
TEST=Unit test
BUG=chromium:517675
Change-Id: Ifa11954992e6f2fab02b4e92684e7b01bbaafe94
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294594
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Working on light sensor, sensor were read on every time,
SENSOR_EC_THRES was not taken into account.
Fix 64/32 conversions and add a function for dealing with rollover.
TEST=Set light sensor probe at 1s. Set accel sensor at 100Hz to fill
fifo often; verify that light sensor is queried every second only.
BRANCH=smaug
BUG=chrome-os-partner:39900
Change-Id: If1df53c1a9a304c992f8e517f5d516210118a437
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291992
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
When sensor is disabled, HAL will not send flush request to EC.
However, when sensor is reenabled, only new events are expected.
When we have a change in frequency, we have to request the host to
query all the current events.
Flush the FIFO when events are not needed because all sensors are
disabled.
BRANCH=smaug
TEST=Pass more tests: tests like ..._fastest_batching after _50hz_flush
have more change to pass.
BUG=chrome-os-partner:39900
Change-Id: I1a8fc3784e3e6be260b23103b28e336e242f14cd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291991
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Add a mask of custom events reserved for IRQ based sensors.
Copy data from raw_xzy to xyz while filling the FIFO
when FIFO is enabled.
BRANCH=smaug
TEST=Test with si1141 driver, check irq works for both driver.
BUG=chrome-os-partner:32829
Change-Id: I5e106df0c121e3bf1385f635195717395235ccc3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291334
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Matches definitons set in
chromium/chromeos/accelerometer/accelerometer_types.h.
Using that standard, the coordinate frames of the lid and base DO NOT
line up perfectly when the lid is fully closed or fully open.
Therefore, rotate the lid vector 180 along the X axis before
calculating the lid angle.
BRANCH=cyan
BUG=chrome-os-partner:40177
TEST=When the device is open 180 degrees, check the sensors
agree with each other:
Flat on the back (Z pointing to the sky):
localhost devices # cat */*raw
-1008 [keyboard : X]
-112 [keyboard : Y]
16544 [kyeboard : Z]
-256 [lid : X ]
2000 [lid : Y ]
16336 [lid : Z ]
On the right side (X pointing to the ground)
localhost devices # cat */*raw
-16928
-48
-1040
-16176
432
80
On the bottom edge (Y pointing to the sky)
localhost devices # cat */*raw
-192
15872
1648
496
15936
752
Check the angle as calculated by the EC is correct using accelinfo.
Change-Id: Ib8ee42da8cf818213f892b1f024253f37a4da488
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294716
Reviewed-by: Jonathan Ross <jonross@chromium.org>
Reviewed-by: Eric Caruso <ejcaruso@chromium.org>
On sysjump we attempt to lock all i2c ports in use, but locking is
by-controller. This leads to a deadlock if two ports from the same
controller are in use. Fix this by directly locking all controllers
present in the system.
BUG=chrome-os-partner:44214
TEST=`sysjump rw` and then `sysjump ro` on glados
BRANCH=None
Change-Id: I21d65cd4455769414216016a5c97ad118a712117
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/294959
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The current logic breaks out of the for() loop if SCL gets unwedged
(goes high), but still falls through to the "I2C unwedge failed,
SCL is being held low" case. Fix this so that we only hit the
"SCL is being held low" case if SCL actually is stuck low.
BUG=none
BRANCH=None
TEST=compile-test only, on samus
Change-Id: I39df1966dc25517ee03a56109e7d0b740c5ca12b
Signed-off-by: Kevin Cernekee <cernekee@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295043
Reviewed-by: Randall Spangler <rspangler@chromium.org>
PD charger voltage + current can now be limited with
EC_CMD_EXTERNAL_POWER_LIMIT. The limit is automatically cleared when the
AP transitions out of S0 into S3 / suspend.
BUG=chrome-os-partner:43285
TEST=Manual on Samus w/ zinger.
- Plug zinger, verify charging at 20V/3A.
- `ectool extpwrlimit 3000 12000 --dev=1`, verify charging at 12V/3A
- `ectool extpwrlimit 1000 5000 --dev=1`, verify charging at 5V/1A
- Plug zinger into other port, verify still charging at 5V/1A
- `powerd_dbus_suspend`, verify charging at 20V/3A
- `chglim 2000 12000`, verify charging at 12V/2A
- `ectool extpwrlimit 0xffff 0xffff --dev=1`, verify charging at 20V/3A
- `chglim 1000 20000`, verify charging at 20V/1A
- `chglim`, verify charging at 20V/3A
BRANCH=ryu
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I6cd5377be91b3df75f99cb414fd3fa5a463b56cb
Reviewed-on: https://chromium-review.googlesource.com/293954
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When building components from external libraries, instead of
rsyncing the library into our build directory and building there,
just build in the library directory and have it put its generated
objects into our build tree. That will keep any build artifacts
in the library directory from polluting our builds unexpectedly.
BUG=chrome-os-partner:43025
BRANCH=none
TEST=make buildall
Change-Id: I2f07a2b49d1a0ba9fd9fff0822551486be820b70
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295044
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This patch closes the loop of processing TPM commands, the response
generated by ExecCommand() is placed in the buffer to be returned
through FIFO read accesses.
State machine and register states are updated as per TCG Platform
Specification. A lot of debug output is generated, this is useful for
debugging, will be filtered eventually.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=with the appropriate tpm2 and trunks patches in place trunksd
successfully initializes the CR50, sending such commands as
Startup, GetCapability (three times) and SelfTest.
Change-Id: Ibbd952b53930e4530461db7dcdbc510a8022412c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293910
Reviewed-by: Utkarsh Sanghi <usanghi@chromium.org>
