These functions are not used by usb_i2c.c on chip/stm32, let's
move them to board/cr50 which is the only place where they are
used.
BRANCH=none
BUG=None
TEST=make buildall -j
Change-Id: I8c1b292838b8dbee9a9001add9332e0add80c342
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/778749
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This is causing an error in the latest coreboot toolchain:
util/export_taskinfo.c:33:30: error: duplicate 'const' declaration
specifier [-Werror=duplicate-decl-specifier]
BUG=None
TEST=Build now passes with latest coreboot toolchain and cros
Ztoolchain
BRANCH=None
Change-Id: I069d08128e264310d25a09ada2276f92796294b7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/679939
Commit-Ready: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
It was recently identified that when we do a software based battery
cutoff and leave the system in cutoff state for > 25-30 seconds, then
both FG and battery enter shutdown/ship mode. In order to get the
battery out of this state, charger needs to provide VBAT >
Vstartup. However, with the current implementation of
battery_is_present, if EC is unable to talk to the battery i.e. i2c
commands to read battery status fails, then battery_is_present returns
BP_NO indicating that the battery is not present. This results in
charger state machine setting 0V and 0A to the battery, thus causing
the BGATE to be switched off.
In order to wake the battery from such condition, it is necessary to
provide pre-charge current and minimum voltage to ensure that BGATE is
switched on and VBAT > Vstartup is provided.
This change updates the battery_is_present algorithm to:
1. Check if battery is physically present. If not, return BP_NO.
2. If battery is present now and was present before when we checked,
then return BP_YES.
3. If battery just changed status to BP_YES, then check its disconnect
status. If EC is unable to read disconnect status, then return
BP_NOT_SURE. This allows the charger state machine to provide
precharge current and minimum voltage.
4. If EC is able to read disconnect status, try reviving it if
necessary.
5. Return BP_NO if battery is still disconnected or is cutoff or not
initialized.
6. Else return BP_YES.
BUG=b:69329874
BRANCH=None
TEST=Factory verified following:
1. Recovery from software based cutoff : Pass 10/10
2. Recovery from hardware based cutoff : Pass 10/10
3. Recovery from hibernate : Pass 10/10
4. Recovery from critical battery condition : Pass 10/10
5. Boot-up in case of no battery : Pass 10/10
Change-Id: I248705f87469a8d6604da1b1919492766499dd73
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/776024
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Change the names to generic touchpad_* functions, instead of
vendor-specific names. Makes it a little easier to add drivers
for other touchpads.
Also fix console_channel.inc to add the channel whenever any
touchpad is used.
BRANCH=none
BUG=b:68934906
TEST=make buildall -j
Change-Id: I6d268db5ebd53db272fb2ee7bbf06bbe80845734
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/778750
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Not needed since we're using the SN5S330.
BUG=b:69140019
BRANCH=none
TEST=make BOARD=meowth and BOARD=zoombini
runs with no errors
Change-Id: Id8fa17e1e20ac805405fc6e48e481ceade1a1981
Signed-off-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-on: https://chromium-review.googlesource.com/777823
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Nearly every board had a buttons array defined in which its contents had
the standard volume buttons. This commit creates a single common
buttons array that can contain the standard volume buttons and recovery
buttons. If a board has volume up and down buttons, they can simply
define CONFIG_VOLUME_BUTTONS and it will populate the buttons array with
the standard definition. The buttons are active low and have a 30 ms
debounce period. Similiarly, if a board has a dedicated recovery
button, defining CONFIG_DEDICATED_RECOVERY_BUTTON will also populate the
buttons array with a recovery button.
BUG=chromium:783371
BRANCH=None
TEST=make -j buildall.
TEST=Flash a device with CONFIG_VOLUME_BUTTONS, verify pressing volume
buttons still work.
Change-Id: Ie5d63670ca4c6b146ec8ffb64d40ea9ce437b913
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/773794
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
At the end of the sensor initialization, all _init sensor routines set
the range to the default value from board.c file.
Put all the code in a single place, move it from sensor_common.c to
motion_sense.c.
BUG=none
BRANCH=none
TEST=compile
Change-Id: If89cf27c6438e0f215c193d68a480e027110174c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767610
Reviewed-by: Shawn N <shawnn@chromium.org>
Disable CMD_IDLE_STATS and USB_PD_LOGGING for gru in order to make
more code space for upcoming 64-bit host event support
BUG=b:69329196
BRANCH=None
TEST=make -j BOARD=gru
Change-Id: I5fca66d13224e077b157b0768ba0264948ab6a0d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/775876
Reviewed-by: Shawn N <shawnn@chromium.org>
add usb_console, console.py to chroot install.
This tool allows directly accessing the usb
console of servo v4, servo micro, cr50, etc.
BUG=b:69016431
BRANCH=None
TEST=usb_console -d 18d1:501b
Change-Id: If9d5d49cf31d785ea9a7cec0a4eeeb34abae9cd1
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/773400
This change switches the SS lines off in the main USB mux.
There has been some general flakyness regarding USB3 peripherals
and this change might address it.
BUG=chromium:718075
BRANCH=None
TEST=lsusb -t indicates 5000M before, 480M after.
Change-Id: Id201fb20dc6489c4a071cb1c9c0624d7aa54652d
Reviewed-on: https://chromium-review.googlesource.com/509130
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This is required to allow bumping up of host events to 64-bit by making
space in the rodata. CL 770923 had initially used GPIO_SHORTNAMES, but
HOSTCMD_ALIGNED seems to be a better option.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: I63699f9cec244925c031d81f50889851c6da8b5c
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771931
Reviewed-by: Shawn N <shawnn@chromium.org>
The host should be able to retrieve proper TPM status and ID registers
while TPM reset is pending.
BRANCH=cr50
BUG=b:68012381
TEST=after appropriate fixes in coreboot the
firmware_Cr50ClearTPMOwner autotest does not fail any more
Change-Id: I245656ccb1c05e46715deb18bd5f8985c4197c52
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/775281
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Disable ACCELSPOOF and FLASHINFO to save some space. This is required
to support 64-bit host events.
BUG=b:69329196
BRANCH=None
TEST=make -j buildall
Change-Id: I364adb1e224c2084398b4ee5bb9fd24a1c542e0e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771997
Reviewed-by: Shawn N <shawnn@chromium.org>
On Nautilus, we use two ps8751b TCPC chips.
According to the latest schematic (link is in the bug),
we'll place two TCPC chips separately on different I2C ports.
BUG=b:69017605
BRANCH=none
TEST=build/flash nautilus rev0, and confirm PD charging from one
USB-C port works.
Change-Id: Iab7402023f148d478cba249aaf83a23675a7137b
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/758336
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Created Meowth symbolic link to Zoombini.
Modified Zoombini gpio.inc and board, etc. files to
compile a Meowth EC image with the correct gpios.
BUG=b:69133424
BRANCH=none
TEST=make BOARD=meowth and BOARD=zoombini
runs with no errors
Change-Id: Ib34d956efa89ae125de1ce7f8799162c74df0122
Signed-off-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-on: https://chromium-review.googlesource.com/762039
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
If the i2c master sends a stop condition before we've buffered the last
Rx byte (eg. due to higher than normal i2c interrupt latency) then we
don't want to drop the last byte on the floor, it's still meaningful.
BUG=b:65711378
BRANCH=glados
TEST=Spam TCPC_REG_ROLE_CTRL commands from caroline to caroline_pd,
verify no errors are observed on either side for 12,000,000
transactions.
Change-Id: I0c4a81d97315cff553a5448c0940746e1ef0ed2c
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771936
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
EC_IN_RW signal is used to determine if the switch to dev mode can be
safely made. However, EC_IN_RW needs the EC_RST_L line driven low in
order to be reset. In faft tests that utilize crosEcSoftrecPower
method, EC_RST_L is not being driven by servo to fix other test
failures related to keeping EC and AC reboots in sync.
This CL adds a new argument 'wait-ext' to the EC reboot command.
When this option is used, instead of the EC generating a reset via
it's system watchdog, it will wait 10 seconds for EC_RST_L to be
driven.
BUG=b:64603944
BRANCH=coral
CQ-DEPEND=I086687c3dd7591460099267880d56ab8265d2e4b
TEST=Ran "/usr/bin/test_that --board=coral <ip addr> firmware_DevMode"
mutliple times and verified that it passes. Previoulsy, this test
always fails when the EC is in RW before it starts. Also tested
platform_ServoPowerStateController_USBPluggedin and verified it passed.
Change-Id: I614f9156066d5719601ee43e29c7a064f9bba6e2
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/737524
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In order to avoid runtime 64-bit left shift, check for extpower and
add two separate calls to host_set_single_event rather than
calculating the parameter at runtime. This avoids the requirement of
runtime logical shift for 64-bit.
BUG=b:69329196
BRANCH=None
TEST=make -j BOARD=samus
Change-Id: I64cacf6253878ed7d69f6b17baeb6c27c470378a
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771854
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
servo_micro has the console on intf 3, while servo_v4
has it's console on intf 0. Abstract this into the
config file rather than hardcoding.
BUG=b:37513705
BRANCH=None
TEST=update servo_micro
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: I0090a0d081e001e62ffa7235eebbd6131ea00dcf
Reviewed-on: https://chromium-review.googlesource.com/769794
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
This reverts commit 1f767e3e91.
This is required to ensure that PMIC VR decay is enabled before
SLP_S0# is asserted. Else, the setting does not take effect and hence
results in higher power consumption.
BUG=b:69337192
BRANCH=None
TEST=make -j buildall. Verified by adding prints that VR decay enable
happens before SLP_S0# is asserted.
Change-Id: I0353f70c65ebe673b0e1b5ddbae2bb04368308cc
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771055
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This reverts commit 352276235c.
This is required to ensure that PMIC VR decay is enabled before
SLP_S0# is asserted. Else, the setting does not take effect and hence
results in higher power consumption.
BUG=b:69337192
BRANCH=None
TEST=make -j buildall
Change-Id: I6885e7447277d853a2414be299dfea25f5547df4
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771054
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Enables the clock to the debug module so that when connecting via SWD
debugger the watchdog and timers are stopped.
BRANCH=master
TEST=Build on stm32f0x board and connect via SWD, observe no watchdog
reset.
Change-Id: Ic40b16c09acc5920da2c1a39e9391a6b21849d2c
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: https://chromium-review.googlesource.com/765290
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add espi control module for it83xx.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. it8390+Intel SKL-Y RVP3 and boot to shell.
2. console command "kbpress 1 4" to test keyboard data.
(board code for espi module test on CL:392587)
Change-Id: I1b32bd16f7e01abf07b9c9a68ebef2399cc9828d
Reviewed-on: https://chromium-review.googlesource.com/394471
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds "servo_updater", "powerlog", "ecusb" library into
the chroot's python install, as well as configs for servo_v4 and
servo_micro. This allows easier access to these tools.
servo_updater and powerlog are installed in the default path.
/usr/share/servo_updater/configs contains the servo config files.
BUG=b:69016431
BRANCH=None
TEST=sudo servo_updater -b /../servo_v4.json -f servo_v4_9040.0.0.bin
powerlog -b marlin.board -c marlin_common.scenario
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Change-Id: I0b3f1b16fcd422297af88c236a2a4ddb2cc25819
Reviewed-on: https://chromium-review.googlesource.com/767547
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
On Nasher, sending TCPC_TX_BIST_MODE_2 to register 0x50 on the
PS8751 TCPC does not generate BIST Carrier Mode 2.
BUG=b:68337231
BRANCH=None
TEST=`make -j buildall`
Generated an eye diagram for Nasher on the GRL USB-PD test station
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: Ia6e5df54a183c989a68d12be3a46896e3daea738
Reviewed-on: https://chromium-review.googlesource.com/741090
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Configure GPIOs to match grunt proto v1.1 schematic.
Change EC chip to npcx7m6f.
Minimal board.c/h, just enough to build.
BUG=b:64935726
BRANCH=none
TEST=make BOARD=grunt
Change-Id: I1a1f581c7ee7b80808c0dde179bc3ee0d69f960e
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/754302
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Support protection of regions that aren't aligned to a power of 2 by
using two MPU entries, and taking advantage of the sub-region feature.
Also protect code RAM from being overwritten, on parts that use external
storage.
BUG=chromium:782244
BRANCH=None
TEST=On kevin, call:
mpu_protect_data_ram();
mpu_protect_code_ram();
mpu_enable();
Verify that first call results in the following update_region params:
addr: 0x200c2000 size: 0xc01d
Decoded: Protect 24K region
Verify that second call results in the following params:
addr: 0x100a8000 size: 0xc021
Decoded: Protect 96K region
addr: 0x100c0000 size: 0xf01b
Decoded: Protect remaining 8K region
Also verify that writes to beginning and end of code ram region trigger
data access violation after enabling protection.
Also verify that sysjump fails.
Change-Id: Ieb7a4ec3a089e8a2d29f231e1e3acf2e78e560a1
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/757721
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Similar to coral and poppy/soraka devices, configure
USB_C{0,1}_PD_RST_L to be GPIO_ODR_HIGH since nautilus uses parade
TCPC on both ports.
BUG=b:69198785
BRANCH=None
TEST=make -j BOARD=nautilus
Change-Id: If76cf0588744b3adcfd75f4e2ebe0ea9e721683d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767071
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reference CL:
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/762066
The reset line for the parade TCPC on port 1, has an external 1k pull
up resistor. However, the gpio.inc description for this line was set
to OUT_LOW which results in a short reset pulse. This can lead to an
external charger seeing an unattach event and dropping VBUS. On Soraka
systems with certain chargers this results in a continuous reboot loop
when no battery is connected.
Changing the default state of this line to ODR_HIGH prevents reset
from being pulled low until the EC is intializing the TCPC and fixes
the continous reboot loop issue when no battery is connected.
BUG=b:69198785
BRANCH=None
TEST=On a Soraka system, verified that connecting Lenovo Type C
charger on Parade port did not result in reboot loop when no battery
is connected. Earlier this same setup resulted in continuous reboot loop.
Change-Id: I5138e129431ee4f0c1c6ceaaac5ab288c3ab6233
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767070
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Add support for touchpad debugging in usb_updater2, allowing an
arbitrary parameter to be passed.
BRANCH=none
BUG=b:63993891
TEST=./usb_updater2 -g 00 -d 18d1:502b
Change-Id: I1242e3bab9dc69ec3a92dd158c85606211e40f21
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/763575
Reviewed-by: Chun-ta Lin <itspeter@chromium.org>
We support touchpad-specific debugging feature over the USB update
protocol. This will be used to fetch raw data from the sensor,
without requiring to remove the write-protect screw.
BRANCH=none
BUG=b:63993891
TEST=./usb_updater2 -g 00 -d 18d1:502b
Change-Id: I46dfd97aaa17b73a5893fe1e8c62327a302f829b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/763574
Reviewed-by: Chun-ta Lin <itspeter@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The ISL9238 has a functionality where it will reload the adapter current
limit from a strap which is read from the PROG pin. This is problematic
when we decide to set the current limit prior to AC actually being
inserted. This commit disables this functionality from the charger.
It seems however that the charger will read the PROG pin and reload the
ILIM at least once before respecting the bits.
BUG=b:67120928, b:66017697
BRANCH=None
TEST=Plug and unplug and then plug again AC. Verify that the default
current limit is not set by the charger automatically.
Change-Id: Ia8e8742843f6ceb286635b31e0fe5c070a2b6dfe
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/759693
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Shamile Khan <shamile.khan@intel.corp-partner.google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
The ISL9237/8 can both be powered by VSYS or AC, therefore, it's not
needed to reinitialize the charger after AC is present.
This commit moves the contents of charger_post_init() into a new init
function that will be run once at HOOK_INIT time.
BUG=b:67964166
BRANCH=None
TEST=make -j buildall
Change-Id: I637b1209f86f686013fee0783914fa1596076fa6
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/759692
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
