Add a LPC command to control USB charging mode. Also add the command to
ectool.
BUG=chrome-os-partner:7476
TEST=Manually test on link proto-0.
Change-Id: Ica87d0a690bc86e28844bd695f31641398b21939
Signed-off-by: Vic Yang <victoryang@chromium.org>
This CL attempts to abstract underlying bus from i8042 code. Nearly
all i8042 logic is isolated already. This patch is intended to allow
us to use i8042 logic for processing keys and commands on boards which
do not necessarily use LPC as the host <--> KBC bus interface.
This CL does the following:
- Define KBC bus <--> host (kbc_host_bus) on a per-board basis in
board.c.
- Add generic wrappers in place of lpc_keyboard_* in i8042 code.
- Define the behavior of generic wrappers in EC-specific keyboard
sources. If board.c specifies LPC, then send via LPC.
TODO: This needs to be tested on real hardware...
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=None
TEST=Locally compiled for Link, BDS and Discovery.
Change-Id: I9cabd514bd44fd6b508c26994eccc3011eedbc0f
The temperature calculation currently uses fixed point operations.
Change it to use floating point for better readability and maintenance.
Also changes disable_fpu() to accept parameter which serves as
optimization barrier to prevent floating point operations after
disabling FPU.
BUG=chrome-os-partner:7801
TEST=In console, tempremote "tempremote 29715 -105000 6390" gives 28506.
Change-Id: Ib766904b8feb9a78eac9f7cd53afeca85091c5a5
Signed-off-by: Vic Yang <victoryang@chromium.org>
This will allow more efficient access to EC-provided data (temperature,
fan, battery) by the main processor.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7857
TEST='ectool hello' from link main processor should still work
Change-Id: I2dc683f3441b34de9fb4debf772e386b9fdcfa82
Implement enable_fpu() and disable_fpu().
enable_fpu() disables interrupt and then enables FPU.
disable_fpu() disables FPU and enables interrupt.
Also added a CONFIG_FPU flag.
BUG=chrome-os-partner:7920
TEST=none
Change-Id: I2d71f396d9c7d7ac4a6a2d525f3d86f8aae87521
Signed-off-by: Vic Yang <victoryang@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7451
TEST=hold down no keys; KB init state should be blank
hold down reload (F3); KB init should indicate recovery key pressed
hold down F3 + ESC; same
hold down F3 + F2 + ESC; KB init should NOT indicate recovery key pressed
Change-Id: I0fbf15407b20669396f667e6499ee5a9d545a4d5
These provide 8-bit accesses to registers within an I2C device.
BUG=chrome-os-partner:7839
TEST=none
Testing will come when I start using them.
Change-Id: Ib53d3347253bccee93cb9c5da12db92970155d92
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Remove id field from temp_sensor_t struct, since it's only used by the
console command (which already knows the id, because it's looping over
it).
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST='temps'
Change-Id: I0970850073d644509cd5501d7ac4421c7373143b
This change adds a common part of smart battery driver. Following
features are not implemented, or in chip specific driver:
Battery access control, authentication, factory mode
Manufacturer access/data commands
Block read/write, device name, flash data
Chip specific features, per cell info/temp/capacity
Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7856
TEST=console command check battery staus
[unplug power]
> battery
[check voltage,current,capacity,time to empty]
[plug power]
> charger voltage 8400
> charger current 4250
> battery
[check current,time to full]
> charger input 4032
> battery
[check current,time to full]
[wait 130 seconds, charger watch dog timeout]
> battery
[check current]
Change-Id: Ifac17a0892f52e8f37eebc14b00e71f18360776c
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7493
TEST='powerbtn' to boot main processor, then 'temps' and 'pecitemp'
Change-Id: Id57526ebb37c8aecb05ecebccc2824f462b9de1a
Implement TMP006 object temperature calculation. Also add a console
command to calculate temperature with manually entered data.
BUG=chrome-os-partner:7801
TEST=In console, "tempremote 29715 -105000 6390" gives 285.00K.
Change-Id: I0f9193fb970fdc36566399e7083e73ab58965a85
Battery charging state machine contains many file changes.
This is the 1st part of the break down. Refactor original
test code into board dummy driver. Normalize charger API.
And import link's charger IC driver.
Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7855
TEST=build without warning and error
BOARD=bds make
BOARD=link make
BOARD=discovery make
Change-Id: I34b6e9862a45331378916bc77653d4adb22ca548
Record commands used previously and use up/down arrow key to navigate in
the command history.
Also removed the command '.' of repeating last command as we can use up
arrow key now.
Also changed the behaviour of uart_write_char() to be blocking on
transmit FIFO full, so that we do not lose echoed character and do not
need to flush.
BUG=chrome-os-partner:7815
TEST=Type 'help' and enter. Then type 'aaaa' and up arrow key, should
show 'help', and pressing enter prints help.
Type 'hellp' and enter. Then type 'aaaaaa' and up arrow key, should show
'hellp'. Should be able to use left/right arrow key and backspace to
correct it to 'help', and pressing enter prints help.
Type 'help' and enter. Then type 'aaa', up arrow key, and down arrow
key. Should show 'aaa'.
Change-Id: I65c615d61bf63acb31bea329aa91a3202d4db0ad
- Add #ifdef CONFIG_TEMP_SENSOR before #include'ing temp_sensor.h
which actually requires temp_sensor_id to be defined.
Revert the forward declare used earlier since it is not the
correct solution in this case.
- Add #ifdef CONFIG_CHARGER before calling charger_init()
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=None
TEST=compiled on both BDS and Discovery
Change-Id: I60b7e4ba91eb958b3ad724cc9ffa9a12fe9c3a71
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7488
TEST=type things into the x86 console UART; should appear on the u-boot prompt
Change-Id: I75fd225842c03d11d79280fb7453ad37695279e3
This is a trivial patch to fix compilation for boards that are not
based on LM4 (e.g. Discovery).
Signed-off-by: David Hendricks <dhendrix@chromium.org>
TEST=Compiled for Discovery
BUG=None
Change-Id: Ia1f29c61ff4a1f65fe65c43a8e58def7d1217ab2
Refactor board/chip-specific code into corresponding directories.
Add support of the four I2C temp sensor in Link.
Use table lookup to handle different types of temperature sensors.
BUG=chrome-os-partner:7527
TEST=Correctly read EC internal temperature on bds.
Compile for link succeeded.
Change-Id: I694cfa54e1545798d877fafdf18c5585ab5f03e2
The problem comes from the different assumption of interrupt mode in EC and
the PCH. The PCH assumes IRQ1 is edge-triggered and triggered at a rising edge.
However, the auto-IRQ functino of EC is level-triggered and uses low-active to
assert an IRQ. This makes the deadlock so that the kernel never gets an
interrupt until a byte is manually pulled from host.
So, the solution is manually firing an IRQ_1 to host after EC puts a byte to
port 0x60. Note that the auto IRQ needs to be disabled in order to avoid
the interference with manual IRQ generation.
This CL also moves chip specific code to lm4/lpc.c and handle some minor
keyboard commands.
BUG=none
TEST=on hacked baord.
Change-Id: Ib57f5a4d749cb019e4c3c00da110054c4f335c7b
The ADC input pin was always configured as BDS. Modified it to configure
the correct pin.
BUG=none
TEST=On Link, "rw 0x4002451C" show 0xff instead of 0xf7.
Change-Id: I1efd5cd59ad65f55cd673529afa6153add63ecac
Refactor ADC code and move board/chip-specific part to corresponding
directories.
Implement function and console command to read Link charger current.
BUG=chrome-os-partner:7527
TEST=Read EC temperature and POT input on BDS.
Change-Id: I7fafd310ea49d9b2781f10c3453f5488da29a08a
simple UART driver to get the serial console on the USART3.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run on Discovery board and check we get the first message on the
UART and the console is echoing the characters.
Change-Id: Id85999a5ddbd75804e9317a1b8c2fd4afb89eb38
Expand the macros before building the priority variable name in order to
ensure we have a valid name.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=check manually preprocessor expansion for several combinations.
Change-Id: I926821d42c966ac674e7d24254c9f22779f93ca2
I keep hitting the darn arrow keys. Until we can do something more
elegant like a real command history, this will at least keep me from
corrupting the display and input buffer.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=type 'help' and some arrow keys, then enter. Should print help, not an error.
Change-Id: Idb552e9c22876fc2dc1f349f0038e94048f00aa7
Preparatory work to introduce a second SoC : 3rd series 2/2
All the RO/A/B firmware copy code could be generic to all our platforms.
The console commands are a 'standard' API.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=on BDS EC console, check the reset cause with the 'sysinfo' command.
Change-Id: Ieeb84571085d88b5747a09da4c33d3852bb0da96
Preparatory work to introduce a second SoC : 3rd series 1/2
Most of the code is handling the buffering and the printf, thus put it
in an hardware independant location and only implement the UART
dependant portions in the chip driver.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run on BDS and stress the console.
Change-Id: I9376f2fa1dad341eac808e1756dbeff32900bd51
Preparatory work to introduce a second SoC : 2nd series 1/4
The atomic operations are SoC independant since they are only using
LDREX/STREX instructions which are just core specific ARMv7-M).
The watchdog header defines the API which is common to all platforms.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run EC firmware on BDS and check a few console commands
Preparatory work to introduce a second SoC : 2/5
The hwtimer.* files implement the driver for the SoC timer block.
The timer.* files provides the OS level clock/timer functions.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=on BDS, check 'waitms' and 'gettime' on the EC console.
Change-Id: Icbc58d9be59ee268e2d5a94f8b20de0cabcdc91d
Preparatory work to introduce a second SoC : 1/5
Instead of putting hardcoded IRQ SoC name in the vector table,
upgrade the DECLARE_IRQ macro to expand its argument.
Also add a parameter to set the size of the NVIC table to save flash
memory.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run EC on BDS and see timer IRQs firing.
Change-Id: I44fefdabdd37d756492a71f24554979c72c1b50f
They are designed to protect shared hardware resources (e.g. I2C
controller).
Please refrain using them as a general purpose synchronization primitive
for the tasks to avoid unintended slippery effects (e.g. priority inversion),
use the provided message-passing functions instead for that purpose.
The mutex variable (ie the "struct mutex") should be initially filled
with 0, but this is the default compiler behavior if you declare it as a
global variable.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make qemu-tests
Change-Id: I328f7eadf5257560944dbbbeda0b99d5b24520e8
Instead of using a runtime callback to register the console commands,
put them in a special linker section. So we can do a macro to "register"
them during the build.
It saves 684 bytes and a few microseconds at startup.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run a few commands from the BDS command line.
Change-Id: Id33ea210b9035bf76ed720373c74c5dd24ccd1b1
Implement TPS2543 USB charging control.
It contains routine for setting each USB port as dedicated charging port
or standard downstream port. To allow us controlling the current
distributed to each port, we can select whether to allow 500mA or 1500mA
for each port.
BUG=chrome-os-partner:7476
TEST=Added USB port definition for BDS and tested GPIO output voltage
level is correct for all modes.
Change-Id: I19bc4b30d333aa802f868ebfc3a398b30e99ba0f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7456
TEST=if it runs, it works
Change-Id: Ib82afab7d53203af31eefc9887feb98679266ac1
For bringup, this powers on the x86 unconditionally.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7528
TEST=none
Change-Id: Ib23e56d38ab42f8d8a4dbd1ba9dce12f0c3eeec9
Added gpio_enable_interrupt() to enable them. This ensures that a
module which handles GPIO interrupts doesn't get them until it's
ready.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7456
TEST=toggle power button while rebooting; without this fix it triggers a hard fault.
Change-Id: I35d926053963a70dd9246ce46a4913603b2b2489
This just ensures the JTAG pins are reset to JTAG function on warm reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7448
TEST=none
Change-Id: I0cccdbe7a68c228db7f354898ed30598e9fabff0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7528
TEST=from debug console,
gpioget --> prints current level. Run a few times to see DEBUG_LED
value toggle.
gpioset debug_led 1 --> turns debug LED on. Run repeatedly to
override the idle task toggling it off.
Change-Id: I7c64044228697e052a9c20eb052d37a1f640f6e7
