When TPM is wiped out on 'ccd open', the TPM reset could be invoked on
the TPM task context, if physical presence verification was not
required, or on the hooks task context, if PP was required.
This patch makes sure that the proper TPM reset is invoked depending
on the context. Also fixing the return value in ccd_command_wrapper(),
because it is expected to be from the ec_error_list enun, and this is
what is returned in the vendor command error response payload.
BRANCH=cr50
BUG=b:62537474
TEST=verified that TPM and device reset happen smoothly in both cases
when 'ccd open' requires and does not require PP.
Change-Id: I1935fc90b386bb8f2158001e153da371fca22d03
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861206
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When implementing 'ccd open' and 'ccd unlock' through gsctool, we need
to be able to pass to the host the state of the physical presences
state machine regarding the expected user action (pressing the PP
button).
Two new VENDOR_CC_CCD subcommands are being added: CCDV_PP_POLL_OPEN
and CCDV_PP_UNLOCK. In response to these commands, the Cr50 always
returns VENDOR_RC_SUCCESS return code and a single byte payload
showing the CCD and PP state:
- CCDPP_CLOSED - PP process is not running, CCD closed. Maybe user
missed a button press deadline.
- CCDPP_AWAITING_PRESS (self explanatory)
- CCDPP_BETWEEN_PRESSES (self explanatory)
- CCDPP_PP_DONE - CCD is opened/unlocked (as per user request), PP
process succeeded.
BRANCH=cr50
BUG=b:62537474
TEST=with the upcoming change to gsctool verified that PP states are
properly conveyed to the user.
Change-Id: I97b1fef4440eea93c5c5ac01b7c60bfce9a4595c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861001
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Depending on device configuration and compile time options, CCD
commands 'open' and 'unlock' could either be executed immediately, or
require the user to take the device through physical presence state
machine.
As these commands execute through TPM vendor commands, there needs to
be a different return value indicating that the command action is not
finished and PP process is in progress.
Let's add another vendor command return value, and do not consider it
a failure if vendor command returns this value in response to 'ccd
open' or 'ccd unlock'.
BRANCH=cr50
BUG=b:62537474
TEST=took an Eve through 'ccd open' sequence
Change-Id: Ie62ccfb4319a13b6fb6c1c854a0ea26beb9f517c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/860999
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch adds an API which exports current physical presence state
machine state to allow the caller to see if the state machine is in
one of the three distinct states:
- no PP process in progress
- user PP input is expected
- PP process in progress, user input is not currently expected
BRANCH=cr50
BUG=b:62537474
TEST=with the rest of the patches applied verified that PP state is
properly communicated through this API.
Change-Id: Ia10cd20c490dadef595f30e0b7257e51b6abf8fa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/860998
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
In preparation to conveying the PP state to gsctool let's split the
'PP_DETECT_IN_PROGRESS' physical presence FSM state in two:
- PP_DETECT_AWAITING_PRESS, a state when user physical presence
indication is expected
- PP_DETECT_BETWEEN_PRESSES, a state when the previous indication was
accepted, but the next one is not yet required.
The code is modified to accept the disjunction of the twp new states
as the old PP_DETECT_IN_PROGRESS state.
BRANCH=cr50
BUG=b:62537474
TEST=successfully took Eve through 'ccd open'
Change-Id: I0d229f2f8beeec01ea2a9106b0cbc3f9801ff479
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/860997
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
We want to be able to tell between cases when a CCD command executed
on the TPM vendor command context was invoked through CLI or received
over /dev/tpm0.
Let's add a flag set for the duration of execution of the CLI command.
BRANCH=cr50
BUG=b:62537474
TEST=none, this is not used yet.
Change-Id: I309b4364285816a5f54522b00c93a4bf5025e2c4
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/860913
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Rainier has landscape orientation, therefore needs its accelerometer
base values adjusted.
BUG=b:71753415
TEST=Rotate rainier and make sure screen orientation is not off by 90
degrees.
BRANCH=None
Signed-off-by: Ege Mihmanli <egemih@google.com>
Change-Id: I60b49e717c691e34a39e817d2c064ea45b8d53d7
Reviewed-on: https://chromium-review.googlesource.com/862733
Reviewed-by: Shawn N <shawnn@chromium.org>
Using and extending the existing framework, move ccd commands
'password, lock, open, and unlock to the same processing path.
The first three commands accept a single parameter, password. It is
required for the password command and optional for unlock and open.
The lock command does not require any parameters.
Wiping the TPM, if necessary, now happens on the same context where
CCD command is executed, i.e. the TPM task context. This is why the
same context TPM reset function needs to be exported and used here.
ccd_open() and ccd_unlock() could be further refactored, this would
require a bit more effort to find appropriate balance between
commonalities and differences.
BRANCH=cr50
BUG=b:62537474
TEST=verified that ccd commands to open, unlock, lock and set and
clear password all work.
Change-Id: I2b9f2b550347b590a55bfaef262a4f050d3f4c1c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/854709
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Instead of defining these options in other header files, set them
here. This also prevents pre-submit checks from complaining
about these symbols being used without being defined in config.h.
BRANCH=none
BUG=b:65697962
TEST=make buildall -j, presubmit checks pass for CL that makes
use of CONFIG_EC_EC_COMM_BATTERY_MASTER.
Change-Id: I8098a8ae6422bf0ffb26523785d7c16a3ee1c6df
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/861365
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The ANX3429QN-AA-R I2C bus cannot operate above 400kHz without
first setting register 0x3 to 0x48. We can just lower the bus
to 400kHz without having to set any registers and everything
works as expected.
BUG=b:71810830
BRANCH=none
TEST=Booted grunt with new firmware and p0 TCPC communicates
with EC successfully
Change-Id: I98e3c1a4844e1a79d23f8478fdf97ada72ad1c7d
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/862543
Reviewed-by: Edward Hill <ecgh@chromium.org>
From comment, we should follow rule to use sensor index.
"the first 2 entries must be accelerometers, then gyroscope."
If not, screen rotation and clamshell/tablet mode switch in ui
will not work.
And I think we had better reorder "motion_sensors" structure
as well. Use tab indent instead of space.
BUG=b:71370092, b:71370114, b:69399214
BRANCH=none
TEST=check screeen rotation and tablet/clamshell mode.
Change-Id: I6b19411890c4e1abf9ceda45b47d18616c6e7b94
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/858878
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
After a call to pthread_create(), it is indeterminate which thread the
caller or the new thread will next execute. Synchronize with the new
thread and allow it to initialize (and print to console, before the
print can potentially interfere with other prints) before proceeding.
BUG=chromium:715011
BRANCH=None
TEST=Run 'make runtests', verify 'Console input initialized' is seen
before '--- Emulator initialized after reboot ---':
====== Emulator output ======
No flash storage found. Initializing to 0xff.
No RAM data found. Initializing to 0x00.
Console input initialized
--- Emulator initialized after reboot ---
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ieb622e9b7eea2d11d4a11a98bb503a44534f676c
Reviewed-on: https://chromium-review.googlesource.com/854989
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Cr50 should not automatically touch the EC reset when enabling the
USB-EC SPI bridge. Otherwise, this could interefere with ECs that might
have internal SPI flash and need to have their resets deasserted in
order to access the internal SPI flash.
This commits simply removes the assertion of EC reset when enabling the
USB-EC SPI bridge. The user or external scripts should control the
resets as necessary using servo or the cr50 console.
BUG=b:71548795,b:71557464
BRANCH=None
TEST=Flash meowth cr50. Verify that I can flash the EC using a
servo_v4.
TEST=Repeat above test with a servo_micro.
TEST=Repeat above test with a SuzyQable.
Change-Id: I114c34df43cf1e8ba622e75c3e6ecf517afc40a4
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/850865
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Current revision of nautilus boards will lose VBAT on power cycle and
therefore cannot successfully save the reset flag state.
Implement workaround that will allow boards to continue to work for
FAFT testing by indicating to the skylake chipset power code that it
could skip the PMIC reset when doing 'reboot ap-off'.
BUG=b:67062902
BRANCH=None
TEST=None
Change-Id: I078f6d62b2161c1b3322da15aba02efaca2010ba
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/855737
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Enable deep sleep on rk3399 devices and start using SYS_RST_L to track
the AP state.
We can only release this once the EC has the proper support. It needs to
assert SYS_RST_L in S5.
If we have an old EC and this change in the Cr50 firmware, Cr50 won't be
able to tell when the AP is off. I think this will just cause an
interrupt storm on the AP UART and might not go into regular sleep in
S5.
If the EC change gets released before Cr50, Cr50 won't go to sleep in
S5, because SYS_RST_L is a wake on low pin. Cr50 will immediately wake
up from the SYS_RST_L pin when it enters sleep.
BUG=b:35647982
BRANCH=cr50
TEST=run firmware_Cr50DeepSleepStress on Bob
Change-Id: Iaf46f46eb5963e9479bba40457253a6ccc91ad32
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/699295
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We have a requirement that this signal is asserted whenever cr50 is in
deep sleep. It is deasserted on resume. This change configures sys_rst_l
as wake on high before deep sleep, so cr50 doesn't wake up
immediately after entering deep sleep. This is consistent with the
behavior of plt_rst_l when it's used to track the AP state and enable
deep sleep.
This doesn't change anything right now, because no devices that use
sys_rst_l have deep sleep enabled.
BUG=b:35647982
BRANCH=cr50
TEST=none
Change-Id: Ie5c3a6bbf4d0a52c1f96a9b29ebd037104a8abc4
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/815335
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Currently only 'ccd password' command is processed using TPM vendor
command. More CCD commands are going to be processed the same way.
This patch refactors the code to make it easier to add more
subcommands.
BRANCH=cr50
BUG=b:62537474
TEST=verified that 'ccd password' still works both from crosh and CLI.
Change-Id: Id55da51d6edc5652591ad30160a4102b3026a186
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/854708
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We want CCD commands lock, open, password, and unlock (at least to
start with) to be available over both CLI and through crosh (i.e.
coming over /dev/tpm0).
Let's allocate a TPM vendor command for handling all CCD subcommands,
and move to this new framework the 'ccd password' command, which
already is available over vendor command.
BRANCH=cr50
BUG=b:62537474
TEST=verified that 'ccd password' still works both over Suzy-Q CLI and
using gsctool on the target.
Change-Id: I2d06230b762f47af7e580b188a587bc5678ca169
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/853280
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add a tweak to get faster flashing:
skip writing the empty trailing space at the end of the firmware image.
On the STM32H7x3, flashing 2MB of useless bytes over UART can be
really slow...
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=flash_ec --board=meowth_fp
Change-Id: Ie396ee7d5b5771e0f6249e38da37ef8329c84ae3
Reviewed-on: https://chromium-review.googlesource.com/856978
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
On some chips, the full erase operation can take really long:
e.g 13s for 2MB mass-erase on the STM32H7x3 family.
Add a new mechanism retrying the ACK detection rather than extending
the default timeout which would imply very slow behavior in other cases
(e.g. connection).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=flash_ec --board=meowth_fp
Change-Id: I428f56341c31c327debb9a3d2eba9b12c768ba86
Reviewed-on: https://chromium-review.googlesource.com/856976
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
flags are actually _not_ BATT_FLAG_*, but EC_BATT_FLAG_*. Clarify
that in the comment, and add a new EC_BATT_FLAG_INVALID flag to
indicate that some of the data may be invalid (dual-battery master
needs to know that to make appropriate charging/discharging
decision).
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=Flash hammer and wand, flags make sense.
Change-Id: I3c428c850020a29b3f452504b60b52946a04c503
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/859400
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Without this, the battery will discharge if we disallow battery
charging (e.g. calling charge_request with either voltage == 0 or
current == 0, either by policy, or when the battery is full).
Also update config.h to set the option whenever isl923x is used.
BRANCH=none
BUG=b:66575472
BUG=b:35585464
TEST=make buildall -j
Change-Id: Id5515d5ea82a393a3693a3da44cbdc2778296a95
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/856538
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
On ISL923x, PSYS output is always enabled when the AP is on
(provided CONFIG_CHARGER_PSYS is enabled).
We add support for charger_get_system_power function, reading PSYS
value, when CONFIG_CHARGER_PSYS_READ is defined. This will be used
by the charging algorithm on lux.
We also rename CONFIG_CMD_CHARGER_PSYS to CONFIG_CHARGER_PSYS_READ
as CONFIG_CHARGER_PSYS_READ provides both "psys" console command
and the new function. We also cleanup unneeded undefs in board
files.
Note that this does not implement the function on bd9995x, but this
could be done without too much effort.
BRANCH=none
BUG=b:71520677
TEST=On lux, without AC connected, check that "psys" output roughly
matches the output current from the battery.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: Ie1ce8e0ac103daacc5a08b8ccae604d1d83551b8
Reviewed-on: https://chromium-review.googlesource.com/848487
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
If a bios carries an EC image signed by a wrong key, EFS EC falls back
to the previous slot upon reboot. Vboot currently does not handle this
case and tries to update the EC with an incompatible image again.
When this happens, a user sees 'applying critical update' screen
repeatedly.
This patch adds EFS_VERIFYV host command. Vboot on AP calls it to check
whether the EC likes a newly updated image or not. If the verification
fails, it's considered as update failure and vboot displays 'broken'
screen.
BUG=b:71719323
BRANCH=none
TEST=Flash EC SPI with an image which has a different RO key. Boot DUT
and let it run software sync. EC-RO rejects the updated image and falls
back to the previous one. The update counter is incremented and vboot
shows the 'broken' screen, requesting recovery.
Change-Id: I8a107a376963baa146ff691c50d80018ec3e429c
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/858159
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This CL adds support for chip variant npcx7m6xb and npcx7m7w in the ecst
utility. It also fixed the coding style by replacing some inapproiate
tab characters with white space characters.
BRANCH=none
BUG=none
TEST=No build errors for make buildall.
TEST=Change CHIP_VARIANT to npcx7m7w/npcx7m6xb in
board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Check ec image can be
built and image header is correct.
Change-Id: I44bae48dcb4fa3bc8984184d8f43744e54bcf8e7
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/851935
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
`get_num_fans` tries to determine if fans are available according to
feature list, retrieved from an ec_command.
The ec_command today returns received output size on success, so to
we should not check the result by "rv == EC_SUCCESS".
Instead, we should check if rv returns a negative number, just like
the cmd_inventory.
BRANCH=none
BUG=b:71690953
TEST=(on fanless Eve) ectool pwmgetnumfans # see Fans=0
ectool pwmgetfanrpm # see empty output, $?=0
Change-Id: Id748b70cec0afb0715febbda8883cd5ed53f7e3d
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/853755
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This adds support for the KX022 and BMI160 sensors.
It also enables the motion_sense task so that the keyboard can be
disabled in tablet mode.
BUG=b:69379570,b:69379621
BRANCH=None
TEST=Build
Change-Id: I72cc8f86ddd8d466b4208ff583e93fd51da63c49
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/794525
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
SYNC motion sensor are use to count event.
It sends an event to the AP each time a GPIO goes low/high, the datum
contains a 16 bit counter.
The location indicates the source of the event, as Android sensor hal
will use this information (via sysfs location attribute) to link the
sensor with other subsystem.
BUG=b:67743747
BRANCH=none
TEST=Unit tests.
Change-Id: Ia808b25730ad4100efa216c6a86b7b090197c5a3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/848496
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Configure it as a fingerprint MCU.
Currently use ZerbleBarn as a proxy for it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=flash and run the image on ZerbleBarn,
do a finger image acquisition with the 'fptest' console command.
Change-Id: I6e060c2d1e950ec81092088e1793b186fc0a5fa0
Reviewed-on: https://chromium-review.googlesource.com/806169
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Add the driver for the new silicon used in STM32H7 SPI controller,
including its bad errata when used with DMA.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=on ZerbleBarn, do finger image acquisition on the SPI fingerprint
sensor.
Change-Id: Ieaf4a09e961d3e0ef78b58886c409a7dfb63aaf3
Reviewed-on: https://chromium-review.googlesource.com/836617
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Start adding support for the STM32H7 family of device and the first
available one the STM32H743.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=manual, run on stm32h743i-eval and zerblebarn boards
get a stable serial console.
Change-Id: I9ae10f0d843e5318451713c21ed22d455a23758c
Reviewed-on: https://chromium-review.googlesource.com/806168
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
The compiler marks data put into the TPM2_common.bss section as
PROGBITS, which the linker does not like. Changing the section name
prevents the marking and keeps linker happy.
BRANCH=cr50
BUG=chromium:799385
TEST=verified that local_state is still in where it belongs:
$ egrep '(local_state|__bss_libtpm2)' build/cr50/RW/ec.RW.smap
00010400 B __bss_libtpm2_start
00015d0c b local_state
00015d18 B __bss_libtpm2_end
Change-Id: I48f7d2cb08c7ccb2ef3b3159eaf4d66e2b8720b4
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/852793
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The gsctool utility sometimes is used in environments where path to
trunks_send is not set. As a result 'gsctool -t' invocations fail.
Let's make sure PATH includes /usr/sbin before trunsk_send is invoked.
BRANCH=none
BUG=none
TEST=verified that gsctool invocations in crosh started in a tab and
in a linux shell ran under user 'chronos' do not fail.
Change-Id: Ib8af365dc5707cfec19acda9aa0228d33eb4573f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/851266
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
wand will have a very different detection logic: moving this to
a separate file will make it easier and cleaner to implement.
BRANCH=none
BUG=b:67029560
TEST=make buildall -j
TEST=soraka: Base detection still works, power is cut in S5.
Change-Id: Ibc4ad0d9f5ad9a0df7834c712145035f7c62f335
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/851554
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
The battery gas gauge is configured properly, and we do not need
these hacks.
BRANCH=none
BUG=b:70816727
TEST=On soraka, check that we can recover from dead battery
TEST=On soraka, check that we can recover from battery cut-off
(both HW and SW)
TEST=Check that battery stops requesting power when over or under
set temperature (done by ODM/battery vendor, see bug)
Change-Id: I0b9d605632d86a3c39d07676d62374602ba068b4
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/835728
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
For partners and developers, it's usually better to have a single simple
instruction to invoke commands. Currently gsctool needs either -s (if
/dev/tpm is not locked) or -t (if trunksd is running) and partners have
to either try both commands (-s or -t) or read the error messages and
try to figure out which option to use.
For example, see the extra logic in CL:831787.
Instead of putting the check everywhere in scripting, it seems easier
and more convenient to have a simple switch - "--any (-a)" that
automatically selects between -s and -t.
BUG=b:70184153
TEST=gsctool -f -a; stop trunksd; gsctool -f -a
Change-Id: Ie1590b0b8fef882178465ceee64a7150eda6b0dd
Reviewed-on: https://chromium-review.googlesource.com/851612
Commit-Ready: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This adds functions required for the master in EC-EC communication,
requesting base battery static and dynamic information, and charger
control.
BRANCH=none
BUG=b:65526215
TEST=Flash lux and wand, EC-EC communication works.
Change-Id: I7a46ee3f5848d22c2c9bea7870cbd7e74141cf3d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/839201
Saves about 4K of flash space. Note that LTO has been enabled
on glados for a long time, so hopefully this is safe.
build/chell/RO/ec.RO.flat shrank by 4096 bytes: (106200 to 102104)
build/chell/RW/ec.RW.flat shrank by 4264 bytes: (105988 to 101724)
BRANCH=none
BUG=chromium:798914
TEST=Flash both chell and chell_pd, system boots to OS, keyboard
works, charging works.
Change-Id: Id97f2e73959ced16d6579f6c05f3ce4cd21f4062
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/848594
Reviewed-by: Randall Spangler <rspangler@chromium.org>
CONTROL1 bits can be modified from multiple tasks:
- charger_enable_otg_power (charger or pd task)
- charger_discharge_on_ac (host command or console)
- charger_enable/disable_psys (chipset task)
- print_amon_bmon (console)
Since we use I2C read, modify, then I2C write access pattern,
there is a small chance of races between these accesses:
let's protect them with a mutex.
Also, the current code sometimes uses charger_get_option/set_option
instead of manipulating CONTROL0 directly: fix those to regain
a bit of the extra code size caused by the mutex.
BRANCH=none
BUG=b:67029560
TEST=Flash lux, battery charges, amon works fine.
TEST=Flash elm, battery charges.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: If375d9922db53dd582582bfa44d6218fe0b416ec
Reviewed-on: https://chromium-review.googlesource.com/848486
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Boards needs to define GPIO_EC_COMM_PU, which needs to be driven
high during EC-EC transaction. This makes sure that the line does
not go low, even when the base goes away during the transaction.
BRANCH=none
BUG=b:68954760
TEST=EC-EC communication works with this change.
TEST=With signal analyzer, check that UART line is always kept
high while transaction is in progress.
Change-Id: Iad7b26a9a93b674aa4fff0bc3a72a13e6782515d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/845544
Reviewed-by: Randall Spangler <rspangler@chromium.org>
