Commit Graph

8094 Commits

Author SHA1 Message Date
Furquan Shaikh
c147530f10 intel_x86: Auto power-on after battery SOC is above minimum required
If power-up is inhibited by charger because of battery SOC, then check
for the conditions again on BATTERY_SOC_CHANGE. This allows the EC to
boot the AP up on connecting AC power and SOC going above the minimum
required.

BUG=b:65864825
BRANCH=None
TEST=Verified following on coral and soraka:
1. Discharge battery to ~0%
2. Connect AC power ==> Power-up is inhibited
3. When battery SOC reaches 1%. AP is not taken out of reset:
"[12.974428 Battery 1% / 8h:4 to full]
[12.980439 power-up still inhibited]"
4. When battery SOC reaches 2%, AP is taken out of reset:
"[9.230148 Battery 2% / 4h:5 to full]
[9.236122 Battery SOC ok to boot AP!]"

Change-Id: Ifa89f8929987d86c9e02530b663d563dbe25ed85
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/753294
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-28 17:56:29 -08:00
Furquan Shaikh
4815373754 cannonlake: Check for hard and soft off in chipset_force_shutdown
Similar to CL:774298, intention of chipset_force_shutdown is to power
off the AP by simulating power button press until it results in power
button override and shuts down AP. However, if AP is already in hard
or soft off conditions (i.e. G3, S5G3, G3S5 or S5) then AP is already
off, and simulating power button press results in
charge_prevent_power_on from incorrectly assuming that the power
button is pressed by user. Thus, check if the system is in soft or
hard off before shutting it down.

BUG=b:65864825
BRANCH=None
TEST=make -j buildall

Change-Id: I4b6d798af4618cbd4179f8700ebb2aa78021207e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791933
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-28 17:56:29 -08:00
Furquan Shaikh
7e2d3cd3a6 skylake: Check for hard and soft off in chipset_force_shutdown
Intention of chipset_force_shutdown is to power off the AP by
simulating power button press until it results in power button
override and shuts down AP. However, if AP is already in hard or soft
off conditions (i.e. G3, S5G3, G3S5 or S5) then AP is already off, and
simulating power button press results in charge_prevent_power_on from
incorrectly assuming that the power button is pressed by user. Thus,
check if the system is in soft or hard off before shutting it down.

BUG=b:65864825
BRANCH=None
TEST=Verified that apshutdown still works fine from EC console on
soraka.

Change-Id: Id892e5b2c8c1e4ce0bad95a70ea6a3ed547a7047
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/774298
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-28 15:44:22 -08:00
Furquan Shaikh
126a303c69 chipset: Introduce CHIPSET_STATE_ANY_SUSPEND
There are two different types of suspend states that are supported on
x86 platforms -- S3 and S0ix. When AP enters S3, the chipset state is
identified as CHIPSET_STATE_SUSPEND. On the other hand, when AP enters
S0ix, the chipset state is identified as CHIPSET_STATE_STANDBY. There
are several components within the EC e.g. charger state machine, usb
pd task, motion sense task that take actions based on the chipset
suspend state (and checked only for CHIPSET_STATE_SUSPEND until
now). In order to ensure that different EC components do not have to
worry about checking for all the different types of suspend states
that are supported, introduce a new combination
CHIPSET_STATE_ANY_SUSPEND which is a combination of
CHIPSET_STATE_SUSPEND(S3) and CHIPSET_STATE_STANDBY(S0ix).

BUG=b:69690699
BRANCH=None
TEST=make -j buildall. Ruben verified that with this change, EC power
consumption in S0ix drops from 7.85mW to 6.59mW on Soraka.

Change-Id: I599a0ea2fe2f39132764a6068fa77c3aea02affa
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/786919
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-28 15:44:19 -08:00
Daisuke Nojiri
443207913b charge_manager: Give dedicated chargers highest priority
This patch lowers the priorities of other chargers so that dedicated
chargers are given the highest priority.

Dedicated chargers are adapters shipped with the device and do nothing
but being the power source. Thus, when they're connected, it should be
always used even if other suppliers offer more power.

BUG=b:38321259
BRANCH=none
TEST=make runtests

Change-Id: Ida862eb31c7f9ede36cade99f53645196b6a3f70
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/762339
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-28 15:44:18 -08:00
Vadim Bendebury
84b20f9225 gsctool: add option to disable RMA mode
The --rma_auth command line option is being extended to treat the
auth_code of value of 'disable' as a user request to cancel CCD RMA
mode on the device.

BRANCH=none
BUG=b:68213540
TEST=verified that passing '-f disable' to gsctool causes CCD state on
     the Cr50 changed to 'Locked'

Change-Id: I8764e0207977a6290d3d10dc4678f98631be0360
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784354
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-11-28 15:44:16 -08:00
Vadim Bendebury
baff7ae621 cr50: ccd: add vendor command to disable RMA mode
The new vendor command takes the CCD state machine through necessary
transitions leaving it in the CCD locked state.

It succeeds only if user password is not set and CCD capabilities are
right, which is guaranteed to be the case after an RMA unlock.

BRANCH=cr50
BUG=b:68213540
TEST=tested using the modified gsctool utility.

Change-Id: Ic2cce34e74b1ff476841cfa1a99f50d6a947c315
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784352
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-11-28 15:44:16 -08:00
Furquan Shaikh
c5dfb7945c hostevents: Reclaim EC_HOST_EVENT_EXTENDED bit
Now that we have support for 64-bit events, there is no need to
reserve a bit in lower 32 bits for extended events.

BUG=b:69329196
BRANCH=None
TEST=make -j buildall

Change-Id: Ide02c4384c2b3ab4a63b028f126c48b73d6cd269
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791863
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-28 15:44:13 -08:00
Furquan Shaikh
c1654d300d host_event_commands: Fix off-by-one error
This CL fixes two issues:
1. Host events are 1-based. So, if event0 is being requested to be set
in host_event_set_bit, nothing needs to be done.
2. To check if event needs to be set in upper 32-bit, check if the
event # is >32 and not >=32. (This issue was identified by coverity ID
179990).

BUG=b:69329196
BRANCH=None
TEST=make -j buildall

Change-Id: I062b82bdd30da28f62556ab4907a0f3bbf6d8126
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/791862
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-28 15:44:13 -08:00
Daisuke Nojiri
26b4617c43 charge_manager: Add EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT
Usually, the max current and supply voltage of dedicated chargers
are not known to the EC.

This patch adds EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT, which
allows the host to change the max current and supply voltage of the
dedicated charge port.

BUG=b:64442692
BRANCH=none
TEST=make runtests && buildall. Boot Fizz and let coreboot set
the adapter current and voltage.

Change-Id: I29b3f5762f8b316ca363c23e230530cdf4ca207a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/769152
2017-11-28 10:22:27 -08:00
Philip Chen
675bdc2e2c Separate VBUS detection and measurement mechanisms
For now we guard charger-based VBUS voltage measurement
behind CONFIG_USB_PD_VBUS_DETECT_CHARGER.
But we should be able to measure VBUS voltage by charger
while detecting VBUS presence by other methods.

BUG=b:67991345
BRANCH=none
TEST=plug in guppy on Scarlet rev2, 'ectool usbpdpower' on console,
and see VBUS is measured as 4975mV

Change-Id: I94cada81159ea4b097001997e2444873ec2d8763
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/789910
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
2017-11-27 22:50:47 -08:00
Marco Chen
a2e2be193a OPT3001: Support MOTIONSENSE_CMD_SENSOR_[OFFSET|RANGE] for calibration.
1. The original driver of OPT3001
  a. didn't support to process the command of offset.
  b. implemented command of range to setter/getter of Range Number Field
     of chip.
But reffering to cros_ec_light_prox.c from linux kernel side, these two
commands are actually leveraged for in_illuminance_calib[bias|scale]
and these calibration factors should be applied into raw lux value read
from the chip.

2. Move ALS in Poppy / Soraka boards from ALS_TASK to MOTIONSENSE_TASK.

3. Mofify parameters of ALS in Reef board in order to adapt changes
here.

BUG=b:69236269
BRANCH=none
TEST=Manually test on the DUT.

Change-Id: Ic3b593feb3e4bc6da0bada6b5d614975f0cf2280
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/774341
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-26 05:21:39 -08:00
Chun-Ta Lin
f326fb05b5 hammer: enable large block reading on usb i2c passthru.
Originally, i2c passthru is limited to use I2C_XFER_SINGLE flag where
it can only read at most 255 bytes at a time.  For application that
requires larger i2c bus reading, we change the flag setting and the
command protocol.

TEST=old ./touchpad_updater still works (previous protocol)
TEST=new ./touchpad_updater can get more than 500 bytes per transaction
TEST=Debug message only print when -d assigned.
     ./touchpad_updater -d
TEST=Manually change #define CONFIG_USB_I2C_MAX_READ_COUNT (1024 - 6)
     to #define CONFIG_USB_I2C_MAX_READ_COUNT (1024 - 4) and trigger
     POWER_OF_TWO assertion.
BRANCH=none
BUG=b:35587174, b:63993891

Change-Id: Id75b11ea49ba89bab8e18af24d47219030c778c5
Signed-off-by: Chun-Ta Lin <itspeter@google.com>
Reviewed-on: https://chromium-review.googlesource.com/542716
Commit-Ready: Chun-ta Lin <itspeter@chromium.org>
Tested-by: Chun-ta Lin <itspeter@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2017-11-24 02:39:04 -08:00
Ruben Rodriguez Buchillon
bfa592f167 ec: reconfigure GPIO60 to be INPUT | PULL_UP for power savings
GPIO60 (PMIC_INT) is currently only configured for INPUT. Tests showed
that INPUT | PULL_UP has lower power consumption so reconfiguring it
here.

BUG=b:64503543
BRANCH=none
TEST=manual
(on chroot)
$ make BOARD=soraka -j
$ ./util/flash_ec --board soraka
(on DUT)
$ powerd_dbus_suspend
(on chroot)
$ dut-control -p $PORT pp3300_dsw_ec_ma -t 10 | grep @@
> NAME  COUNT  AVERAGE  STDDEV   MAX   MIN
> pp3300_dsw_ec_ma   5637     1.68    0.17  7.92  1.56

for comparison, without the change, the MIN is 2.00mA

Change-Id: I86407a1440765d040c39272480b185342597d52b
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/786720
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2017-11-23 04:39:15 -08:00
Randall Spangler
952189623d ec_commands: Add structs for host command protocol V4
This only adds the structs for V4 packets.  Host command support for
them is coming in a subsequent CL.  V3 packets will continue to be
supported for a while, until all sides support V4.

BUG=chromium:787159
BRANCH=none
TEST=make -j runtests

Change-Id: I7e188a063d8ed60c85f3b8359959c424e3ccd1d9
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/780452
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2017-11-22 22:54:46 -08:00
Furquan Shaikh
349c1bd11d poppy/soraka/nautilus: Do not enable V5A in deep sleep state
V5A was enabled in deep sleep state to allow wake from base in deep S3
state. Now that poppy and variants don't plan to use deep S3, this
change is no longer required.

BUG=b:69053636
BRANCH=None
TEST=Verified following:
> ectool i2cxfer 3 0x30 1 0x41
Read bytes: 00
> ectool i2cxfer 3 0x30 1 0x2a
Read bytes: 00

Change-Id: Ice8cabf5ecac3851400af5fef43821f596bc5224
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/786789
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2017-11-22 22:54:46 -08:00
Jongpil Jung
e6694c5c8e nautilus: remove revision related code.
nautilus doesn't have PS8751(A1,A2).

BUG=b:69389497
BRANCH=none
TEST=build/flash nautilus rev1, power on and boot ok.
check charging/discharging as AC connection.

Change-Id: I371fc90f6730715535036e7d748ce44fa586b737
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/778519
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
2017-11-22 22:54:45 -08:00
Furquan Shaikh
bff4bb7682 nautilus: Remove CONFIG_BUTTON_RECOVERY
Nautilus does not use buttons to trigger recovery. Remove
CONFIG_BUTTON_RECOVERY.

BUG=None
BRANCH=None
TEST=make -j buildall

Change-Id: Ic9bdbd60bebb511963439844d09d5260617c77ec
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784774
Reviewed-by: Philip Chen <philipchen@chromium.org>
2017-11-22 14:42:33 -08:00
Furquan Shaikh
b9f5caf932 nautilus: Get rid of board_has_working_reset_flags
board_has_working_reset_flags was added to poppy/soraka to work around
a hardware issue in early revisions where reset flags would be lost on
PMIC reset. This issue should not occur for nautilus. Hence, get rid
of the function.

BUG=None
BRANCH=None
TEST=make -j buildall

Change-Id: Ib281c17e476bbf52dce055718c7faf61eb6ff507
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784773
Reviewed-by: Philip Chen <philipchen@chromium.org>
2017-11-22 14:42:33 -08:00
Jongpil Jung
6834e2bfaf nautilus: remove base-related code.
BUG=b:69389497
BRANCH=none
TEST=build/flash on nautilus. Check boot.

Change-Id: I02677109a99f57e48a62355e82ca31c8445b6849
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/781261
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2017-11-22 11:39:53 -08:00
Jongpil Jung
47ecc094df nautilus: control power led
Control power LED.

BUG=b:69396982
BRANCH=none
TEST=build/flash nautilus rev1, power on and boot ok.
check LED as power state.
check LED with ectool.

Change-Id: I4961d1683f881697f508292bd116cb7df69caac3
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/773521
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2017-11-22 04:30:17 -08:00
Furquan Shaikh
689ace7c66 poppy/soraka: Add GPIO_SEL_1P8V flag for 1.8V pins
Jerry pointed out that certain GPIOs which are 1.8V are set as 3.3V in
gpio.inc. Fix these gpios by add GPIO_SEL_1P8V flag to the gpio
description:
GPIOD1/I2C3_SCL0
GPIOD0/I2C3_SDA0
GPIO36 ACCEL_GYRO_INT_L

BUG=b:69481600
BRANCH=None
TEST=make -j BOARD=soraka. Verified that screen rotation works in tablet mode.

Change-Id: Ifbc474846aff0760f0b183a9cfeef2790738ca79
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/780142
Reviewed-by: Jerry Parson <jwp@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2017-11-22 02:11:53 -08:00
Vadim Bendebury
88011d8ea5 gsctool: clean up error processing
The gsctool utility is inconsistent in using stdio channels when
reporting errors. All error messages should go into stderr.

Also, to avoid confusion, this patch makes options -s and -t mutually
exclusive.

BRANCH=none
BUG=b:68213540
TEST=verified that passing both -t and -s command line options causes
     an error.

Change-Id: Ieb50cf08314aa37594964ef4bbfa4a850741da2f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/784353
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-11-21 23:55:30 -08:00
Jongpil Jung
247d4b398c nautilus: enable touchpad,backlight and disable base.
clean up base enable/disable for nautilus.
enable touchpad and backlight.

BUG=b:69389497
BRANCH=none
TEST=build/flash nautilus rev1, power on and boot ok.
check lcd backlight. check touchpad with evtest.

Change-Id: I6e2ddc61737254f088de0867fbb02b09e1099718
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/773721
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-21 21:36:14 -08:00
Jongpil Jung
46c0695dca nautilus: remove als.
nautilus doesn't have als. So, we need to remove als code in ec firmware.

BUG=b:69389497
BRANCH=none
TEST=build/flash nautilus rev1, power on and boot ok.
check ec console log. There is no als initialization.

Change-Id: I99465fb59090c7d370cb4a28f3500159a6fcb77e
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/773764
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
2017-11-21 21:36:14 -08:00
Marius Schilder
1e855ebfcf g: speed up prime generation by ~40% (1024 bit).
We were using bn_modexp() to perform a simple modular square.
A bn_modexp_word() does this faster.

BRANCH=none
BUG=b:68167013
TEST=generate 128 primes from prng seed and verify they're same as before; tcg_test passes

Change-Id: I411a7d3fe2d68f93dc40bf74b941a637f9aa20ed
Reviewed-on: https://chromium-review.googlesource.com/778057
Commit-Ready: Marius Schilder <mschilder@chromium.org>
Tested-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2017-11-21 18:53:36 -08:00
Furquan Shaikh
c9cd870600 host_events: Bump up host events and masks to 64-bit
With the upcoming change to add a new command to get/set/clear host
events and masks, it seems to be the right time to bump up the host
events and masks to 64-bit. We are already out of available host
events. This change opens up at least 32 bits for new host events.

Old EC commands to operate on host events/masks will still deal with
lower 32-bits of the events/mask. On the other hand, the new command
being added will take care of the entire 64-bit events/masks. This
ensures that old BIOS and kernel versions can still work with the
newer EC versions.

BUG=b:69329196
BRANCH=None
TEST=make -j buildall. Verified:
1. hostevent set 0x4000 ==> Sets correct bit in host events
2. hostevent clear 0x4000 ==> Clears correct bit in host events
3. Kernel is able to query and read correct host event bits from
EC. Verified using evtest.
4. Coreboot is able to read correct wake reason from EC. Verified
using mosys eventlog list.

Change-Id: Idcb24ea364ac6c491efc2f8dd9e29a9df6149e07
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/770925
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2017-11-21 18:53:35 -08:00
Scott Collyer
0da531fae0 coral: Fix corner case for battery_present_timer_started flag
With the SMP and Celxpert batteries for Robo systems, following
battery cutoff, there is a race condition resulting from a failed
sb_read operation when the battery status is read. If this read fails,
then the flag battery_report_present is reset to 0. Since this flag
gets set in a hook task deferred callback, if the sb_read fails after
battery_report_present is set, but before batt_pres is set to BP_YES,
then the deferred call would not be restarted. This results in the
battery_is_present call returning BP_NO indefinitely.

To fix this condition, this CL ensures that
battery_report_present_timer_started is cleared for any case that
could result in BP_NO. This addressed both this corner case and makes
redundant a previous change that was put to handle the case where the
battery is disconnected and reconnected while the system remains
powered. The CL also adjusts the timer to 0.5 sec so that in the event
it has to be called twice, it doesn't exceed the previous 1 second
timer and delay boot time even longer.

BUG=b:69151530
BRANCH=coral
TEST=With the DUT powered, removed and reconnected the
battery. Ensured that the battery again reports present.
Bitland also verified that with this CL they can no longer reproduce
the issue.

For the corner case, had additional debug console prints.
(Note this is with 1 second timer)
The deferred call is started.
[0.156135 battery timer hook call]
This shows where the sb_read error happens in batt_init()
[1.085627 Battery FET: reg 0x0018 mask 0x0010 disc 0x0000]
[1.092251 battery: pres 0, prev_pres 0, cutoff 0, init 1, rep 0]
[1.160969 battery will now report present]
This shows where the batt_report present gets cleared
[1.184993 ******** batt_report_present 1 -> 0 *****]
[1.185840 Battery read status failed]
[1.186540 report = 0, batt_init 1->0: stat = 0x200c6bea 1 get 1]
[1.187544 battery: pres 0, prev_pres 0, cutoff 0, init 0, rep 0]
[1.193796 Battery read status failed]
[1.194886 battery: pres 0, prev_pres 0, cutoff 0, init 0, rep 0]
batt_init() no longer returns 0, so deferred call is restarted
[1.290559 Battery FET: reg 0x0018 mask 0x0010 disc 0x0000]
[1.292942 battery timer hook call]
battery reports present now
[2.293436 battery will now report present]

Change-Id: I89d69cf133365affc4cc538328daeaaf9ac05ed9
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/773623
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
(cherry picked from commit 535080115d20dc223dab6288c5fea02da67c8e9c)
Reviewed-on: https://chromium-review.googlesource.com/782599
Commit-Ready: Scott Collyer <scollyer@chromium.org>
2017-11-21 15:58:42 -08:00
Jongpil Jung
267320bd47 Nautilus: clean up thermal sensors.
Nautilus doesn't have systherm0 and systherm3.
So, need to remove device index.

BUG=b:69389497
BRANCH=none
TEST=build/flash nautilus rev1, power on and boot ok.
check ectool tempsinfo all and ectool temps all.

Change-Id: I1ebebf2fb19ab91f63cf7e29605b8e6fd0f86178
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/773940
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
2017-11-21 04:25:07 -08:00
Jongpil Jung
6cb4469a84 nautilus: clean up code.
remove base related code.
remove anx74xx related code.
Update GPIO PIN
 - unused PP3300_DX_SENSOR
 - unused EC_HAVEN_RESET_ODL
 - correct PP1800_DX_SENSOR and LTE.

BUG=b:69389497
BRANCH=none
TEST=build/flash nautilus rev1, power on and boot ok.

Change-Id: I27fe5010bc082d4db941955d7ff49f5ae336901a
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/773320
Commit-Ready: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
2017-11-20 23:25:48 -08:00
Nicolas Boichat
cd1f377f16 usb_i2c: Remove usb_i2c_board_enable/disable
These functions are not used by usb_i2c.c on chip/stm32, let's
move them to board/cr50 which is the only place where they are
used.

BRANCH=none
BUG=None
TEST=make buildall -j

Change-Id: I8c1b292838b8dbee9a9001add9332e0add80c342
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/778749
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-11-20 23:25:45 -08:00
Martin Roth
b38792b78b util: Remove duplicate 'const' in export_taskinfo.c
This is causing an error in the latest coreboot toolchain:
util/export_taskinfo.c:33:30: error: duplicate 'const' declaration
specifier [-Werror=duplicate-decl-specifier]

BUG=None
TEST=Build now passes with latest coreboot toolchain and cros
Ztoolchain
BRANCH=None

Change-Id: I069d08128e264310d25a09ada2276f92796294b7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/679939
Commit-Ready: Martin Roth <martinroth@chromium.org>
Tested-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
2017-11-20 15:08:44 -08:00
Furquan Shaikh
d90300b6e5 poppy/soraka: Fix battery_is_present detection
It was recently identified that when we do a software based battery
cutoff and leave the system in cutoff state for > 25-30 seconds, then
both FG and battery enter shutdown/ship mode. In order to get the
battery out of this state, charger needs to provide VBAT >
Vstartup. However, with the current implementation of
battery_is_present, if EC is unable to talk to the battery i.e. i2c
commands to read battery status fails, then battery_is_present returns
BP_NO indicating that the battery is not present. This results in
charger state machine setting 0V and 0A to the battery, thus causing
the BGATE to be switched off.

In order to wake the battery from such condition, it is necessary to
provide pre-charge current and minimum voltage to ensure that BGATE is
switched on and VBAT > Vstartup is provided.

This change updates the battery_is_present algorithm to:
1. Check if battery is physically present. If not, return BP_NO.
2. If battery is present now and was present before when we checked,
then return BP_YES.
3. If battery just changed status to BP_YES, then check its disconnect
status. If EC is unable to read disconnect status, then return
BP_NOT_SURE. This allows the charger state machine to provide
precharge current and minimum voltage.
4. If EC is able to read disconnect status, try reviving it if
necessary.
5. Return BP_NO if battery is still disconnected or is cutoff or not
initialized.
6. Else return BP_YES.

BUG=b:69329874
BRANCH=None
TEST=Factory verified following:
1. Recovery from software based cutoff : Pass 10/10
2. Recovery from hardware based cutoff : Pass 10/10
3. Recovery from hibernate : Pass 10/10
4. Recovery from critical battery condition : Pass 10/10
5. Boot-up in case of no battery : Pass 10/10

Change-Id: I248705f87469a8d6604da1b1919492766499dd73
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/776024
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
2017-11-20 12:21:15 -08:00
Nicolas Boichat
4cb524de67 touchpad_elan: Rename task/interrupts functions
Change the names to generic touchpad_* functions, instead of
vendor-specific names. Makes it a little easier to add drivers
for other touchpads.

Also fix console_channel.inc to add the channel whenever any
touchpad is used.

BRANCH=none
BUG=b:68934906
TEST=make buildall -j

Change-Id: I6d268db5ebd53db272fb2ee7bbf06bbe80845734
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/778750
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
2017-11-20 04:53:20 -08:00
Rachel Nancollas
3b80b4e827 meowth: zoombini: Removed 5V enable pins.
Not needed since we're using the SN5S330.

BUG=b:69140019
BRANCH=none
TEST=make BOARD=meowth and BOARD=zoombini
runs with no errors

Change-Id: Id8fa17e1e20ac805405fc6e48e481ceade1a1981
Signed-off-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-on: https://chromium-review.googlesource.com/777823
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
2017-11-17 22:34:33 -08:00
Aseda Aboagye
34a97f50d5 buttons: Make buttons[] common.
Nearly every board had a buttons array defined in which its contents had
the standard volume buttons.  This commit creates a single common
buttons array that can contain the standard volume buttons and recovery
buttons.  If a board has volume up and down buttons, they can simply
define CONFIG_VOLUME_BUTTONS and it will populate the buttons array with
the standard definition.  The buttons are active low and have a 30 ms
debounce period.  Similiarly, if a board has a dedicated recovery
button, defining CONFIG_DEDICATED_RECOVERY_BUTTON will also populate the
buttons array with a recovery button.

BUG=chromium:783371
BRANCH=None
TEST=make -j buildall.
TEST=Flash a device with CONFIG_VOLUME_BUTTONS, verify pressing volume
buttons still work.

Change-Id: Ie5d63670ca4c6b146ec8ffb64d40ea9ce437b913
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/773794
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-17 20:18:38 -08:00
Gwendal Grignou
f587852570 motion_sense: Put set_range in common code
At the end of the sensor initialization, all _init sensor routines set
the range to the default value from board.c file.
Put all the code in a single place, move it from sensor_common.c to
motion_sense.c.

BUG=none
BRANCH=none
TEST=compile

Change-Id: If89cf27c6438e0f215c193d68a480e027110174c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767610
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-17 20:18:30 -08:00
Furquan Shaikh
ab2ce0a0ef gru: Make more code space by disabling configs
Disable CMD_IDLE_STATS and USB_PD_LOGGING for gru in order to make
more code space for upcoming 64-bit host event support

BUG=b:69329196
BRANCH=None
TEST=make -j BOARD=gru

Change-Id: I5fca66d13224e077b157b0768ba0264948ab6a0d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/775876
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-17 04:02:01 -08:00
Aseda Aboagye
b0857952ec meowth: Enable MKBP support for events.
Button and switch events will be reported using MKBP.

BUG=b:6914039
BRANCH=None
TEST=make -j buildall

Change-Id: Ieff75fa563ed91c2d33b18caf8942038ab7100bd
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/775477
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-17 02:00:27 -08:00
Aseda Aboagye
14b985ff9f meowth: Add temp sensor ADC channels.
Additionally, meowth has GPIOs for sleep signals, therefore remove the
"ifndef" for eSPI VW.

BUG=b:69138817
BRANCH=None
TEST=make -j buildall

Change-Id: Ib78a8c5ff8037022adcaf690157836fd2db1ef0d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/775080
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-17 02:00:26 -08:00
Gwendal Grignou
2590ce9538 common: Add software CTZ implementation when needeed
CTZ - Count Trailing Zero - is not implemented in hardware on cortex0 or
nds32.

Used in ST sensor drivers.

BUG=none
BRANCH=none
TEST=compile

Change-Id: I2d62fd60f05169189b24ba2a3308bec69ed9de9c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767609
Commit-Ready: Ely Vazquez <nadia198877@gmail.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 23:32:11 -08:00
Nick Sanders
26090a142b servo: add usb_console to chroot
add usb_console, console.py to chroot install.
This tool allows directly accessing the usb
console of servo v4, servo micro, cr50, etc.

BUG=b:69016431
BRANCH=None
TEST=usb_console -d 18d1:501b

Change-Id: If9d5d49cf31d785ea9a7cec0a4eeeb34abae9cd1
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/773400
2017-11-16 21:07:40 -08:00
Nick Sanders
80ef3f073e servo_v4: disable USB3 interface
This change switches the SS lines off in the main USB mux.
There has been some general flakyness regarding USB3 peripherals
and this change might address it.

BUG=chromium:718075
BRANCH=None
TEST=lsusb -t indicates 5000M before, 480M after.

Change-Id: Id201fb20dc6489c4a071cb1c9c0624d7aa54652d
Reviewed-on: https://chromium-review.googlesource.com/509130
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 21:07:39 -08:00
Aseda Aboagye
20f85990c4 zoombini: meowth: Enable Vboot hash.
The hash calculation is needed for EC software sync.

BUG=None
BRANCH=None
TEST=`make -j buildall`
TEST=Flash zoombini, verify that hash is being calculated.

Change-Id: Iddc65d5c0b04fa403b2fd5ace0096b029d5a6062
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/772913
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 21:07:37 -08:00
Aseda Aboagye
f2b87f77d3 meowth: Toggle PP1800_U on startup/shutdown.
The enable for the PP1800_U rail needs to follow our transitions from
S5->S3 and from S3->S5.

BUG=b:69137449
BRANCH=None
TEST=make -j buildall

Change-Id: I2466f560b096eb0ad48d9c355de56d7aa775d9cc
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/772912
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 21:07:37 -08:00
Aseda Aboagye
2fa3e47d9c meowth: Add battery pack information.
BUG=b:69138843
BRANCH=None
TEST=make -j buildall.

Change-Id: Ia3aa76e03c7551dc34041631e8f8d1b16c1771e3
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/772911
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 21:07:37 -08:00
Aseda Aboagye
fc4a6f13b2 flash_ec: Add support for meowth.
BUG=None
BRANCH=None
TEST=None

Change-Id: Ib0c6b029c608ac361ed661249138589c99ea68b6
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/772910
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 21:07:36 -08:00
Furquan Shaikh
d1aba367b7 jerry: Use HOSTCMD_ALIGNED instead of GPIO_SHORTNAMES
This is required to allow bumping up of host events to 64-bit by making
space in the rodata. CL 770923 had initially used GPIO_SHORTNAMES, but
HOSTCMD_ALIGNED seems to be a better option.

BUG=b:69329196
BRANCH=None
TEST=make -j buildall

Change-Id: I63699f9cec244925c031d81f50889851c6da8b5c
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/771931
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 18:45:38 -08:00
Aseda Aboagye
fe02a5658b meowth: zoombini: Annotate ifdefs.
This commit just adds comments to the ifdefs introduced for
BOARD_ZOOMBINI.

BUG=None
BRANCH=None
TEST=make -j buildall

Change-Id: I036d18bc5b1fb4ebbf0943e630e4931c03b60aa5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/772909
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
2017-11-16 13:52:03 -08:00
Vadim Bendebury
d53185fd74 tpm: do not prevent reading registers during pending reset
The host should be able to retrieve proper TPM status and ID registers
while TPM reset is pending.

BRANCH=cr50
BUG=b:68012381
TEST=after appropriate fixes in coreboot the
     firmware_Cr50ClearTPMOwner autotest does not fail any more

Change-Id: I245656ccb1c05e46715deb18bd5f8985c4197c52
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/775281
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
2017-11-16 18:43:32 +00:00