Add commands to send PD packets and to tweak individual parameters (TX
clock frequency, RX detection threshold, resistors on CCx).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28337
TEST=verify that the PD sniffing is still working by dumping traffic
between Zinger and Samus.
Connect Twinkie to Zinger, set Rd by using "tw res NONE RD" and see VBUS
going to 5V (reading it using "ina 0").
Send a BIST mode 2 request using the following command :
tw send 2 0x1043 50000000
and see the other end starting sending BIST.
Change-Id: I3c8ddf858435ac1c17a43f59351bbaa69603a209
Reviewed-on: https://chromium-review.googlesource.com/227778
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Force enabling STOP mode when we have a power contract etablished but
the sink is consuming a low current (<500mA).
As a side effect, when the STOP mode is on, the fast OCP is no longer
reacting fast because the analog watchdog ADC conversion will only
happen on the next wake-up (dozens of milliseconds).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=none
TEST=run on Zinger with the UART RX used as debug GPIO to record STOP
mode entry/exit.
Change-Id: If78b2651862782cee45cfcdb22425b94f1eee678
Reviewed-on: https://chromium-review.googlesource.com/230341
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Extend the Zinger runtime to take into account the disable_sleep()
issued by the USB protocol stack and avoid going into deep-sleep while
connected.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=none
TEST=connect Zinger to a PD power sink (Twinkie) and monitor the stop
mode entry/exit on a GPIO.
Change-Id: I04e35fdd65f3be3da7a4304dc1a92e6268930888
Reviewed-on: https://chromium-review.googlesource.com/230340
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
For samus, use learn mode on BQ24773 to avoid the soft start that
causes backboosting on some boards.
BUG=chrome-os-partner:33644
BRANCH=samus
TEST=tested in EE lab on a board that was backboosting reliable.
this fixes backboosting at 5V, and also on 20V to 5V transitions.
Change-Id: I97c52a55ba07662d444e67bfbc9ca488b530f423
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229282
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Fix task_wait_event() so that it only wakes when an event is received
or on timeout. Currently it wakes up on any interrupt, which can cause
subtle timing issues with PD communication.
BUG=none
BRANCH=samus
TEST=load onto samus, see it negotiate for 20V a few times
Change-Id: Ia1268a1ac902433433949269d779ef11403eeae3
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226811
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
With this change we can use power event to configure sensors
and trigger motion detection in suspend.
BUG=chrome-os-partner:31071
BRANCH=ToT
TEST=Check power states. Check power up messages and commands are
present at the console.
Message at boot:
[0.007142 hash start 0x00010000 0x000096dd]
[0.007293 Inits done]
[0.007506 power state 2 = S3, in 0x0000]
[0.007765 power state 3 = S0, in 0x0000]
[0.007908 event set 0x00002000]
[0.008021 hostcmd init 0x2000]
[0.146870 hash done
f87d7824b439db923d270df016af5aabec51b73505b7c4faa6e40c16b12dd392]
Change-Id: I9c56fe5203506462f0820bbc8a5fe4528f6805ac
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226881
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
MOTIONSENSE_CMD_DUMP is deprecated, replaced with MOTIONSENSE_CMD_GET_DATA
Also use vector_3_t instead of x,y,z
ectool motionsense commands only work with newer firmware, to
handle a dynamic number of sensors.
- The host sends the number of sensor it has allocated space for.
- If 0, the EC just sends the number of sensors available
- Otherwise returns sensor information up to the limit imposed by the host.
Remove MOTIONSENSE_GET_STATUS: not needed. It is only useful for LPC,
to guarantee atomicity of the data.
Remove MOTIONSENSE_GET_DATA: not needed since we increase the version
number of MOTIONSENSE command.
BUG=chrome-os-partner:31071,chromium:430792
BRANCH=ToT
TEST=Compile. On a firmware that support the new command:
/usr/sbin/ectool --name=cros_sh motionsense
Motion sensing active
Sensor 0: 92 15 1030
Sensor 1: -94 -63 718
/usr/sbin/ectool --name=cros_sh motionsense active
0
On a machine with older firmware (samus), check these
functions are not working anymore.
Change-Id: I64b62afff96670fb93457760d43d4e64e26e029f
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226880
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Factory test process need lid switch no function or keep lid opened
BUG=chrome-os-partner:33304
BRANCH=paine,yuna
TEST=Run command "ectool forcelidopen 1" and "reboot". Then lid close
quickly, the system boot as lid opened.
Deault value or run command "ectool forcelidopen 0" make the device normal.
Change-Id: I94527b7ef7f9efe779c6b86f3eab651f99af6000
Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/230180
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-by: Bowgo Tsai <bowgotsai@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Don't charge from dual-role capable ports, unless an override is set to
force charge. Also, if an override is set to charge from a dual-role
capable port and a dedicated charger is attached, remove the override.
BUG=chrome-os-partner:32003
TEST=Pass unit tests
BRANCH=Samus
Change-Id: I4e81e39a9f6ba325fa8a5e8f0d77fd5bfc7a672c
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229465
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When ec_command fails because of transport issue,
it should returns an error between -1 and -EECRESULT.
If the command fails because of the EC, the error should be less
than -EECRESULT.
Unify all transports to return the error in the same manner.
BRANCH=ToT
BUG=None
TEST=Samus: Check that unsupported command fails with the correct error
number over dev transport.
Qwarks: Check the same command with a 3.10 kernel (no dev transport,
just LPC) fails with the same error code.
Change-Id: I2e43d0cb003d75318b0edd3745e534c700d7d7d8
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228295
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The minor revision was accidentally set back to 0 in CL:229622. Restoring
back to 1.
BUG=none
BRANCH=samus
TEST=load onto zinger, make sure minor revision is set to 1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: Ia934e4a6f1674f666defe9e4337dee45cd7ab7bd
Reviewed-on: https://chromium-review.googlesource.com/229985
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add a Google Firmware Update alternate mode to zinger. This mode must
be entered in order to allow the unstructured VDMs that we use for
sending a new firmware.
BUG=chrome-os-partner:33754
BRANCH=samus
TEST=load on samus and zinger. see that "GFU" is printed on zinger console
to represent that it entered GFU mode. use twinkie to see that samus
sent discover identity, discover svids, discover modes, enter mode, and
then read info. See on samus pd console that we received result of read
info. from samus pd console with zinger attached:
> pe 1 dump
IDENT:
[ID Header] 2c0018d1 :: AMA, VID:18d1
[Cert Stat] 00000000
[2] 50100001 [3] 00000003 [4] 52136b91 [5] 0401137d
SVID[0]: 18d1 MODES: [1] 00000000
MODE[1]: svid:18d1 caps:00000000
Also, use a samus with cros_pd_update running in kernel, and see that zinger
auto-updates when plugged in. Performed 10 updates with no failures.
Change-Id: I8d4d38e4a9f649fe0889f688f262630ef55106ee
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229622
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Lower the minimum input current limit on samus by 64mA to 448mA
to have the ability to limit input current to something below
500mA.
BUG=none
BRANCH=samus
TEST=load onto samus, and use charger console command to verify
input current limit is 448mA.
Change-Id: I05bcacce707faddd3addee50356d85281466e146
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229281
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Allow to use larger RSA keys by setting CONFIG_RSA_KEY_SIZE to 4096 or
8192 rather than using the default 2048-bit size.
It's mainly for benchmarking purpose right now as we don't have the RAM
to store the 3x key size buffer and the flash space for the public key
structure.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=none
TEST=build Zinger with CONFIG_RSA_KEY_SIZE equals to 4096 and run it.
Change-Id: I9839121bf158d0a30dde1e48d875f345191bfec2
Reviewed-on: https://chromium-review.googlesource.com/228925
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Allow policy layer to request a PR or DR swap upon formation of
a power contract. Zinger always asks for a data swap so it can
be a UFP, and Samus asks for a data swap only if it is a UFP to
become a DFP.
BUG=chrome-os-partner:33754, chrome-os-partner:31195
BRANCH=samus
TEST=load onto samus and zinger and make sure they swap roles
upon connect with no collisions
Change-Id: I275c9669549c26f25c58f80845daad8edab11313
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229327
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Changed actions to take on PD disconnect to do all the same actions
for source and sink disconnect. With power and data swap commands, there
are potential bugs with state variables not getting cleared properly
when separated source and sink disconnects are seperated out. Also
changed code to only take those actions on PD disconnect whereas before
it was also happening on dual role toggle.
BUG=none
BRANCH=samus
TEST=load onto samus, make sure it takes disconnect actions on when
zinger is unplugged.
Change-Id: I455f4970517477d4ffd38059110521b228282763
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229621
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
An earlier commit posted fan-change info to the console. Turns
out it's a little too annoying, and disabling it with the "chan"
command would also hide messages related to thermal shutdown.
This just removes those updates completely.
BUG=chrome-os-partner:33775
BRANCH=ToT,samus
TEST=make buildall -j
Watch the EC console. The messages no longer appear.
Change-Id: Ie8c48d7ce493a25bf0afbd26d280a87dda882c1a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229623
Reviewed-by: Randall Spangler <rspangler@chromium.org>
It's really annoying to have to type two different commands. If I
want to read a location and then write it and then read it back
(which often happens when poking at hardware), then this:
rw 0x40570008
rw 0x40570008 14
rw 0x40570008
is much easier to enter than this:
rw 0x40570008
ww 0x40570008 14
rw 0x40570008
The "ww" command is still there, if you're really attached to it.
BUG=none
BRANCH=none
TEST=manual
Tried the example above. It worked.
Change-Id: I2302ed60df3dd3ec2224afa7c32d997bd2468ec1
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229660
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The pull-up on USB D+ is by default enabled, as needed by DFU mode. In
normal operation, we should disable it unless case-closed debugging is
enabled.
BRANCH=None
BUG=chrome-os-partner:33544
TEST=Build ryu
Change-Id: I18d216d8fff61640e4fbc3ce259209b3f149abf1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229797
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
If we need to debug host commands, we can always turn on hcdebug and see
the content of host command packets. Let's remove the console messages
to save flash space. This reduces the code size by ~450 bytes.
BUG=chrome-os-partner:32203
TEST=update Zinger with Samus
BRANCH=None
Change-Id: Id72e813dd1217239edcef02f45dfebc06597d6c7
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220510
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Add support for DR_swap, data role swap command.
BUG=chrome-os-partner:33686, chrome-os-partner:28343
BRANCH=samus
TEST=test with samus and zinger. use "pd 1 swap data" command
and verify data role swaps by using twinkie and "pd 1 state".
Change-Id: I410309199cdeecb26847a6bf217523fdfe688cba
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229192
At 48Mhz, due to the flash accessing requiring 1 Wait-State, we need to
enable the flash prefetch buffer to get the full CPU execution speed.
The bit used to enable flash prefetching was fixed :
crosreview.com/219921 , but the change was overriden by the CL enabling
the STOP mode : crosreview.com/219933
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:28335
TEST=plug Zinger into a PD power sink, with the Twinkie protocol
analyzer observe how long Zinger takes to send back GoodCRC after the
Request and SinkCap messages. With the patch, the average delay is going
from 160us to 50us.
Change-Id: I9de1bc10e14485919046c841eea16de3c3b3c800
Reviewed-on: https://chromium-review.googlesource.com/229671
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Implement the API expected by common/timer.c
BUG=chrome-os-partner:33699
BRANCH=none
TEST=manual
Run the "gettime" and "timerinfo" and "taskinfo" and "waitms"
commands. Compare the elapsed time with the real world. They seem
to match.
Change-Id: Ie5acae76780ee09e7dfb6cc0282de25f8063e96f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229642
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Disable most of the pd console command to save space. The command
can still be used with subcommands "state" and "dump" to get state
information and change debug level.
BUG=none
BRANCH=none
TEST=make buildall with CONFIG_CMD_PD defined and undefined. Also
undefined the config option and loaded onto samus and verified that
the pd 0 state command still works.
Change-Id: Ie41bad53122a1e2a9ef4bad6423b9cdc85f53742
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229420
Reviewed-by: Vic Yang <victoryang@chromium.org>
Added hibernate wakeup pin(EC_WAKE) that covers both AC_PRESENT and LID_OPEN. It pulses a
rising edge when either of them have a rising edge.
The power button was also inverted to handle hibernation better, now it's low
except when pressed it temporarly goes high.
BRANCH=None
BUG=chrome-os-partner:33269 chrome-os-partner:32782
TEST=make BOARD=jerry
Try hibernating, all wakeup sources should work, it shouldn't stay hibernated.
All signals(AC, lid, power button) should work equally well as in pinky.
Change-Id: I894135bdfd5600919296f7510dc9cd1acd567ddc
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228763
This enables forwarding of the local PD/EC console
over debug USB. It gates the console functionality
based on the CCD mode that is set.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable partial CCD mode on ryu and verify that it is
enumerated by the host correctly, but doesn't respond
to console input, and doesn't generate output.
Enable full CCD mode on ryu and verify that it is
enumerated and that the console works as expected.
Verify that the console still works by default on the
discovery-stm32f072 board.
Change-Id: I0325ce9689486c41387d6075330be1d7d42f1d42
Reviewed-on: https://chromium-review.googlesource.com/229342
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
This provides a framework for additional work. It
exposes an API (ccd_set_mode) that can be used by the
PD code to enable Case Closed Debug. Enabling CCD will
result in the USB 2.0 lines on Ryu (proto 2) to be
disconnected from the AP and for the USB peripheral to
be enabled and connected to the host. The result is
an enumerated device with no interfaces.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable CCD ryu_p2 and verify that it is enumerated
by the host correctly. This requires a reworked
Ryu (proto 2 with pullup).
Change-Id: I1fbecdd5f94a61519cfc18c5e087892c6bd77fde
Reviewed-on: https://chromium-review.googlesource.com/229139
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Previously enabling USB would automatically (using an
init hook) initialize the USB peripheral. This would
take over the GPIO lines assigned to the USB module.
This is not OK on Ryu for Case Closed Debug because it
interferes with the AP's access to the USB 2.0 lines
even when not in Case Close Debug mode.
This change adds a configuration option to inhibit this
default initialization of the USB peripheral. It also
renames the existing CONFIG_USB_INHIBIT to
CONFIG_USB_INHIBIT_CONNECT now that there are two
possible inhibitions.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: I6734357131b4356e3d4164349d6c74deac196ce5
Reviewed-on: https://chromium-review.googlesource.com/229138
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Allow a charge port to be selected as the override port, which means it
will always be selected as the charge port, if any charge supplier is
available.
BUG=chrome-os-partner:32003
TEST=Attach PD charger and BC1.2 charger. Verify that active charge port
switches to BC1.2 after running `chargeoverride [port]` from console.
Also, pass unit tests.
BRANCH=Samus
Change-Id: Ia1b48ca89641842d51be7eed3b92d36d3eedc9ef
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227730
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When a PD charger is detected, gets its max charge capability, but
initially negotiate for its minimum charge mode. If we later determine
that the port will be the one active charge port, re-negotiate for the
max charge capability.
BUG=chrome-os-partner:32003
TEST=Manual on Samus. Plug in Zinger, verify that current limit is
initially set to 500 mA, then switches to 3000 mA shortly after. Plug in
two Zingers, verify that one provides 3000 mA current while the other
negotiates to 500 mA. Verify that the 500 mA charger bumps up to a high
current once becoming active.
BRANCH=Samus
Change-Id: Ifa562b72d763642fc8bd62bc7f5aaa4eda1ef950
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/225922
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This simply renames ryu to ryu_p1, and ryu_p2 to ryu. 'ryu_p1' will be
kept for a while and will be decommisioned when most developers make
switch to the new boards.
BRANCH=None
BUG=chrome-os-partner:33583
TEST=Build ryu and boot on P2 board.
Change-Id: Ief61c64c6aefdaeae76ac7b86e0ea28131810aa1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229291
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This can save 80mW in S3 when the lid is open.
BUG=chrome-os-partner:33057
BRANCH=samus
TEST=boot on samus, go to suspend with powerd_dbus_suspend and ensure
that the touchscreen is in reset.
Change-Id: I63c24ad5a8f8cb389ee0d6139edbbb46dec5423b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229106
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Previously the usb driver used #ifs to select a mechanism to
enable and disable the DP pullup. This doesn't scale well,
especially when the knowledge of how to do this is not known
to the chip specific code, but instead is board specific (as
it is with the STM32F373).
This change uses the build systems ability to build chip family
specific files per build to select the appropriate behavior.
And on the STM32F3 family of parts it just calls out to a board
specific pair of connect/disconnect functions.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: I976e02fbc7acbb0f85817d7295b26ee9ecab0711
Reviewed-on: https://chromium-review.googlesource.com/229040
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Previously the USB RAM size was off by a factor of two
for chips that required 32-bit alignment of accesses,
even though the underlying memory was 16-bits in size.
This change adds an additional configuration for the
access size (it still assumes that the underlying memory
is 16-bits in size) and uses that to adjust the USB_RAM
memory section in the linker scripts.
This change also removes the default values for the USB
RAM from stm32/config_chip.h because they mask issues
when new chips are added. It is better for a new chip
to fail to compile until these values are provided.
Finally, this change introduces a common USB API header
so that common code doesn't need to include the STM32
specific header.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Enable console on ryu_p2 and discovery-stm32f072 board
Verify that it works on both
Change-Id: Id118627f53e9e8ff1bd09fb51f1f9634ff495d19
Reviewed-on: https://chromium-review.googlesource.com/228833
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
The next board revision will reset the ID to zero, so we
can no longer rely on the old versions for workarounds.
However those boards no longer work without modification due
to GPIO changes anyway so we can just remove the old code
and since there are no more workarounds left remove the board
version enum since it is no longer used.
BUG=chrome-os-partner:32895
BRANCH=samus
TEST=build and boot on samus EVT2
Change-Id: I3f76cda6b533fe195a743baa7981a0e67d371313
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229003
Reviewed-by: Alec Berg <alecaberg@chromium.org>
During the discovery identity phase of type-C devices that support it
there is some info that could be useful to kernel & userland for
policy decisions. CL starts by passing up the vid, pid & product type
(ptype) of the discover identity VDO.
BRANCH=samus
BUG=chrome-os-partner:32650
TEST=manual,
From host, w/ hoho in port 1
ectool --name=cros_pd infopddev 1
Port:1 Device:4 Hash: 0x57b1e4e0 0x7204075f 0x65c0fa72 0xdcca15ed 0xf3231237
Port:1 ptype:6 vid:0x18d1 pid:0x5010
Change-Id: Ie05d191149ada0ec860b713d780b0345eab3a647
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226899
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Once a mode is entered object position (OPOS ... AKA alternate mode) field in
the VDM header should always track that mode.
CL fixes DP status & config messages which did not add the correct OPOS. In
fixing I mapped to the UFPs function pd_alt_mode which for the DFP did require
the addition of port parameter. Finally I cleaned up code to use this function
throughout common policy layer where previously I'd just accessed the pe
structure directly.
BRANCH=samus_pd
BUG=none
TEST=manual, compiles, insert hoho/dingdong into samus and see OPOS=1 from samus
for enter, dp_config, dp_status SVDMs
Change-Id: I66448c3386be01bae58768632da216aff41a9a30
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228130
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Wait to send source cap packet until port partner is showing
UFP on CC line. This is necessary because while we are applying
VBUS, the other side could toggle its role, and when VBUS is
finally up, we must wait to send source cap until other side
is pulling down.
BUG=none
BRANCH=samus
TEST=make buildall
Change-Id: If7e811913f5ec9eed28171ffca0cec98712b96fe
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227722
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Move tDRPHold timeout to after vbus is on. This makes sure we give
the right amount of time for a dual-role device to recognize that
it should be the UFP.
BUG=none
BRANCH=samus
TEST=make buildall
Change-Id: I8432eb172783c689d636a435073bb86828488b06
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/227720
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
