BRANCH=reef
BUG=chrome-os-partner:61849
TEST=1. DC mode, enter battery cutoff.
2. After system shutdown, wait 10sec.
3. Plug in AC to check system power on.
Change-Id: I5f4cf023fa70cff42c2d1cc888b1d2ee39226af4
Signed-off-by: David Huang <David.Huang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/427441
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Added common code for charger profile override for fast charging.
Fast charging configs can be defined in the respective board battery
file and use the common code for imposing the custom data.
BUG=chrome-os-partner:59393
BRANCH=none
TEST=Enabled the config on Reef. Manually overrode the temperature
and voltage. Observed correct charge profile config is selected
for each tests.
Change-Id: I075d271258470b98d38e4d5395d749469d3fd469
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/407928
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
For oak, set a different list of task (no als, no accel) for compiling
revision 4 or less. Fix GPIO include issue.
BUG=chrome-os-partner:59423,chrome-os-partner:59084
TEST=compile for oak with board 4 and 5, tested on Reef.
BRANCH=kevin,reef
Change-Id: I09051a69cbad6d477a7b3bf9907f4c5c144b5136
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424220
Reviewed-by: Randall Spangler <rspangler@chromium.org>
sensor private structure for bmi160 and bmp280 were defined
in the drivers themselves. It worked because there was only one
instance of each sensors on a board. However, this is an error it
should be in board files, as it was done for other sensors like the kionix.
BUG=none
TEST=buildall.
BRANCH=kevin,reef
Change-Id: Ica3aba358d141a7df9a3e97251d4c1e520cbf2c8
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424218
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This change takes away control of trackpad from EC entirely. This will
prevent EC from interfering with the OS's interaction with the trackpad
for firmware update, device detection at boot, or entering S3.
Disadvantages are the trackpad will stay on (thus can wake up the system
unintentionally) when the system enters S3 in laptop mode then
transitions to tablet mode, or vice versa: the trackpad will stay off
(thus cannot wake up the system) when the system enters S3 in tablet mode
then transitions to laptop mode.
However, these corner cases can be handled by waking up the system upon
mode transition. The OS can then disable or enable the trackpad depending
on the transition direction (laptop <-> tablet) and re-enters S3. Or the
OS can leave the system running because mode transition implies a user's
intention to start interacting with the device.
The keyboard will continue to be managed by EC and disabled or enabled
upon mode transition.
BUG=chrome-os-partner:61058
BRANCH=reef
TEST=Put device into S3 in tablet mode. Wake it up.
Change-Id: I2f4aa72d704c6562dd861b105225b1995226a09a
Reviewed-on: https://chromium-review.googlesource.com/421275
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This patch enables accels in S3. Accels are required to calculate a
lid angle. EC enables/disables keyboard based on lid angles. EC
needs to be able to control it because the kernel is in sleep state
in S3.
BUG=chrome-os-partner:58792
BRANCH=reef
TEST=lid angles are calculated correctly in S0 and S3.
Change-Id: I13c69a47da2c6521cd0c03c66cf061deb3f4fabd
Reviewed-on: https://chromium-review.googlesource.com/421276
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Battery need some time to provide power when releases
shipping mode or plug in battery at first time.
BUG=chrome-os-partner:60921, 59904
BRANCH=master
TEST=remove battery & AC, then insert battery & AC,
system can boot up.
Change-Id: I33ca4df54e0b02e68ade9426864561dae8c57851
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/419881
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reef discharges on AC till the charger is detected and settled but
when booting from the cut-off mode this will kill the power hence
do not discharge on AC when battery is still waking up and settled.
BUG=chrome-os-partner:60974
BRANCH=none
TEST=Reef can boot from cut-off mode to S0.
Change-Id: I34c5fd8df03a1e60736541c85627fbb18a6d56f7
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/420467
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
To avoid inrush current from the external charger, enable discharge
on AC till the new charger is detected and charge detect delay has
passed.
BUG=chrome-os-partner:60547
BRANCH=none
TEST=Multiple Ramp Resets and inrush current is not observed.
Change-Id: Ie3317fa6e6c2e8f00d4ce7cb9c6bee81c50d7bb2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/417168
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
(from CL:415672)
Slow the keyboard scan rate from 50 us to 80 us. This compensates the
additional delay added to the KBO line by Silego / H1.
BUG=chrome-os-partner:60335,chrome-os-partner:60615
BRANCH=reef
TEST=check press key "f3" then system only output "f3" scan code.
Change-Id: Icaa8f040c20f72b1fa1c9260f86b29da8c69ec2b
Reviewed-on: https://chromium-review.googlesource.com/419577
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The new reef form-factor, Electro, has the lid accelerometer on the
reversed side. Undo the matrix setting.
BUG=chrome-os-partner:60477
BRANCH=reef
TEST=compile, check on reef the value are incorrect.
This reverts commit 430dd5e644.
Change-Id: I0a0efc89f0fad6cce3720836caf2c52bdb7e2b8d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/416390
Tested-by: Ryan Zhang <ryan.zhang.quanta@gmail.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
If battery is not present, input current is set to PD_MAX_CURRENT_MA.
If the input power set is greater than the maximum allowed system power,
system might get damaged. Hence, limit the input current to meet maximum
allowed input system power.
BUG=chrome-os-partner:58498
BRANCH=none
TEST=Manually tested on Reef. Removed the battery & using 'charger'
console command observed the following.
With Zinger charger at 20V - Input current is set to 2.25A
With Type-C & other chargers - Input current is set to 3A
Change-Id: Ife8686f322e095aa74b740a7c469bfe87107fb9a
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/397865
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
The tablet mode value is set to 1 on each program start (RO power on
reset or any sysjump) in common tablet mode infrastructure. This
results in the tablet mode not ever reflecting current reality at the
beginning of each program. In addition to not being able to order
hook callbacks within a single hook it's the luck of the draw if
the tablet mode is set correctly if it was is being set within a
hook callback. With a lid accelerometer that doesn't work it
results in the input peripherals never being enabled.
To fix all this ensure the tablet mode state reflects the current
hardware input such that there's no ordering issues in addition to
making it reflect reality.
BUG=chrome-os-partner:60481
BRANCH=reef
TEST=With a machine whose accelerometer is unattached. Keyboard
and trackpad continue to work through suspend-resume, EC reboot,
etc.
Change-Id: I3456a7b578c9752344424721858756a33992a37d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/416348
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Common code is more flexible and supports more parts, so delete the
npcx-only register translation code.
BUG=chrome-os-partner:60029
BRANCH=gru
TEST=Manual on gru, run 'flashrom -p ec --wp-enable' and check that 0x28
gets written to SR1, which matches our desired 'protect botton 128KB',
according to the datasheet. Also run 'flashrom -p ec --erase' then read
back EC SPI contents, verify ROM is erased except for first 128KB
region.
Change-Id: I526401997ff7ec77f2a6047a4a9af74a671ed69a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413228
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 43634d36d273887b1f2349c333a7b4b229a83365)
Reviewed-on: https://chromium-review.googlesource.com/415498
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
On the bd9995*, back boosting may occur when actual battery voltage
drops below VBAT register setting. Maintain the VBAT register at the
battery-requested charge voltage even when not charging to ensure the
bd9995* doesn't become a back boosted animal.
BUG=chrome-os-partner:56139,chrome-os-partner:54248
BRANCH=gru
TEST=Manual on kevin, unplug AC, run 'charger', verify that 'V_batt' is
maintained at 8688 mV. Attach charger, verify 'V_batt' stays at 8688 mV
and device charges.
Change-Id: Ia0cc7f9279cb460e20a8faf332ad432067dc5482
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/400087
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
When the battery is fully charged or not charging, upon removal of
the AC, discharge takes long time. To overcome this issue suspend
the DC-DC converter when discharging on AC.
BUG=chrome-os-partner:58969
BRANCH=none
TEST=Manually tested on reef. Discharge is in the permissible range.
'chgstate' console command prints correct values.
Change-Id: I64afa992e50b6e18daf43edf237fde8cf658a8a2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/413153
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch enables an interrupt handler for BMI160. This will improve
response time of the motion sense task.
BUG=None
BRANCH=none
TEST=Install and run AIDA64 from Playstore. Wiggle Reef DVT. Verify
'CrosEC Gyroscope' readings change.
Change-Id: Ie8dacb51795fa194840817d833cc6356beb01c8f
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/413079
Enabling/Dislabling keyboard and touchpad is required to prevent EC
from waking up the system from S3 in tablet mode.
This change disables the keyboard and the trackpad when the lid goes
beyond 180 degree.
Keyboard and touchpad are also enabled/disabled by the tablet switch.
When the lid reaches 360 position, keyboard and touchpad are disabled.
And they stay disabled as long as the lid stays at 360 position.
This prevents keyboard and touchpad from turning on by the (faulty) lid
angle calculation.
BUG=chrome-os-partner:58792
BRANCH=none
TEST=Keyboard and trackpad are disabled when the lid goes beyond 180
and re-enabled when it's smaller than 180. Keyboard and trackpad are
disabled when the lid goes to 360 degree and the system doesn't wake
up by a keypress.
Change-Id: I48c04bd576f457a899dfdf9b4718d73b59419cbe
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/411395
Electro & Reef use the same board files but have different batteries
hence configure the respective battery parameters for these boards.
BUG=chrome-os-partner:59876
BRANCH=none
TEST=Manually tested on Reef. Boot with/without/battery works.
cut-off and boot from cut-off works.
Change-Id: I0e4684987133d6bcd9cabab5c5a1ce5b6c5684d2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/411353
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The button closer to the hinge is assigned to volume down and
the one closer to the user is assigned to volume up. This change
swaps the GPIO assignments to fix the UX.
BUG=chrome-os-partner:60057
BRANCH=none
TEST=Verified the one closer to the hinge increases the volume and
the one closer to the user descreases the volume.
Change-Id: I3e716da288839c3f5be608fb2d63f277bbde1bc7
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/412981
Cr50 has an internal pull down. This change changes the PULL_UP on KSO2
to a PULL_DOWN to match Cr50.
BUG=chrome-os-partner:60020
BRANCH=none
TEST=poweroff the AP, put the EC in hibernate, and verify when cr50
enters deep sleep it consumes around 0.6mW on vddiom.
Change-Id: I017094c185f616e018f121ac3ffb0521892aafa1
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/412947
Reviewed-by: Shawn N <shawnn@chromium.org>
Charger BGATE is off on POR hence the voltage to the battery pack is
not applied immediately from the VBUS. To overcome this issue, BGATE
is turned on (CHG_EN) at charger initialization. If the voltage across
VBATT is high but I2C is still failing, battery is booting from ship
mode hence overwrite the battery as not present till I2C on battery
is success and INIT bit is set.
BUG=chrome-os-partner:59308
BRANCH=none
TEST=Reef can boot to OS from shipmode battery.
Change-Id: If1b212612e27fd65a822675a9609f0a8c03d8add
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/411360
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
When the battery charging is not allowed and charging at high load
audible noise is observed from the BD9995X charger. To prevent this
issue enable the battery-learn mode when battery charging is not
allowed.
This audible noise is related to the fact that in light load (<450mA
being withdrawn from VSYS) the DCDC of the charger operates
intermittently i.e. DCDC switches continuously and then stops to
regulate the output voltage and current, and sometimes to prevent
reverse current from flowing to the input. This causes a slight
voltage ripple on VSYS that falls in the audible noise frequency
(single digit kHz range). This small ripple generates audible noise
in the output ceramic capacitors (caps on VSYS and any input of DCDC
under VSYS).
BUG=chrome-os-partner:56695
BRANCH=none
TEST=When battery charging not allowed, battery is put in battery
learn-mode & audible noise is not observed.
Change-Id: Ia22779fe4cf70dd9dd4f799a9698264e44c4c7d2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/412382
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This patch changes the entry/exit model for S0ix from a PCH
SLP_S0 signal based model to a hybrid host event/direct interrupt
model. The kernel will send host events on kernel freeze/thaw exit;
EC will initiate the S0ix entry based on host command and exit via
another host command from kernel.
The assertion of SLP_S0 comes later than HC(suspend) and deasserion
of SLP_S0 comes earlier than HC(resume).
________ ________
SLP_S0 |______________________|
_____ ________
HC |___________________________|
BRANCH=none
BUG=chrome-os-partner:58740
TEST=Build/flash EC and check 'echo freeze > /sys/power/state'
command in OS shell. Verify idle state transitions during display off
and periodic wakes from S0ix do not lead to state transitions in EC.
Change-Id: Ie18c6c2ac8998f59141641567d1d740cd72c2d2e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/401072
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Add a new source policy to provide 3A if there is only one port used
as a source.
Also ensure that the load switch on VBUS when sourcing power is properly
configured to limit the current to 1.5A or 3.0A depending on the case.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:56110
TEST=manual: connect the laptop to a type-C sink with Twinkie in between,
without anything else connected on the laptop, see 3A flowing when measuring
with Twinkie ('tw vbus'), plug a dangling C-to-A receptacle dongle on the other
port and see 1.5A flowing through Twinkie.
Force the input current limit on the sink to 3.0A and see the laptop cutting
VBUS.
Change-Id: Ic94ba186fc0648e770c8d13be0f96b23e968f855
Reviewed-on: https://chromium-review.googlesource.com/403851
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Enable fast charging profile config (CONFIG_CHARGER_PROFILE_OVERRIDE)
so that the battery desired current & voltage can be selected for given
rated performance values.
BUG=chrome-os-partner:59779
BRANCH=none
TEST=Manually overrode the temperature and voltage. Observed correct
charge profile config is selected for each tests.
Change-Id: I080a3ace6d2f77bb6b97911b7705a44ec563258b
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/410824
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=chrome-os-partner:55158,chrome-os-partner:55889,chrome-os-partner:55890
BRANCH=none
TEST=on reef use ina (pp3300_pd_a_mw) to check tcpc power consumption
Change-Id: I5a2904f4e549b7da22242848bb3b1887331ecadd
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/399882
Reviewed-by: David Hendricks <dhendrix@chromium.org>
If PS8751 goes into low power mode during sysjump, then tcpm_init will
fail since PS8751 is not accessible via I2C, so force it to wake up
during hook_init.
BUG=chrome-os-partner:59693
BRANCH=none
TEST=Verified PS8751 port on reef is functional after sysjump.
Change-Id: I2aa5a80b2ea9c17a01e4cba04493f83cb0a39955
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/410132
Reviewed-by: David Hendricks <dhendrix@chromium.org>
BUG=chrome-os-partner:54668
BRANCH=none
TEST=Verified SNK is detected in S0 (toggle on), S3 (toggle off),
and S5 (force sink). SRC is detect in S0 only, stays detected when
entered S3, but unplug/plug while in S3 will not re-detect until
system back in S0. When go to S5, SRC will get disconnected until
back in S0, and hotplug SRC in S5 will not get detected. Checked
power role swap with another chromebook in the above scenario also.
Change-Id: I2a487fca5cb04c45524aa3efde84fcd10ff0579e
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/396918
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
When sourcing current on the type-C port, set the OCP limit on the VBUS
load switch according to current dynamic capability.
(3.0A when only one port is a power source, 1.5A else)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=gru
BUG=chrome-os-partner:56110
TEST=manual: connect Caroline to Kevin with Twinkie in between,
ask Caroline to sink current through the UI.
without anything else connected on Kevin, see 3A flowing when measuring
with Twinkie ('tw vbus'), plug a dangling C-to-A receptacle dongle on
the other Kevin port and see 1.5A flowing through Twinkie.
Force the input current limit on Caroline to 3.0A and see Kevin cutting
VBUS.
Change-Id: Ib879b1ed720b20aa702c5f3643948ba0575d1193
Reviewed-on: https://chromium-review.googlesource.com/403869
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Turn off the charger BGATE when the system is hibernated to
save maximum power.
BUG=chrome-os-partner:59001
BRANCH=none
TEST=Manually verified on the Reef.
System can boot from hibernate wake sources.
Following are the power measurement values at Battery
voltage = 8.3V & temperature = 23 deg C.
a. Normal operation 540uA, 3.500mW
b. BGATE OFF 80uA, 0.592mW
Change-Id: Ia30655ccefbf0dded623246150d53b2a815df2de
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/404685
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
PD alternate mode is covered in tcpc interface. So tcpci_tcpm_init()
doesn't reset HPD. If keeping HDMI/DP type-C cable connected, doing
sysjump sets HPD signal to high while it's already high(this high comes
from previous state), then OS doesn't output to HDMI/DP monitor.
Reef Type-C port 1 follows TCPCI and has this issue.
BUG=chrome-os-partner:57689
BRANCH=none
TEST=Connect HDMI/DP type-C dongle, boot up system, OS detects HDMI/DP
monitor and extends screen to it; in console doing "sysjump RO"
or "sysjump RW", display goes out then comes back.
Change-Id: I12239a86490f29d0123fe8bad1b813d3be28d041
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/398444
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
POR has both VCC & VBUS enabled. If the port is sourcing VBUS it will
also act as sync and AC_OK pin gets enabled. Hence disable the input
to the port when sourcing.
BUG=chrome-os-partner:59020
BRANCH=none
TEST=Manually verified on Reef. Connected HoHo and AC_OK is not
enabled.
Change-Id: Ic51b81f45759d7dddb2c9744d1c24dbafd1e1293
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/404168
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Till the charger task is initialized port is not set for the BD9995X
users and a false battery critical message is printed. Removed the
false message printed for BD9995X users to avoid confusion.
BUG=chrome-os-partner:58972
BRANCH=none
TEST=Manually tested on Reef.
False battery critical message is not printed on the EC console.
Change-Id: Iec8d0f354c4f6dc17efa9da8db38b125e57addab
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/402668
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
