A valid charge port is always detected as VBUS supplier type, 'USB charger'
can detect the same port as BC1.2 DCP supplier type & also 'TCPC' can
detect the same port as TYPEC supplier type. Thus a valid port is detected
as 2 or 3 supplier types. Depending on the supplier's priority and the
power that the supplier can provide, charge manager choses the charge
supplier type of the port.
If the USB charger detected supplier is BC1.2 DCP and the TCPC detected
supplier is TYPEC then the supplier can provide stable current from TYPEC
supplier's advertised current hence start ramping from TYPEC supplier's
advertised current.
BUG=chrome-os-partner:61420
BRANCH=none
TEST=Manually tested on reef. Donette bottom port can switch
from 1.5A to 3A upon high load.
Change-Id: I871eca3ae4041f00bb3fd50e6aa939643f30a1f2
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/427961
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Use the 'echo' command to suppress unwanted build output when V=0.
Signed-off-by: Simon Glass <sjg@chromium.org>
BUG=chromium:680243
BRANCH=none
TEST=V=0 emerge-reef chromeos-ec; See that the tpm output is gone
Change-Id: Ia742b0b5270b969ec4f51967810e616348e39dbd
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427365
Reviewed-by: Randall Spangler <rspangler@chromium.org>
To avoid SRAM footprint, let's use dynamic memory allocation in
nvram_vars. No one is using this module yet, but the cr50 use case is
coming up.
BRANCH=none
BUG=chrome-os-partner:61107
TEST=make buildall -j passes
Change-Id: I21534430217ad387a3787fcc127da596a1b48e03
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/426088
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Use binary search in host command lookup dispatcher
BUG=chromium:570895
TEST=manual testing on kevin
- Kevin boots
- ectool hello
make buildall -j
Verify *.smap hcmds section is sorted:
BOARD with host commands and private host commands
0004d0ec R __hcmds
0004d0ec R __host_cmd_0x00000x0000
0004d0f8 R __host_cmd_0x00000x0001
0004d104 R __host_cmd_0x00000x0002
0004d110 R __host_cmd_0x00000x0003
0004d11c R __host_cmd_0x00000x0004
0004d128 R __host_cmd_0x00000x0005
0004d134 R __host_cmd_0x00000x0007
0004d140 R __host_cmd_0x00000x0008
0004d14c R __host_cmd_0x00000x000a
0004d158 R __host_cmd_0x00000x000d
0004d164 R __host_cmd_0x00000x0010
0004d170 R __host_cmd_0x00000x0011
0004d17c R __host_cmd_0x00000x0012
0004d188 R __host_cmd_0x00000x0013
0004d194 R __host_cmd_0x00000x0015
0004d1a0 R __host_cmd_0x00000x0016
0004d1ac R __host_cmd_0x00000x0017
0004d1b8 R __host_cmd_0x00000x0087
0004d1c4 R __host_cmd_0x00000x008c
0004d1d0 R __host_cmd_0x00000x008f
0004d1dc R __host_cmd_0x00000x0092
0004d1e8 R __host_cmd_0x00000x0093
0004d1f4 R __host_cmd_0x00000x0097
0004d200 R __host_cmd_0x00000x0098
0004d20c R __host_cmd_0x00000x00b6
0004d218 R __host_cmd_0x00000x00d2
0004d224 R __host_cmd_0x00000x00d3
0004d230 R __host_cmd_0x3E000x0000
0004d23c R __host_cmd_0x3E000x0002
0004d248 R __evt_src_EC_MKBP_EVENT_HOST_EVENT
0004d248 R __hcmds_end
BOARD with host commands only
100bc888 R __hcmds
100bc888 R __host_cmd_0x00000x0000
100bc894 R __host_cmd_0x00000x0001
100bc8a0 R __host_cmd_0x00000x0002
100bc8ac R __host_cmd_0x00000x0003
100bc8b8 R __host_cmd_0x00000x0004
100bc8c4 R __host_cmd_0x00000x0005
100bc8d0 R __host_cmd_0x00000x0006
100bc8dc R __host_cmd_0x00000x0007
100bc8e8 R __host_cmd_0x00000x0008
100bc8f4 R __host_cmd_0x00000x0009
100bc900 R __host_cmd_0x00000x000a
100bc90c R __host_cmd_0x00000x000b
100bc918 R __host_cmd_0x00000x000d
100bc924 R __host_cmd_0x00000x0010
100bc930 R __host_cmd_0x00000x0011
100bc93c R __host_cmd_0x00000x0012
100bc948 R __host_cmd_0x00000x0013
100bc954 R __host_cmd_0x00000x0015
100bc960 R __host_cmd_0x00000x0016
100bc96c R __host_cmd_0x00000x0017
100bc978 R __host_cmd_0x00000x0025
100bc984 R __host_cmd_0x00000x0026
100bc990 R __host_cmd_0x00000x0029
100bc99c R __host_cmd_0x00000x002a
100bc9a8 R __host_cmd_0x00000x002b
100bc9b4 R __host_cmd_0x00000x002c
100bc9c0 R __host_cmd_0x00000x0044
100bc9cc R __host_cmd_0x00000x0045
100bc9d8 R __host_cmd_0x00000x0046
100bc9e4 R __host_cmd_0x00000x0047
100bc9f0 R __host_cmd_0x00000x0061
100bc9fc R __host_cmd_0x00000x0062
100bca08 R __host_cmd_0x00000x0064
100bca14 R __host_cmd_0x00000x0065
100bca20 R __host_cmd_0x00000x0067
100bca2c R __host_cmd_0x00000x0087
100bca38 R __host_cmd_0x00000x008c
100bca44 R __host_cmd_0x00000x008d
100bca50 R __host_cmd_0x00000x008f
100bca5c R __host_cmd_0x00000x0092
100bca68 R __host_cmd_0x00000x0093
100bca74 R __host_cmd_0x00000x0096
100bca80 R __host_cmd_0x00000x0097
100bca8c R __host_cmd_0x00000x0098
100bca98 R __host_cmd_0x00000x0099
100bcaa4 R __host_cmd_0x00000x009e
100bcab0 R __host_cmd_0x00000x00a0
100bcabc R __host_cmd_0x00000x00a1
100bcac8 R __host_cmd_0x00000x00a8
100bcad4 R __host_cmd_0x00000x00a9
100bcae0 R __host_cmd_0x00000x00b6
100bcaec R __host_cmd_0x00000x00b7
100bcaf8 R __host_cmd_0x00000x00d2
100bcb04 R __host_cmd_0x00000x00d3
100bcb10 R __host_cmd_0x00000x00db
100bcb1c R __host_cmd_0x00000x0101
100bcb28 R __host_cmd_0x00000x0102
100bcb34 R __host_cmd_0x00000x0103
100bcb40 R __host_cmd_0x00000x0104
100bcb4c R __host_cmd_0x00000x0110
100bcb58 R __host_cmd_0x00000x0111
100bcb64 R __host_cmd_0x00000x0112
100bcb70 R __host_cmd_0x00000x0113
100bcb7c R __host_cmd_0x00000x0114
100bcb88 R __host_cmd_0x00000x0115
100bcb94 R __host_cmd_0x00000x0116
100bcba0 R __host_cmd_0x00000x0117
100bcbac R __host_cmd_0x00000x0118
100bcbb8 R __host_cmd_0x00000x011a
100bcbc4 R __evt_src_EC_MKBP_EVENT_KEY_MATRIX
100bcbc4 R __hcmds_end
BRANCH=none
Change-Id: I5d13d2a7fe7fa9a0fbeed43177cc612f572a58bb
Reviewed-on: https://chromium-review.googlesource.com/419702
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
The new code allows to replace the existing one buffer at a time
shared memory facility with a malloc/free implementation. A new
configuration option is being provided (CONFIG_MALLOC).
The names of functions allocating and freeing memory are not being
changed to allow to switch between the two implementations seamlessly.
A double linked list of buffers is used to keep track of free and
allocated memory. During initialization the entire free memory block
is considered a single free buffer. No allocations/frees are allowed
from within interrupts. The control structures are protected by a
semaphore, so allocate and free invocation could be blocking.
A test is added which randomly allocates and frees memory, continuing
until all branches in the allocate and free functions are taken.
BUG=chrome-os-partner:
TEST=make buildall -j succeeds, which includes testing the new
malloc/free implementation.
Change-Id: I5e71c0190c6c247ec73bb459f66a6d7a06e3d248
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/420466
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This is a purely cosmetic patch making it easier to maintain the list
of test in the ec tree.
BRANCH=none
BUG=none
TEST=make buildall -j succeeds
Change-Id: I2f0407c99776ad9d66445ea177a707bdfaa9b815
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/424175
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The CONFIG_FLASH_NVMEM option implements persistent, reliable storage
regions in flash. This adds CONFIG_FLASH_NVMEM_VARS, which uses one of
those storage regions for free-form variables.
Refer to the comments in include/nvmem_vars.h and common/nvmem_vars.c
for usage and implementation details.
BUG=chrome-os-partner:61107
BRANCH=none
TEST=make runtests
This CL includes a number of new tests, specifically for this feature.
No target boards use this feature yet so there's nothing to test on
actual hardware, but the test/nvmem_vars executable includes console
commands ("get", "set", "print") to try it out.
Change-Id: I8597415dc3b00a1462f5b164eeb5073129030525
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/414194
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
If battery is not present, input current is set to PD_MAX_CURRENT_MA.
If the input power set is greater than the maximum allowed system power,
system might get damaged. Hence, limit the input current to meet maximum
allowed input system power.
BUG=chrome-os-partner:58498
BRANCH=none
TEST=Manually tested on Reef. Removed the battery & using 'charger'
console command observed the following.
With Zinger charger at 20V - Input current is set to 2.25A
With Type-C & other chargers - Input current is set to 3A
Change-Id: Ife8686f322e095aa74b740a7c469bfe87107fb9a
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/397865
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Upon requesting a PD power contract at a new voltage, keep the input
current limit at 500mA until PD_RDY is received.
BUG=b:30744563,chrome-os-partner:59311,chrome-os-partner:44340
BRANCH=ryu, gru, glados
TEST=Manual on kevin, set ilim to 5V through `chglim` console command,
attach zinger. Set ilim to 20V through `chglim`, verify that ilim goes
from 3A to 500mA to 3A.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I452f183cfb958780e336a9f99dc6398356de17a0
Reviewed-on: https://chromium-review.googlesource.com/399918
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
When a WAIT is received in response to a request, wait SinkRequestTime
before resending the request.
BUG=chrome-os-partner:34984
TEST=make -j buildall
BRANCH=none
Change-Id: I5c8429c4a7b9cf06609996f924b8d9d535ab6b5f
Reviewed-on: https://chromium-review.googlesource.com/414533
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This adds new key combination (Left_Shift+Esc+Refresh+Power) that triggers
recovery mode by setting a new host event
EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT. This host event can be used
whenever user wants to request entry into recovery mode by
reinitializing all the hardware state (e.g. memory retraining).
BUG=chrome-os-partner:56643,chrome-os-partner:59352
BRANCH=None
TEST=Verified that device retrains memory in recovery mode
with (Left_Shift+Esc+Refresh+Power) on reef.
Change-Id: I2e08997acfd9e22270b8ce7a5b589cd5630645f8
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/407827
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Simple API to set/get the tablet mode. It can be set via lid angle
calculation or if a board has a dedicated HAL sensor/GPIO.
Merged from glados branch, add MKBP switch support.
BUG=chromium:606718
BRANCH=gru
TEST=Check with Cave that both mode works.
Reviewed-on: https://chromium-review.googlesource.com/402089
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit c940f36ceabcf2425284001298f03ebdb4c3079e)
Change-Id: I2ee5130f3e0a1307ec3ea543f7a32d66bc32b31d
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/404915
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
charge_manager may request a charge current limit less than the
capability of the supply in certain cases (eg. during PD voltage
transition, to make an effort to comply with reduced load spec).
Depending on the battery / system state, setting a reduced charge
current limit may result in brownout.
Pass the uncapped / max negotiated current to board_set_charge_limit()
so that boards may use it instead of the requested limit in such
circumstances.
BUG=chrome-os-partner:56139
BRANCH=gru
TEST=Manual on kevin with subsequent commit, boot system with zinger +
low-charge battery, verify devices powers up to OS without brownout.
Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/383732
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Using the lid angle, detect if we are in tablet mode or not.
We are in tablet mode when the lid angle is large enough:
tablet_mode:
1 | +-----<----+----------
| \/ /\
| | |
0 |------------------------>----+
+------------------+----------+----------+ lid angle
0 240 300 360
BRANCH=kevin
BUG=chrome-os-partner:55702,b:27849483
TEST=Check on Kevin event are sent on tablet mode transition.
Change-Id: Id9935ce4dd717e2c20fa6c9520defb504a1760d9
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/383073
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
When lid is closed, the lid angle can move to 358, 360, 0, 359 ...
Prevent transition 0 from/to 360 by keeping the last calculated value.
BRANCH=kevin
BUG=chrome-os-partner:55702
TEST=Check transition does not happen anymore.
Change-Id: Ifa8415470f425c893e2c3662c84c8fd0156e0524
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/373040
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
TPM2.0 needs more NvMem space and currently the whole block is
contiguous in memory with 2 partitions. This CL removes the
requirement that the partitions are in contiguous which allows for 1
partition to placed at top of RW_A and the other at RW_B.
This CL does not change the size of each partition as that will be
done in a subsequent CL.
BRANCH=none
BUG=chrome-os-partner:56798
TEST=manual
Tested with the unit test 'make runtests TEST_LIST_HOST=nvmem' and
verified that all tests pass.
Tested on Kevin, erased the existing NvMem area and verified that TPM
was still manufactured and executed the command: trunks_client --own
Erased parition 0 and 1 in the new locations and repeated the tests.
Change-Id: I295441f94dccdf5a152c32603c2638ffac23f471
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/378675
Commit-Ready: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Tested-by: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This change introduces a larger range of tests
for bn_modinv_vartime. The tests are designed
to run on a host, and compare results against
openssl.
BRANCH=none
BUG=chrome-os-partner:47524
TEST=bn_test passes
Change-Id: I2d6ea4824fa82f78f8797c0cfc2cf0dce03e8923
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/365232
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
CONFIG_POWER_TRACK_HOST_SLEEP_STATE has a dependency on
CONFIG_POWER_COMMON, so remove it from test builds that don't have a
chipset task, rather than heavy-handedly removing it from all test
builds.
BUG=chrome-os-partner:56197
BRANCH=None
TEST=`make BOARD=gru tests`
Change-Id: I86e20b4dccbb01ee285054a47093d6f60abc2166
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/378119
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Add tests for CBC, CFB and OFB AES modes.
Also convert tests to use word unligned
input parameters, to ensure that the api's
are unalignment agnostic.
Also add the program used for generating
test vectors.
BRANCH=none
BUG=chrome-os-partner:56413
TEST=tpmtest.py passes
Change-Id: I92c9ffece797aa7134d9cdad6ea32e6fe50feef1
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/374663
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Since pretty much always, we've declared console commands to take
a "longhelp" argument with detailed explanations of what the
command does. But since almost as long, we've never actually used
that argument for anything - we just silently throw it away in
the macro. There's only one command (usbchargemode) that even
thinks it defines that argument.
We're never going to use this, let's just get rid of it.
BUG=none
BRANCH=none
CQ-DEPEND=CL:*279060
CQ-DEPEND=CL:*279158
CQ-DEPEND=CL:*279037
TEST=make buildall; tested on Cr50 hardware
Everything builds. Since we never used this arg anyway, there had
better not be any difference in the result.
Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374163
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The nvmem_write() and nvmem_move() funcitons return an error
if the write or move operation would exceed the user buffer
boundary. However, the TPM2 functions which call these functions
do not check for errors. Instead TPM2 NvMem relies on the return
value of the nv_commit() function to determine if a TPM command
which modifies NvMem succeeds or fails.
This CL adds a nvmem_write_error flag which is set in cases where
an nvmem_write/nvmem_move returns an error. This error flag
is then checked in nvmem_commit() so that the commit operation can
be abandonded and the error returned back up the TPM2 stack.
Tested in full system for two cases.
Installed TPM certificates on the Cr50, then manually erased NvMem with
flasherase 0x7b000 0x5000 and rebooted system. Then on Kevin console
entered the command <trunks_client --own>
NV_MEMORY_SIZE = 9932
NVMEM_TPM_SIZE = 7168
Case 1 -> Without internal write error state, so commit() always
executes if called. In this case, the Kevin console reports
a TRUNKS_RC_WRITE_ERROR and there is a Cr50 reboot.
Kevin Console:
localhost ~ # trunks_client --own
[INFO:tpm_utility_impl.cc(1692)] CreateStorageRootKeys: Created RSA SRK.
[INFO:tpm_utility_impl.cc(1735)] CreateStorageRootKeys: Created ECC SRK.
[ 134.056217] tpm tpm0: Operation Timed out
[ERROR:tpm_utility_impl.cc(1987)] DoesPersistentKeyExist:
querying handles: TRUNKS_RC_WRITE_ERROR
[ERROR:tpm_utility_impl.cc(269)] TakeOwnership: Error creating salting
key: TRUNKS_RC_WRITE_ERROR
[ERROR:trunks_client.cc(98)] Error taking ownership: TRUNKS_RC_WRITE_ERROR
Cr50 Console:
> [131.501920 nv_commit()]
[142.494755 nv_wr: max off = 0x1250]
[142.496347 nv_wr: max off = 0x17b4]
[142.548296 nv_commit()]
[142.678001 nv_rd: max off = 0x1250]
[142.679350 nv_rd: max off = 0x1254]
[143.269614 Nv Wr: overflow stop: reqst = 0x1d1c, avail = 0x1c00]
[143.271460 Nv Wr: overflow stop: reqst = 0x1d20, avail = 0x1c00]
[143.273055 Wr Err = TRUE, Resetting error only, not returning]
[143.325073 nv_commit()]
--- UART initialized after reboot ---
[Reset cause: rtc-alarm]
[Image: RW_B, cr50_v1.1.5056-8e5dc99+ private-cr51:v0.0.69- 12:23:02]
[0.004349 Inits done]
[0.007150 Active NVram partition set to 0]
[0.008086 Debug Accessory connected]
[0.009076 USB PHY B]
Console is enabled; type HELP for help.
tpm_manufactured: manufactured
[1.155766 usb_reset]
[1.240155 usb_reset]
[1.311188 SETAD 0x6c (108)]
Case 2 -> Using internal error state to gate the commit() operation.
In this case, the attempted write overflow sets the internal error
state and the commit() following attempted overflow detection is not
exectued. It results in a different AP TPM error shown below as
Error encrypting salt. The other different behavior is that observed
is that if after failing on the RSA SRK, the ECC SRK write is still
attempted.
Kevin Console:
localhost ~ # trunks_client --own
[INFO:tpm_utility_impl.cc(1692)] CreateStorageRootKeys: Created RSA SRK.
[INFO:tpm_utility_impl.cc(1735)] CreateStorageRootKeys: Created ECC SRK.
[ERROR:session_manager_impl.cc(154)] Error fetching salting key public
info: Handle 1: TPM_RC_HANDLE
[ERROR:session_manager_impl.cc(94)] Error encrypting salt: Handle 1:
TPM_RC_HANDLE
[ERROR:tpm_utility_impl.cc(277)] TakeOwnership: Error initializing
AuthorizationSession: Handle 1: TPM_RC_HANDLE
[ERROR:trunks_client.cc(98)] Error taking ownership: Handle 1:
TPM_RC_HANDLE
Cr50 Console:
> [107.867473 nv_commit()]
[133.743522 nv_wr: max off = 0x123f]
[133.744908 nv_wr: max off = 0x1250]
[133.746159 nv_wr: max off = 0x17b4]
[133.798498 nv_commit()]
[133.900131 nv_rd: max off = 0x1250]
[133.901496 nv_rd: max off = 0x1254]
[134.507033 Nv Wr: overflow stop: reqst = 0x1d1c, avail = 0x1c00]
[134.508852 Nv Wr: overflow stop: reqst = 0x1d20, avail = 0x1c00]
[134.510440 Wr Err = TRUE, Aborting Commit!]
[144.856751 Nv Wr: overflow stop: reqst = 0x1d1c, avail = 0x1c00]
[144.858611 Nv Wr: overflow stop: reqst = 0x1d20, avail = 0x1c00]
[144.860198 Wr Err = TRUE, Aborting Commit!]
BRANCH=none
BUG=chrome-os-partner:55910
TEST=manual Test in system as described above and
ran NVMEM unit tests and verified that when a write would overrun the
user buffer, the write fails and sets the error state. Then,
verified that the nv_commit() call returns an error and clears
the internal error state.
Change-Id: I376e17b273003ff3d75459b4e68ed69d42dc7415
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/366757
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
There seems to be flaky issue where the nvmem tests don't fully
complete. I need to spend some time to try and understand the
mechanism. It doesn't happen on every build attempt and never
happens when I just run this particular test.
In the meantime, I don't want the builder to fail due to this
issue so I am removing this test from the test-list-host while
I debug the issue.
BUG=chrome-os-partner:55854
BRANCH=none
TEST=manual
Execute the command 'make runtests' in /platform/ec and verified that
the nvmem test is no longer executed.
Change-Id: I9f0778fd9fa17cf8949292f7abe8b05ccab2bae2
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/367302
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
I keep thinking this refers to "Embedded Controller" instead of
"Elliptic Curve Cryptography". Make it clearer.
There's no functional change, I'm just renaming a constant.
BUG=none
BRANCH=none
TEST=make buildall; run tests on Cr50 dev board
make -C test/tpm_test && sudo ./test/tpm_test/tpmtest.py
Change-Id: Iaf2e2839e88fdbbcb1a712934be56a0dd47e4a70
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/366752
Reviewed-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
The chip revision and board version show up on the second line of
the returned string, immediately before the build info.
BRANCH=none
BUG=chrome-os-partner:55558
TEST=Queried version string using tpm_test
make -C test/tpm_test && sudo ./test/tpm_test/tpmtest.py
Starting MPSSE at 800 kHz
Connected to device vid:did:rid of 1ae0:0028:00
RO_A:* 0.0.2/d0c9abe3 RO_B: 0.0.2/13eda43f RW_A: cr50_ [...]
B2:0 cr50_v1.1.5013-ab0e228+ [...]
^^^^
Change-Id: Iaa1efe5dca441aca24f281f76c1f218e24c844be
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/365421
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
The existing algorithm makes several assumptions for a particular
thermistor circuit. This patch introduces a more generic version
that can be used for multiple thermistors on a single board.
The idea is to approximate a curve produced by solving for voltage
measued by an ADC using the Steinhart-Hart equation. For a straight
line one only needs two data points. For a steady curve data
points can be distributed evenly. For the most part, though, data
points should be provided after a significant change in slope.
More data points give more accuracy at the expense of memory, and
we mostly only care about accuracy in the range between "warm"
and "too hot" so only a few data points should be used.
BUG=chrome-os-partner:54818
BRANCH=none
TEST=added unit test, needs real testing
Change-Id: I046e61dbfd1e8c26c2a533777f222f5413938556
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/344781
Reviewed-by: Shawn N <shawnn@chromium.org>
The ancient native tests can't deal with board-specific
configurations, don't build them. We run generic changes with
host tests and board-specific cases by running on real hardware.
BUG=chrome-os-partner:55705
BRANCH=none
TEST=make BOARD=cr50 tests; make buildall; test on Cr50 hardware
Change-Id: I5eb7229ca9df16293d6f0f84b474d4c992277baf
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/363942
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
The SoC looks for two RO images at reset, and is typically
configured for two RW images as well. This CL reports version
strings for all those images, as well as identifying the active
RO and RW copies.
Since the RO image doesn't contain a version string, we create
one using the epoch_, major_, minor_, and img_chk_ members of its
signed header.
BUG=chrome-os-partner:55558
BRANCH=none
TEST=make buildall; run on Cr50 hardware
The "version" command now includes information like this:
RO_A: * 0.0.2/a3c3d5ea
RO_B: 0.0.2/8895c9eb
RW_A: cr50_v1.1.4965-a6c1c73-dirty
RW_B: * cr50_v1.1.4959-2f49d5c
The '*' indicates the active image.
The test/tpm_test/tpmtest.py program has been updated to request
the version information at startup, and it also now reports
similar information, just all on one line:
RO_A:* 0.0.2/a3c3d5ea RO_B: 0.0.2/8895c9eb RW_A: cr50_v1.1 ...
The active images are marked with a '*' following the ':', so
that the same regexp can match either format:
($ro, $rw) = m/RO_[AB]:\s*\*\s+(\S+).*RW_[AB]:\s*\*\s+(\S+)/s;
Change-Id: Ic27e295d9122045b2ec5a638933924b65ecc8e43
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/362861
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
During initialization the NvMem module looks for either a valid
partition or that the NvMem area is fully erased. If neither of
these two conditions were found, then it was only returning an
error code and logging a message to the console.
This CL modifies nvmem_init() so that if the error case as described
above is detected, then it will call nvmem_setup() which will
create two valid partitions. In addition, the setup function
erases all of the existing data in the NvMem space.
Enhanced the unit test that deals with both partitions being
corrupted so that it verifies the version numbers are correct
and that all user buffer data is set to 0xff.
BUG=chrome-os-partner:55536
BRANCH=None
TEST=Manual
Executed make runtests TEST_LIST_HOST=nvmem and verifed that all
tests passed.
Change-Id: Ib932e02f15bd1aad7811032a12d826c76476e53f
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/362448
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Currently, the matrix keyboard protocol does not have support for
handling non-matrixed keys. This commit adds support for buttons which
do not appear in the keyboard matrix as well as switches.
Additionally, the keyboard FIFO is now just a general MKBP events FIFO
which MKBP events are free to use. Now, buttons and switches wil join
the key matrix event.
BUG=chrome-os-partner:54988
BUG=chrome-os-partner:54976
BUG=chromium:626863
BRANCH=None
TEST=Flash kevin, and verify that keyboard is still functional.
TEST=make -j buildall
CQ-DEPEND=CL:358926
Change-Id: If4ada904cbd5d77823a0710d4671484b198c9d91
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/358633
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The fix for SPI bus base address missed the tpm test driver, this patch
fixes the issue.
BRANCH=none
BUG=chrome-os-partner:54720
TEST=tpmtest.py connects over ftdi & tests pass
Change-Id: I5a59a6e089aee5a7c25466e0d183f3647c67343a
Signed-off-by: nagendra modadugu <ngm@google.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356556
Add a test that verifies RSA keygen from a fixed seed and
template from the TCG EK Credential Profile spec.
BRANCH=none
BUG=chrome-os-partner:43025,chrome-os-partner:47524
TEST=tests under test/tpmtest pass
Change-Id: I2f1cfb8460a0497c93079b89b9ff4e031eaff358
Reviewed-on: https://chromium-review.googlesource.com/356561
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Not everything with a temperature sensor uses thermal throttling. This
change modifies the conditional build to enable building temp sensor
source without thermal throttling.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I8c0753f12899e9f203c04477ae520bcda40d5fd8
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356484
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Added mutex lock for nvmem write/move operations. In the
current implementation, there is no single entry point
for the platform specific NvMem calls. The mutex lock is
coupled with a task number so that the same task can attempt
to grab the lock without stalling itself.
In addition to the mutex lock, changed where the cache.base_ptr
variable is updated. Previously, this was done prior to the
partition being copied from flash to the shared memory area.
Now, the variable is only updated after the copy so that read
operations will always read from the correctly from either
flash or from cache memory if a write operation has been
started.
BRANCH=none
BUG=chrome-os-partner:52520
TEST=Manual
make runtests TEST_LIST_HOST=nvmem and verify that all tests pass.
Tested with tcg_test utility to test reads/writes using the
command "build/test-tpm2/install/bin/compliance --ntpm
localhost:9883 --select CPCTPM_TC2_3_33_07_01".
Change-Id: Ib6f278ad889424f4df85e4a328da1f45c8d00730
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353026
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Add a certificate verifier, so that endorsement
certificates may be verified upon installation.
Doing so allows for catching certificate errors early.
BRANCH=none
BUG=chrome-os-partner:43025,chrome-os-partner:47524
TEST=all tests in test/tpm_test/tpmtest.py pass
Change-Id: I9339a6bc36e4d82ae875ce774e31848ae983fa1f
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/351031
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Add tests for RSA-1024, and created partner CRBUG/53893
to track issue discovered with 1024-bit modinv.
1024-bit RSA support being added in preparation
for a forthcoming hardware based implementation.
BRANCH=none
BUG=chrome-os-partner:43025,chrome-os-partner:47524,chrome-os-partner:53893
TEST=all tests in test/tpm_test/tpmtest.py pass
Change-Id: I6b5aaeffc9df1cbbe403535fd21cdd377b42c38e
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/348490
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Used #define CONFIG_FLASH_NVMEM to have functions in
/board/tpm2/NVMem.c utlitize on chip Nvmem functions.
On chip NV Memory availability is tied to an internal nvmem
error state which itself only depends on finding at least one
valid partition.
Added nvmem_is_different and nvmem_move functions which were
needed to complete the tpm2 platform interface. In addition,
added unit tests to support these two new functions.
BUG=chrome-os-partner:44745
BRANCH=none
TEST=manual
make runtests TEST_LIST_HOST=nvmem and verify that all tests pass.
Tested with tcg_test utility to test reads/writes using the
command "build/test-tpm2/install/bin/compliance --ntpm
localhost:9883 --select CPCTPM_TC2_3_33_07_01".
Change-Id: I475fdd1331e28ede00f9b674c7bee1536fa9ea48
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346236
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Full implementation of NvMem read, write, and commit functions.
Includes partition definitions, shared memory allocation, and
initialization function.
Includes a set of unit tests located in ec/test/nvmem.c which
verify functionality.
This module is required by Cr50, however this CL does not
include any Cr50 specific code.
BUG=chrome-os-partner:44745
BRANCH=none
TEST=manual
make runtests TEST_LIST_HOST=nvmem and verify that all tests pass
Change-Id: I515b094f2179dbcb75dd11ab5b14434caad37edd
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/345632
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The counter used for prime generation should be
incremented after each success / failure. Not doing
so results in duplicate primes being picked when
a label is explicitly specified.
BRANCH=none
BUG=chrome-os-partner:43025,chrome-os-partner:47524
TEST=all tests in test/tpm_test/tpmtest.py pass
Change-Id: Ib2fd0e7fa6255b04946e6d2808e8c67a2199fb55
Signed-off-by: nagendra modadugu <ngm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/346056
Commit-Ready: Nagendra Modadugu <ngm@google.com>
Tested-by: Nagendra Modadugu <ngm@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
When developing or tweaking tests, we almost always need to hack
the Makefiles so that "make runtests" doesn't run *EVERY* test
each time, but only the one we're playing with.
This CL just allows you to override the default test_list_host
values from the commandline. Of course, you shouldn't do this
except when testing the tests themselves.
BUG=none
BRANCH=none
TEST=manual
# build all boards and run all tests
make buildall -j14
# run all tests
make runtests
# run only the two specified tests
TEST_LIST_HOST="lightbar hooks" make runtests
Change-Id: Icd82c2c781a71a461a7d75bc4bd54944b0eaeed6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/343003
Reviewed-by: Randall Spangler <rspangler@chromium.org>
