The flash_ec uses the given board name to select a proper flashing
method. It keeps a mapping from board name to chip name.
This approach is not scalable if we want this script to work on
all supported board variants, like the pinky family which has many
boards: jerry, minnie, speedy, etc.
This change adds a new argument of chip name, such that we can only
keep the mapping of major boards. Other boards not listed can use
the chip argument to select a proper flashing method.
BRANCH=none
BUG=chromium:505003
TEST=Ran the script on Beaglebone/Servo v3 connected with Jerry:
$ flash_ec --chip stm32 --image ec.bin
Change-Id: I553ee68f82a7985a37548dfb6e89b364eaffd0f1
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287445
Reviewed-by: Dan Shi <dshi@chromium.org>
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Allow to force discharging the battery while a power source is plugged
for factory testing.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42509
TEST=On Smaug EVT2 with USB-C cable plugged, issue "fwtool ec
chargecontrol discharge" or "ectool chargecontrol discharge"
and monitor the battery level for 10 min.
Change-Id: I0c4daa8ab442726cd398c121467718c50dbf0bef
Reviewed-on: https://chromium-review.googlesource.com/287590
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Create new custom VDM to notify DUT to enter case closed
debugging mode. Send this VDM from Plankton when the case
closed debugging enable button is pressed. Once DUT
receives the CCD enable VDM, CCD remains enabled until
a reboot. Note, this is polarity dependent, so cable
might need to be flipped.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=load on plankton and ryu. attach full feature C to C
cable (must have USB3.0 wires). make sure plankton is in
USB mode (USB_SS_USB_MODE light should be set, which can be
done by pressing DP_USB_TOGGLE button). Press CASE_CLOSE_EN
button to send VDM, and then attach micro-B to debug port
CN14 on plankton. See that VID/PID for Ryu show up in lsusb
on host, and EC console works. If device does not show up,
flip polarity of cable.
Change-Id: Ifa469e4a43e32089becd75fe6cdfe0ed462d950b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287441
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add ability for Plankton to detect whether a single or double
CC cable is used to connect to DUT. This is done by toggling
the active CC line until a connection is detected, then toggling
once more and checking if we still have a connection. If we
can connect to the DUT in both CC polarities, then it is a
double CC cable. Before we know the cable type, keep PD
communication disabled to avoid partially negotiating and then
disconnecting. Note, this increases the time it takes for
us to connect a form a stable PD contract with the DUT.
When we detect a double CC cable, the cable flip button actually
flips the active CC polarity, thus testing all pins in the
opposite polarity.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=test with plankton and samus. test that we form a PD
contract with both single and double CC cables as both sink
and source. also test the cable flip button for both cables.
Change-Id: I522369302848d4cdbb70c55a40af3ad0b7c3fb8a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286589
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
symptom: there are many reset cause while chip power on.
root cause: there is no default value for bram.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. "power-on" reset cause still exist.
2. console "reboot" hard, preserve, and ap-off.
3. console "sysjump" rw and ro.
Change-Id: Ie190ade4990bfaf46e73746ac5019f61307c81e5
Reviewed-on: https://chromium-review.googlesource.com/286281
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Add matrices to align sensors vectors with the device reference.
Move rotation in read routines, to allow fifo to contains processed
information.
BRANCH=smaug
TEST=Worsk on smaug
BUG=chrome-os-partner:39900
Change-Id: I009e7f24ef6ee0574ed664aeb5fd649fcd7039fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286659
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Ported the USB-C muxes from Glados
Change-Id: I9d42108688a9070b982ae77f77633654bc6505ed
Reviewed-on: https://chromium-review.googlesource.com/282281
BUG=none
TEST=Tested the USB & DP status from "typec" console command.
Observed usb_mux_set() & usb_mux_get() function are getting called
and also the polarity of the USB-C is getting detected properly.
BRANCH=none
Change-Id: I56da12f4fe20a05a73e8b93893ba5a425a20808f
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287360
Reviewed-by: Shawn N <shawnn@chromium.org>
math library can be set independentely.
It is implied when motion sensor drivers are compiled in.
BRANCH=smaug
TEST=Build strago board specific tests, host test and ran
ryu image.
BUG=chromium:512329
Change-Id: I743ea7b44e4a3783602c11f3928cb3fa4b105ec4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287371
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add example uses of the multi USART driver with DMA transmission and interrupt
based reception. USART1 is setup as a loopback device, it just echo's any
characters received. USART4 is forwarded over USB.
Also fix the alternate function mappings for USART3 and USART4, and add
comments for each section of board.c.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Crosswire USART1 to USART4 and cut and paste chunks of text over USB
Change-Id: I79170c78e61328caf8067ae8db8810db38880839
Reviewed-on: https://chromium-review.googlesource.com/287195
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
This adds a new transmission implementation for the multi UART driver.
It is a DMA based transmitter that can directly read from the TX queue
with zero copy overhead. The DMA channel used as well as the maximum
DMA transmission size are configurable per UART at the board level.
This also updates the Ryu AP UART to use DMA transmission.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Manually verify that the AP UART forwarding works
Change-Id: I3cb27d0f9015043d75a38c12919388afe90dc4af
Reviewed-on: https://chromium-review.googlesource.com/286274
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Following features are enabled.
1. ALS OPT3001 is enabled
2. Charger ISL9237 is enabled
3. Sleep mode in G3 is enabled
4. CMD_HASH, CMD_TIMERINFO, CONSOLE_HISTORY, CMD_ACCEL_INFO, CMD_ACCES
are disabled to save the memory.
BUG=none
TEST=Device boots to UI.
BRANCH=none
Change-Id: I225dcafdb5b066b6d9b9b2b00bd06586d33d3527
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286783
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=none
BRANCH=none
TEST=Added OPT3001 config to test the sensor in Kunimitsu.
Able to read the als data from "als" console command.
Varied the light intensity and the als reading are changing.
Driver fits into the existing ALS framework.
Change-Id: Idb2e6f9f50b6d0d6c8f64c11336efd3f2c76d498
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286782
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=none
TEST=Enabled the config and tested on Kunimitsu.
Enter "shutdown -h now" form the Kernel console.
Device goes to Sleep mode in G3 and charger LED turns off.
BRANCH=none
Change-Id: I962018dcfac2998ee0a11784adeceb09931b930d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286781
Reviewed-by: Shawn N <shawnn@chromium.org>
Remove ryu_p4p5 EC board code along the "splitted" Sensor hub board
(ryu_sh/ryu_sh_loader): It's time to get rid of oldies.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38333
TEST=make buildall
CQ-DEPEND=*I6df51d7b4be2be7217604da60462b8c9d0cde1d2
Change-Id: Iebc4022267afccb5057c856d624e56a850ecbd70
Reviewed-on: https://chromium-review.googlesource.com/286780
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Make the PD port state string more friendly with console limited to
64-byte wide string (eg current USB console).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=on Smaug, open the USB-console to the EC and type "pd 0 state" and
see the current type-C port state string.
Change-Id: I6903fd0f0b7371aef978f696370a6e3a200c7fa5
Reviewed-on: https://chromium-review.googlesource.com/286785
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Fix hibernate so that plugging a USB-C charger properly wakes the
system. In addition, change the default hibernate behavior to restart
after wake.
BUG=chrome-os-partner:42104
TEST=Run 'hibernate' on Glados. Verify that wakes occur when power
button is pressed, lid switch is toggled, or when a charger is attached
to either USB-C port.
BRANCH=None
Change-Id: I54b8d58e20c35f25883238df24e7f23bb743abaa
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286660
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The same calculation is used across the code, so move it to a common
macro.
BUG=chrome-os-partner:42104
TEST=Verify Glados still boots AP.
BRANCH=None
Change-Id: I90da348f37fc670971737cfc5ddcfb9c34096c4b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286169
Reviewed-by: Alec Berg <alecaberg@chromium.org>
To meet Android HiFi requirement, set gyro range to +/-1000dps.
BRANCH=smaug
TEST=Check range is correct from user space.
BUG=chrome-os-partner:39900
Change-Id: I47541214c2242cfb4bba5ceb8a90f1ca63679e3c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286243
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Implemented mec1322's heavysleep in idle task to
reduce further EC power down on S3.
MEC1322 needs sleep-enabled for all blocks to
acheive max power down including UART.
Real heavysleep will be effective only when
console/uart is not active.
To enable this commit, board-specific commit is required.
For example, check commit, "Enabling heavysleep idle task at S3".
Test:
1. Put device into S3 mode by typing 'powerd_dbus_suspend" in Linux
shell.
2. wait at least 1 min till EC console sleeps
3. measure EC power.
Since idle task is continuously scheduled, EC will enters/exits
to/from heavy sleep mode frequently in S3 and power consumption
will be changed dynamically.
For acurate power measurement, high-sampling-rate measurement
system might be required and using DMM might not give accurate
number.
BUG=None
TEST=Tested on evt1p0/evt1p7/DVT
BRANCH=None
Change-Id: I435ca347cab2f4d51cefeee802c3bf30fb393fa1
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283603
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
There have been a few changes made to the sps driver recently, which
were not necessary but caused performance degradation: the continuous
loopback test is showing transmit underrun (0xff bytes stuck into the
frames).
This patch restores the driver to its state before the recent changes
and then makes a few modification to account for the new API:
- added a way to specify idle byte transmitted on MISO
- port number is dropped
The actual differences between the old and new version of the driver
can be seen as follows:
git diff dbf027f chip/g/sps.c
The restored driver passes the loopback test successfully.
BRANCH=none
BUG=none
TEST=used the enhanced 'spiraw' utility which sends frames of random
size in 10..1010 bytes, and then clocks the line to receive the
same amount of bytes back, syncs up in the returning stream of
bytes and compares received and transmitted data.
# run 'spst 100' on the target
$ src/examples/spiraw.py -l 100 -f 2000000
FT232H Future Technology Devices International, Ltd initialized at 2000000 hertz
$
which is an indication of the successful loop back of 100 frames.
The cli command on the target exits and reports the stats:
> spst 100
Processed 100 frames
rx count 108532, tx count 51366, tx_empty count 100, max rx batch 11
Before this change spiraw.py was reporting numerous mismatches on
the host side.
Change-Id: Iaa8c94e439ac32a6f10f12ddbdbf445865807386
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286015
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This commit adds the 8042 scancodes to the shared objects library saving
504 bytes from the RW image. To enable the space savings, define
CONFIG_SHAREDLIB in the target's board.h file.
BUG=none
BRANCH=none
TEST=make -j buildall tests
TEST=Built samus EC image and verified keyboard still worked in RO and
RW.
TEST=Built samus EC image with CONFIG_SHAREDLIB enabled and verified
that the keyboard still worked in RO and RW.
TEST=Enabled CONFIG_SHAREDLIB for glados and cyan and watched build
fail.
CQ-DEPEND=CL:275344
Change-Id: I1241506c6b34d63e270677d4e8d0531a8a4236c9
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/276212
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This commit introduces the macros needed for the shared objects library.
To enable the creation of the shared objects library for a particular
board, simply define it in board.h.
#define CONFIG_SHAREDLIB
In order to actually add objects to the shared library, one must utilize
the SHAREDLIB() macro around the definition of the object. All of the
objects in the shared library will be placed into a separate binary
which the RO and RW images link against. The SHAREDLIB() macro simply
adds this attribute and prevents the RO and RW images from compiling
them in. This library will reside at a fixed location in memory
(currently following the RO image) and the size of the library can be
defined on a board by board basis. For example, in board.h:
#undef CONFIG_SHAREDLIB_SIZE
#define CONFIG_SHAREDLIB_SIZE 0x800
For example,
# In foo/build.mk
foo-$(CONFIG_BAR)+=bar_sharedlib.o
# In foo/bar_sharedlib.c
#include "libsharedobjs.h"
SHAREDLIB(const uint8_t shared_var = 0x43);
# In include/bar_sharedlib.h
extern const uint8_t shared_var;
BUG=none
BRANCH=none
TEST=make -j buildall tests
TEST=Enabled config option and saw the sharedlib being created.
TEST=Enabled config option on unsupported board and saw build fail.
CQ-DEPEND=CL:274079
Change-Id: I2abeb1be248ab161fa81c897d2f5793f5a599456
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/275344
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs). The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.
Now, there are 3 make goals: ro, rw, and libsharedobjs.
In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.
NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.
BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).
CQ-DEPEND=CL:285934
Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Following features are enabled.
1. Initialise the ADC ports to avoid floating state due to thermistors.
2. Enable the daughter board volume buttons.
3. Enable the PMIC control support.
BUG=none
TEST=Device boots to UI.
BRANCH=none
Change-Id: I27907cb79e165ce6c3df9249a35904aa12717c95
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/284110
Reviewed-by: Shawn N <shawnn@chromium.org>
As of now this check results in false positives, for instance
'CONFIG_' found in the comments results in an error report.
This patch makes the script a bit more robust:
- consider only those options mentioned in include/config.h as
explicitly defined or undefined.
- do not scan include/config.h for new added CONFIG_ options
- ignore comments in .mk files
Ideally the script should be scanning only added lines of code and
much smarter about what should be considered a comment and what files
should be examined.
BRANCH=none
BUG=chromium:510672
TEST=the false positives triggered by comments in various build.mk
files are gone now. Adding an undescribed CONFIG_xxx text still
triggers the error.
Change-Id: Ib9858775bcd9899dec629682a1c7965e7c2fec96
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285926
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Since the interrupt generator is now spawned right after the hooks task
and the generator can generate interrupts whenever it wants, it's
possible for an interrupt to fire before task switching is enabled.
When this happens, the main thread needs to be suspended so that the IRQ
can be serviced.
BRANCH=None
BUG=None
TEST="make clobber && make -j buildall tests" several times."
Change-Id: I5fb4f17666e3db9c670c4352bb36b84e4606dfa0
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/285634
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* Fixes cyan/board.h to use correct SPI part
* Adds new flash protection regions in spi_flash_reg.c
* Sets SRP register in flash_physical_protect_at_boot()
* Fixes a bug in COMPARE_BIT macro
* Makes spi_flash_set_status() fail only when both HW pin is asserted
AND SRP(s) are set
* Makes sure set_flash_set_status() completes before returning
BUG=chrome-os-partner:40908
BRANCH=master
TEST=on Cyan:
With WP pin de-asserted:
flashrom -p ec --wp-enable
flashrom -p ec --wp-status, make sure it is enabled
flashrom -p ec --wp-disable
flashrom -p ec --status, make sure it is disabled
flashrom -p ec --wp-enable
Assert WP pin (either with screwdriver or dut-control)
flashrom -p ec --wp-disable
make sure it failed
Change-Id: I338cc906b73e723fdbb37f7c2fd0c4da358b6c8e
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276671
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
1. change I2C frequency to 400K.
2. include the support for other it83xx series.
3. add "chip erase" command if the erase size equals to
flash's physical size.
4. remove 50h command.
5. always check write enable bit of the status reg, after
write enable command.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=servo board + IT83xx EVB can erase, write, and read flash via i2c.
(iteflash --e, --w, and --r)
Change-Id: I0ac1eeaed5c243215d8817eb45b4b4fe0a7df26a
Reviewed-on: https://chromium-review.googlesource.com/283265
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Dino Li <dino.li@ite.com.tw>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Allow multiple GPIOs to wake the EC from hibernate by requiring boards
to define hibernate_wake_pins and hibernate_wake_pins_used. In addition,
clean up the GPIO-skipping hibernate code, and skip setting PCH_RTCRST
as an input due to a bug on certain boards.
BUG=chrome-os-partner:42104
TEST=Manual on Glados. Run 'hibernate' from EC console, verify that EC
wakes with power button press or with "dut-control lid_open:no".
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I13a6e062393cab8ed7129eda253585951f771109
Reviewed-on: https://chromium-review.googlesource.com/285924
Reviewed-by: Alec Berg <alecaberg@chromium.org>
To ease driver loading in the kernel, add a bit in the feature field
to indicate the EC has an internal software FIFO for sensor events.
BRANCH=smaug
BUG=chrome-os-partner:39900
TEST=compile, kernel modules load as expected on Smaug.
Change-Id: I1ae0b9ebb587bb4939745e8a0e16d73d95ba31d7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285774
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add VCONN type-C config option to set VCONN gpio as part
of type-C state machine.
BUG=chrome-os-partner:42321, chrome-os-partner:41838
BRANCH=none
TEST=make -j buildall
load onto glados, plug in hoho and make sure vconn gpio
is enabled
Change-Id: I8df13d58899e82af4c5975a68a014ccd82ae8e8c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285742
Reviewed-by: Shawn N <shawnn@chromium.org>
In order to support DMA transfers in one or both directions the usart
driver needs to be configurable with producer/consumer operations and
interrupt handler functions. These are now packaged up in the usart_rx
and usart_tx structs, and versions for interrupt driven RX and TX are
provided.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I3fd14c675c90873e903195b8e20d2070d2eda5ac
Reviewed-on: https://chromium-review.googlesource.com/285023
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Previously all access to the queue was done by adding or removing units
with no access to the underlying byte array, or ability to notify the
queue that the byte array had been updated. This prevented direct DMA
transfers to and from the underlying byte array.
This change adds a new struct, a queue_chunk, that represents a
contiguous region of the queues byte array. Regions of valid units as
well as free space can be requested. And there are now update functions
to signal to the queue that new units were added or existing units were
read from these chunks. A chunk can be queried and used to initialize
a DMA transfer, as interrupts or polling indicates that the DMA is
working the queue indicies can be updated and the policy activated as
needed.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I7e37d937c56153122f0a3c73ba8064b656106e3a
Reviewed-on: https://chromium-review.googlesource.com/285556
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Even a decent type-C device SHALL respond SNK_CAP query message when we are in
SRC_READY state, but in the case its mal implementation shouldn't get us being
trapped in an infinite loop of SRC_READY / SRC_GET_SNK_CAP states.
Introduce a counter to give up sending of SNK_CAP and just print a ERR
indication log when the partner device ignores SNK_CAP query.
BUG=none
BRANCH=samus
TEST=make buildall
manual testing against the failing USB-C device
Change-Id: I4c4251b2264230d7dd30bd2b9fc2b56027ff0d5a
Signed-off-by: Bernard Shyu <bernard_shyu@bizlinktech.com>
Reviewed-on: https://chromium-review.googlesource.com/284035
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
- Compass was not set properly if default config is set to
disable it (frequency == 0). We were trying to set it up
while stuck in debug mode.
- BMI150 FIFO collects sensor info even when suspended.
Ask FIFO to ommit suspended sensors.
- FIx compliation issue on nucleo-f411 board, where
MKBP is not enabled.
- Fix location of __packed arguement.
BRANCH=smaug
BUG=none
TEST=Check the compass is back with accelinfo,
FIFO is not filled with garbage with fiforead.
Check by echoing in in_accel_z_calibbias that the format
of MOTIONSENSE_CMD_SENSOR_OFFSET has not changed.
Change-Id: I7ebec12a14a74b8385b9f9532562a1fd0213f4d7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/284929
Reviewed-by: Alec Berg <alecaberg@chromium.org>
