BUG=chromium:769895
BRANCH=servo
TEST=On servo_v4, attach OEM Apple charger to power port and verify
negotiation to 9V and port / ILIM selection from charge_manager. Attach
samus to DUT port and verify 9V charging.
Change-Id: Icf16f6e8c99af4fbb48a83b7a36f550c20f5fd69
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/713944
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Instead of clearing out all the host events on S0ix wake, provide an
opportunity to the host to read the events and log it. Move the call
to clear events to the point where host sends a command indicating
exit from S0ix.
BUG=b:67874513
BRANCH=None
TEST=make -j buildall. Verified that host events are cleared by the
host during logging.
Change-Id: I339dc70d761bb851286d98c5c20094ccaefd238f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/724188
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
On Scarlet rev2, we see rt9467 has trouble
detecting VBUS level reliably.
Let's use TCPC to detect VBUS instead as we once
considered in b:65698085.
BUG=b:65698085, b:67917615
BRANCH=none
TEST=verify usb mouse and charging works through usb-c hub
Change-Id: I439cd3267bb26d5cdcbfd4a3c48179cf7942b870
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/725000
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Add a new mask type (ALWAYS_REPORT mask) that is set by default to
certain host events that should always be reported to the host
irrespective of the state of SCI, SMI and wake masks. This mask
includes host events like critical events resulting in shutdown or
reboot, events that are consumed by BIOS, etc.
Now that ALWAYS_REPORT mask is added, this change also updates the way
EC manages set/query operations for host events:
1. During set operation, EC will check if the host event is present in
any of the 4 masks - SCI, SMI, wake and always report. If yes, then it
is set in hostevents.
2. During query operation, EC will extract the lowest set event from
hostevents, clear it and return it back to the host.
In order to reflect the above change in EC behavior, a new feature bit
is used EC_FEATURE_UNIFIED_WAKE_MASKS. This allows the host to decide
when wake mask needs to be set before checking for host events.
BUG=None
BRANCH=None
TEST=make -j buildall. Also verified following:
1. Wake from S3 works as expected. Host is able to log correct wake
sources (Verified power button, lid open, base key press and tablet
mode change on soraka).
2. Wake from S5 works as expected. Host is able to log correct wake
sources (Verified power button, lid open on soraka).
3. Wake from S0ix works as expected (Verified power button, lid open
on soraka).
4. Software method to trigger recovery still works fine:
reboot ap-off
hostevent set 0x4000
powerb
Change-Id: I62e5c1f82247c82348cd019e082883d86ec2688f
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/719578
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
In some scenarios we want to take RW updates w/o taking version numbers into consideration,
much like the behavior we get w/ CR50_DEV.
But then without the additional CR50_DEV features enabled for the rest of the code.
BRANCH=none
BUG=none
TEST=compiles
Change-Id: I7dd946ab77bbdc35850ed934cd53735418e13845
Reviewed-on: https://chromium-review.googlesource.com/724967
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Marius Schilder <mschilder@chromium.org>
Trybot-Ready: Marius Schilder <mschilder@chromium.org>
On zoombini, we were taking enough power that the voltage dipped for a
little bit. This commit adds a 1 second delay after applying SPI VREF
but before actually flashing the EC.
BUG=b:65694390
BRANCH=None
TEST=`./util/flash_ec --board zoombini` still works.
Change-Id: I431cbfcc569fd5369971b06dedb85e8d5fdb9a32
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/722354
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
While introducing support for isl9238, I accidentally used an
incorrect config option (CONFIG_ISL9237), instead of
CONFIG_CHARGER_ISL9237.
BRANCH=none
BUG=b:35585464
TEST=make buildall -j
Fixes: b1101b8ed6 charger: isl923x: Add support for ISL9238
Change-Id: I2f62f3fbefbc60cc9d83726ef88a66c5c9f1b245
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/725121
Reviewed-by: Rong Chang <rongchang@chromium.org>
Instead of duplicating the handling of host events and host event
masks in chip lpc drivers, add routines in common code to provide
basic functions like setting/getting of masks, setting/getting of
events and handling of masks transitions across sysjump.
BUG=None
BRANCH=None
TEST=make -j buildall. Verified following:
1. Event masks are correctly retained across sysjumps.
2. Wake from S3 works fine.
3. Wake from S0ix works fine.
4. SCI generated correctly.
Change-Id: Ie409f91b12788e4b902b2627e31ba5ce40ff1d27
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/707771
Reviewed-by: Shawn N <shawnn@chromium.org>
It turns out the code logic is not exactly correct: the range for
coarse trim values is 0..0xFF.
Use the fixed top of the range value and do not print messages if the
value is at the range boundary.
BRANCH=cr50
BUG=b:67788437
TEST=Observed occasional messages on the Cr50 console when
plugging/unplugging Suzy-Q, but not the constant spew.
Change-Id: I94ab581769ba8326346b636b1342136e98d61ff1
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/723981
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This patch is to enable fan through PWM4 output and TACH feedback
from TA2 GPIOA6, and move EC_PLATFORM_RST to GPIO45.
BUG=b:64915426
BRANCH=None
TEST=emerge-fizz chromeos-ec and use fanduty and faninfo from EC
console to control and check fan status. Probed oscilloscope
on PWM output and checked the duty as expected. Made sure the
fan was stopped when DUT entered S3 and was running when DUT
resumed from S3.
Change-Id: I09f3ac43d2e4170b2aff3830f832bc5fd46a15c0
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/627542
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
It would be much easier to use the --rma command line option if it
allowed to pass the authentication code in a separate invocation.
This patch changes the behavior of the --rma command line option and
improves the help message to match actual features of gsctool.
When passed without an extra parameter it requests the Cr50 to
generate the RMA authentication challenge, prints the challenge on the
console as before, and then exits instead of waiting for the user to
enter the authentication code.
When the extra parameter is given, it is considered the authentication
code received from the server, the code is passed to the Cr50 and the
response is reported to the user.
BRANCH=none
BUG=b:37952913
TEST=verified the expected behavior:
localhost tmp # ./gsctool -r -t
Challenge:
CCYAQ 5ZUDP 9Q8NY S7TQR 7PVUR ETX7P T5YQK NGV9S
7TY8Z QY7H5 5DEH3 5EEWY UBJPA WN7YX SE35G TPS76
localhost tmp # ./gsctool -t -r EYE3E
Processing response...
rma unlock failed, code 1
localhost tmp # echo $?
3
localhost tmp # ./gsctool -t -r EYE3EWQG
Processing response...RMA unlock succeeded.
localhost tmp # echo $?
0
localhost tmp #
Change-Id: I2c61ff3a3ef1718eb4f192321bebd8caba388aeb
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722115
This is just a tweak marking pointers to the vendor command payloads
as const, as the command payloads are not supposed to be modified by
the communication layers.
BRANCH=none
BUG=none
TEST=make buildall -j; make -c ./extra/usb_updater
Change-Id: I68f15e8c77dc892173ff0241072128d960712a80
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722114
Reviewed-by: Andrey Pronin <apronin@chromium.org>
This patch adds EC_RW_B entry in the FMAP. This allows FAFT to locate
the RW_B image and manipulate it.
BUG=b:64614832,b:67748602
BRANCH=none
TEST=Run futility dump_fmap ec.bin.
Change-Id: I03aec945e0c8c3e08fc629a34ea6e5183bcccb61
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/722024
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In EFS, EC needs to sysjump to the active copy, which is hashed
and validated by the AP.
BUG=b:67748602
BRANCH=none
TEST=Verify Depthcharge makes EC jump to RW.
Change-Id: I2ca893f7691ad776a791f2044dd7a0983d06e3c5
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/717676
Requiring installation of the gsctool locally in the EC tree could
collide with debug versions or executables built for wrong
architectures.
Let's use the version installed in chroot and give user instructions
how to install it if it is not there.
BRANCH=cr50
BUG=none
TEST=verified that create_released_image.sh still works with the
chroot version of the tool
Change-Id: Ib155e166297d28c1660f7f33bb000b3bb8fe7a15
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/709739
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
In npcx5, the flash interface pinmux should be turned on in order to
access the external flash. However, in npcx7, the internal flash is
used. It is meaningless to turn the pinmux on. And it also causes the
alternative function of these pins not work normally(such as
GPIOA0/GPIOA2) if the pinmux is enabled. This CL uses the preprocessor
flag NPCX_INT_FLASH_SUPPORT to conditionally prohibit the execution of
flash pinmux code.
BRANCH=none
BUG=none
TEST=No build errors for "make buildall". Build npcx_evb and npcx7_evb
boards, make sure the pinmux are correctly configured seperately.
Change-Id: Iba2300159f204b65d15852ec1755714df0c64816
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/704316
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
They're of really little consequence right now since an error in
verify_flash() is only followed by resource tear down and process exit.
verify_flash could gain other call-sites though, so better be safe than
sorry.
BUG=none
BRANCH=none
TEST=none
Change-Id: I5fa8276dc3b3e124dacceca1ea857430982f7567
Found-by: Coverity Scan #141761, #141762
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/702482
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Chris Ching <chingcodes@chromium.org>
TCPM will retry sending of source caps on failure and retrying in TCPC
will cause us to violate PD_T_SEND_SOURCE_CAP.
BUG=None
TEST=Attach servo_v4 to twinkie, verify source caps are sent in ~100ms
intervals and not in bursts of four.
BRANCH=servo_v4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I3264e5578afbde7b9d2c003b6744974329a253d4
Reviewed-on: https://chromium-review.googlesource.com/719729
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The GPIO lines for the charger LED are being used as simple on/off and
no PWM control is used. Removed them from the pwm channel list so that
it reflects more accurately what PWM is used for on Coral.
BUG=b:64192049
BRANCH=None
TEST=make -j BOARD=coral
Change-Id: I3546001f96cb01f81fa1c373de28e460b63012c1
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/717187
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Robo devices have a power button LED. For these devices the desried
power button LED behavior is:
S0 -> always on
S3 -> charging, then 500 mSec off, 3 seconds on
S3 -> not charging, always off
S5 -> always off
Because the hook tick runs at 200 msec, using 600 msec for the off
period when blinking in S3.
BUG=b:64015212
BRANCH=None
TEST=Manual
This LED is not connected on EVT, so added a wire on GPIO02 and used a
scope. Verifed that in S0 the signal level is low, and in S3 that it
control signal toggles 600 mSec high/3 sec low. Verifed than in S5
control signal is high.
Change-Id: I72438a009a507fcddaae5a673bf3bc83988f2dd5
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/717183
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Previously, an error reading Board ID would prevent any image from
running, even a wildcard (unrestricted) image with mask=flags=0 which
would match any Board ID.
Now, if Board ID can't be read, match the image against
type=type_inv=flags=0. This will match only an unrestricted image.
(This is better than checking directly for an unrestricted image,
because that check is more susceptible to clock-jitter-induced errors.)
BUG=b:67651806
BRANCH=cr50
TEST=Hack read_board_id() to return error. See that an unrestricted
image will now boot.
Change-Id: I1071e146b4541e8efd50c8409b8f76012a107731
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/713574
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
This reverts commit df12bc1c02.
Reason for revert: the config flag is deprecated and should not use in any project.
Original change's description:
> hana: disable console input when system is locked
>
> Shipped devices were found that batteries could enter ship mode
> unexpectedly. Fail rate is about 5/700pcs per day. Failure happens
> when battery is charged fully and eneters sleep(mem), and then AC is
> plugged out.
> Battery ship mode is entered because ec execute console command
> "cutoff". Still do not know what causes that when no any device
> connected to servo board connector (console TX and RX are floated).
> Enable this config item will cut off route from RX input and fix
> the issue.
>
> BUG=b:67033247
> BRANCH=none
> TEST=with 50 DUTs, flash ec to DUTs and then lock the system, charge
> the battery from about 80% capacity to 100% capacity, close the lid
> for 20 minutes, unplug AC, boot the system, all DUTs boot, no DUT's
> battery enter ship mode. The same test repeats 3 times.
>
> Change-Id: I9939fed1467026bc2d85c645b6ecebae4b6796c6
> Signed-off-by: Chao Ge <chao.ge@bitland.com.cn>
> Reviewed-on: https://chromium-review.googlesource.com/693921
> Commit-Ready: ge chao <chao.ge@bitland.com.cn>
> Tested-by: ge chao <chao.ge@bitland.com.cn>
> Reviewed-by: Rong Chang <rongchang@chromium.org>
Bug: b:67033247
Change-Id: Ide8a3cc8d1eeee9914922d47ec12c44b7d0e9675
Reviewed-on: https://chromium-review.googlesource.com/718237
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
No Coral configurations will contain the ambient light sensor
(ALS). Therefore, no reason to have support for this in the board.c/.h
files.
BUG=b:38271876
BRANCH=eve
TEST=make -j BOARD=coral and verify no errors.
Change-Id: Ib8f6c546d5fb4d0bb8d37e84a62c4725e37be6f5
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/711196
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The new console command uses the alternative TPM command execution
path to generate the RMA challenge and also allows to verify the RMA
authentication code.
This patch also limits the rma challenge/auth code printouts to images
supporting debug features (built with CR50_DEV=1), and limits the code
included when building test images.
BRANCH=cr50
BUG=b:67008109
TEST=while running TCG tpm test ran the new console command multiple
times, observed all tests pass and the command always succeed.
Change-Id: I9ca3e86040d8adbdbe70f33cf2b317075f823f36
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/699524
Reviewed-by: Randall Spangler <rspangler@chromium.org>
The TPM task provides access to various cryptographic functions which
require huge stack size. Some other contexts might require to execute
these functions, but no other task in the system has enough stack.
The suggested solution is to create an alternative TPM task execution
path, where the command comes not from the communications interface
(SPI or I2C), but from another task in the system.
An interface function is created to allow a single task to pass the
command to the TPM task. The task requesting the alternative execution
path creates the command context, sends an event to the TPM task to
alert it to the presence of the command and then polls the flag
indicating that the TPM task has completed execution of the command.
BRANCH=cr50
BUG=b:67008109
TEST=tested after applying the next patch (add console command for
generating RMA auth challenge).
Change-Id: I168489a5fbb4a3e1d718198812019116738b2f61
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/699523
It was found on zoombini, when flashing via flash_ec failed, it would
prevent the board from booting as certain controls were left in their
"flashing" state. This was because these controls were missing from the
variables list which is what was used to restore the controls.
BUG=b:65694294
BRANCH=None
TEST=Attempt to flash zoombini without the flex connected. Attach the
servo flex, apply power, verify DUT boots up.
Change-Id: Ic2bc74ef1a61d4f10da6d3ceac77fbd373697838
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/714023
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This CL adds the config option CONFIG_DYNAMIC_MOTION_SENSOR_COUNT and
SKU table which contains the form factor for all known SKUs. Once the
SKU ID is known, the variable motion_sensor_count is set based on
CLAMSHELL or CONVERTIBLE designation in the SKU table. If there isn't
a matching SKU ID in the table then motion_sensor_count will be
initialized to the ARRAY_LENGTH of motion_sensors.
BUG=b:38271876
BRANCH=None
TEST=Manual
Tested with Robo360 (SKU ID 71) and verified the motion sensor count
and that the motion senors were initialized in the EC console log.
[0.088188 Motion Sensor Init: count = 3]
[0.346097 Lid Accel: MS Done Init type:0x0 range:2]
[0.370386 Base Accel: MS Done Init type:0x0 range:2]
[0.386790 Base Gyro: MS Done Init type:0x1 range:1000]
Tested with Santa EVT (SKU ID 3) and verified motion_sensor_count is 0 and
no EC console messages showing sensor initialization failures.
Change-Id: Ia3d60f8c8dd4435dd7cfb80a860f809de2fb931e
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/711195
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Fizz allocates 15W to the type-c port. This patch allows the port
to use it.
BUG=b:67682343
BRANCH=none
TEST=Verify 5V 3A PDO is offered.
Change-Id: I1560c0c7cb04379f5e4c9893753afe4a7f0cefe4
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/713583
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The default RTCCLK comes from LSI, which can vary from 30kHz to 60kHz.
To use stm32 RTC for applications requiring accurate timing, let's setup
LSE (a more accurate clock source) as RTCCLK.
Also fix a typo in register.h as 'BCDR' should be 'BDCR' globally.
BUG=b:63908519
BRANCH=none
TEST=boot scarlet rev1 and wait for an hour,
confirm rtc time == kernel system time.
Change-Id: If4728bdd3b6384316e5337004a49c172eaec869d
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/679601
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Shipped devices were found that batteries could enter ship mode
unexpectedly. Fail rate is about 5/700pcs per day. Failure happens
when battery is charged fully and eneters sleep(mem), and then AC is
plugged out.
Battery ship mode is entered because ec execute console command
"cutoff". Still do not know what causes that when no any device
connected to servo board connector (console TX and RX are floated).
Enable this config item will cut off route from RX input and fix
the issue.
BUG=b:67033247
BRANCH=none
TEST=with 50 DUTs, flash ec to DUTs and then lock the system, charge
the battery from about 80% capacity to 100% capacity, close the lid
for 20 minutes, unplug AC, boot the system, all DUTs boot, no DUT's
battery enter ship mode. The same test repeats 3 times.
Change-Id: I9939fed1467026bc2d85c645b6ecebae4b6796c6
Signed-off-by: Chao Ge <chao.ge@bitland.com.cn>
Reviewed-on: https://chromium-review.googlesource.com/693921
Commit-Ready: ge chao <chao.ge@bitland.com.cn>
Tested-by: ge chao <chao.ge@bitland.com.cn>
Reviewed-by: Rong Chang <rongchang@chromium.org>
The usb_updater utility has long been not just an updater, and has
long been using other interfaces in addition to USB. gsctool is a much
more suitable name.
CQ-DEPEND=CL:709776
BRANCH=cr50
BUG=b:67007500
TEST=verified that make -C ./extra/usb_updater generates
./extra/usb_updater/gsctool:
$ ./extra/usb_updater/gsctool --help
Usage: gsctool [options] <binary image>
This updates the Cr50 RW firmware over USB.
The required argument is the full RO+RW image.
Options:
[...]
$
Change-Id: I3ab70c28acf3664ddefaa923a87ba1fd5c3c437b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/709738
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
The Nasher simplo battery uses the Reneas fuel gauge. The table entry
for this battery had TI fuel gauge assumption. This CL modifies the FET
info to use register 0x43 and bits 1|0.
In addition added console log entry for the FET register, mask, and
expected value. In normal cases this log message will appear only
once, but when recovering from battery cutoff, will have have one
entry per call until the battery is no reporting as disconnected.
BUG=b:64887361
BRANCH=None
TEST=Using nasher proto system connected the SMP-SDI3.72
battery. Tested normal start up and after doing a battery cutoff.
Normal caseL:
[0.038624 found batt:SMP-SDI3.72}
[0.046017 SW 0x01]
[0.068892 hash start 0x00040000 0x00020d08]
[0.075775 Battery FET: reg 0x001b mask 0x0003 disc 0x0000]
After battery cutoff:
[0.146889 Battery FET: reg 0x0008 mask 0x0003 disc 0x0000]
[0.161523 Battery FET: reg 0x0008 mask 0x0003 disc 0x0000]
.
.
[0.476275 Battery FET: reg 0x001b mask 0x0003 disc 0x0000]
Change-Id: Ie378e9a795f543763a02c6c062235b265be0f71c
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/705260
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
