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3b101e56a9
Cortex-m0 we supports 2 bit priorities for the NVIC, yet we clear with 0x7 (3 bits). Change so we now clear with 0x3 Also limited priority to the max available (so we don't set extra bits we don't want or modulus the priority, otherwise setting priority 8 will actual give you priority 0) in both cortex-m and cortex-m0. BUG=None, discovered while looking at the code TEST=Should be no functional change, NVIC priorities should still work the same. BRANCH=None Change-Id: I31ba041449cae96983753b297e2631c310a406c4 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/236086 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
For an overview of the Embedded Controller firmware, refer to http://www.chromium.org/chromium-os/2014-firmware-summit