Kyoung Kim 80b997dc27 mec1322: fix gpio_disable_interrupt
MEC1322_INT_DISABLE(interrupt enable clear register) is 'Write 1 to Clear'
for each bit. To disable interrupt for specific GPIO pin, only specific
bit should be written with 1.

BUG=NONE
BRANCH=NONE
TEST=NONE

Change-Id: Ibf40a20656c4c99f9625b516cff3e7da9bf2f69d
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/309979
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
2015-11-03 09:08:07 -08:00
2015-11-03 09:08:07 -08:00
2015-11-01 19:45:58 -08:00
2015-05-07 00:00:47 +00:00
2015-08-15 01:32:39 +00:00
2015-10-30 23:02:23 -07:00
2012-05-11 09:11:52 -07:00
2014-04-02 19:58:53 +00:00
2014-05-15 05:20:14 +00:00

For an overview of the Embedded Controller firmware, refer to

http://www.chromium.org/chromium-os/2014-firmware-summit
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