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Author SHA1 Message Date
mike_ding
4be24ec9d2 Support for AP72TIP and AP72TIP-v4 on APNOS v4.x
Signed-off-by: mike_ding <mike_ding@sdc.sercomm.com>
2025-04-23 17:53:03 +08:00
25 changed files with 1398 additions and 9 deletions

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@@ -63,6 +63,17 @@ $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for WF189W
endef
define Package/ath12k-wifi-sercomm-ap72tip
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for AP72TIP
endef
define Package/ath12k-wifi-sercomm-ap72tip-v4
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for AP72TIP-v4
endef
define Package/ath12k-wifi-cig-wf189/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
@@ -110,9 +121,25 @@ define Package/ath12k-wifi-cig-wf189h/install
$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
endef
define Package/ath12k-wifi-sercomm-ap72tip/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.ap72tip.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.ap72tip.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef
define Package/ath12k-wifi-sercomm-ap72tip-v4/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.ap72tip-v4.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.ap72tip-v4.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189))
$(eval $(call BuildPackage,ath12k-wifi-edgecore-eap105))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap7110c-341x))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750w-311a))
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189w))
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189h))
$(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip))
$(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip-v4))

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@@ -0,0 +1,20 @@
[
{
"board": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=255"
],
"data": "ap72tip-IPQ5332.bin"
}
],
"regdb": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=255"
],
"data": "ipq5332.regdb"
}
]
}
]

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@@ -0,0 +1,20 @@
[
{
"board": [
{
"names": [
"bus=pci,qmi-chip-id=0,qmi-board-id=255"
],
"data": "ap72tip-QCN92XX.bin"
}
],
"regdb": [
{
"names": [
"bus=pci,qmi-chip-id=0,qmi-board-id=255"
],
"data": "qcn92xx.regdb"
}
]
}
]

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@@ -0,0 +1,20 @@
[
{
"board": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=255"
],
"data": "ap72tip-v4-IPQ5332.bin"
}
],
"regdb": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=255"
],
"data": "ipq5332.regdb"
}
]
}
]

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@@ -0,0 +1,20 @@
[
{
"board": [
{
"names": [
"bus=pci,qmi-chip-id=0,qmi-board-id=255"
],
"data": "ap72tip-v4-QCN92XX.bin"
}
],
"regdb": [
{
"names": [
"bus=pci,qmi-chip-id=0,qmi-board-id=255"
],
"data": "qcn92xx.regdb"
}
]
}
]

View File

@@ -9,3 +9,9 @@ $encoder -c board-2-eap105-QCN92XX.json -o board-2.bin.eap105.QCN92XX
$encoder -c board-2-rap7110c_341x-IPQ5332.json -o board-2.bin.rap7110c_341x.IPQ5332
$encoder -c board-2-rap7110c_341x-QCN92XX.json -o board-2.bin.rap7110c_341x.QCN92XX
$encoder -c board-2-ap72tip-IPQ5332.json -o board-2.bin.ap72tip.IPQ5332
$encoder -c board-2-ap72tip-QCN92XX.json -o board-2.bin.ap72tip.QCN92XX
$encoder -c board-2-ap72tip-v4-IPQ5332.json -o board-2.bin.ap72tip-v4.IPQ5332
$encoder -c board-2-ap72tip-v4-QCN92XX.json -o board-2.bin.ap72tip-v4.QCN92XX

View File

@@ -7,7 +7,9 @@ board_config_update
board=$(board_name)
case "$board" in
sercomm,ap72tip-v4|\
sercomm,ap72tip)
ucidef_set_led_default "power" "POWER" "blue:status" "on"
ucidef_set_led_netdev "wan_link" "wan_link" "green:phy" "eth0" "link"
ucidef_set_led_netdev "wan_act" "wan_act" "yellow:phy" "eth0" "rx tx"
;;

View File

@@ -29,6 +29,9 @@ ipq53xx_setup_interfaces()
ucidef_set_interfaces_lan_wan "eth1" "eth0"
ucidef_add_switch "switch1" "0u@eth1" "3:lan" "2:lan"
;;
sercomm,ap72tip-v4)
ucidef_set_interface_wan "eth0"
;;
esac
}
@@ -52,6 +55,13 @@ qcom_setup_macs()
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
;;
sercomm,ap72tip)
wan_mac=$(cat /sys/class/net/eth0/address)
lan_mac=$(cat /sys/class/net/eth1/address)
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
;;
edgecore,eap105)
wan_mac=$(cat /sys/class/net/eth0/address)
lan_mac=$(macaddr_add "$wan_mac" 1)
@@ -68,6 +78,12 @@ qcom_setup_macs()
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
;;
sercomm,ap72tip-v4)
wan_mac=$(cat /sys/class/net/eth0/address)
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 1)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 3)
;;
*)
wan_mac=$(cat /sys/class/net/eth1/address)
lan_mac=$(macaddr_add "$wan_mac" 1)

View File

@@ -31,6 +31,7 @@ ath12k/IPQ5332/hw1.0/caldata.bin)
cig,wf189h|\
cig,wf189|\
edgecore,eap105|\
sercomm,ap72tip-v4|\
sercomm,ap72tip)
caldata_extract "0:ART" 0x1000 0x20000
;;
@@ -46,6 +47,7 @@ ath12k/QCN92XX/hw1.0/cal-pci-0001:01:00.0.bin)
case "$board" in
cig,wf189|\
edgecore,eap105|\
sercomm,ap72tip-v4|\
sercomm,ap72tip)
caldata_extract "0:ART" 0x58800 0x2d000
;;

View File

@@ -120,5 +120,9 @@ platform_do_upgrade() {
sonicfi_dualimage_check
nand_upgrade_tar "$1"
;;
sercomm,ap72tip-v4|\
sercomm,ap72tip)
nand_upgrade_tar "$1"
;;
esac
}

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@@ -0,0 +1,591 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ5332 RDP468 board device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "ipq5332.dtsi"
#include "ipq5332-default-memory.dtsi"
/ {
model = "Sercomm WiFi-7";
compatible = "sercomm,ap72tip-v4", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
aliases {
serial0 = &blsp1_uart0; /*console*/
serial1 = &blsp1_uart1; /*ble*/
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
stdout-path = "serial0";
};
soc@0 {
#if 0 //AQR114C
mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 0 GPIO_ACTIVE_LOW>;
phyaddr_fixup = <0xC90F018>;
uniphyaddr_fixup = <0xC90F014>;
mdio_clk_fixup; /* MDIO clock sequence fix up flag */
status = "okay";
phy0: ethernet-phy@0 {
reg = <24>;
};
phy1: ethernet-phy@1 { //aqr114c
reg = <0>;
compatible ="ethernet-phy-ieee802.3-c45";
};
};
ess-instance {
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x0>; /* lan port bitmap */
switch_wan_bmp = <0x6>; /* wan port bitmap */
switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <24>;
mdiobus = <&mdio>;
};
port@1 { //aqr114c
port_id = <2>;
phy_address = <0>;
mdiobus = <&mdio>;
ethernet-phy-ieee802.3-c45;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <24>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a504000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,phy-mdio-addr = <0>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
#else //SFP
mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
/*gpio0 for napa*/
phy-reset-gpio = <&tlmm 0 GPIO_ACTIVE_LOW>;
status = "okay";
phy0: ethernet-phy@0 {
reg = <24>;
};
};
ess-instance {
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x0>; /* lan port bitmap */
switch_wan_bmp = <0x6>; /* wan port bitmap */
switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1 sfp PORT_WRAPPER_10GBASE_R*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <24>;
mdiobus = <&mdio>;
};
port@1 {
port_id = <2>;
phy_address = <30>;
media-type = "sfp";
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <24>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a504000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <30>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
#endif
/* EDMA host driver configuration for the board */
edma@3ab00000 {
qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
qcom,rx-queue-start = <0>; /* Rx queue start */
qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
<0 164 4>, /* Tx complete ring id #5 IRQ info */
<0 165 4>, /* Tx complete ring id #6 IRQ info */
<0 166 4>, /* Tx complete ring id #7 IRQ info */
<0 167 4>, /* Tx complete ring id #8 IRQ info */
<0 168 4>, /* Tx complete ring id #9 IRQ info */
<0 169 4>, /* Tx complete ring id #10 IRQ info */
<0 170 4>, /* Tx complete ring id #11 IRQ info */
<0 171 4>, /* Tx complete ring id #12 IRQ info */
<0 172 4>, /* Tx complete ring id #13 IRQ info */
<0 173 4>, /* Tx complete ring id #14 IRQ info */
<0 174 4>, /* Tx complete ring id #15 IRQ info */
<0 139 4>, /* Rx desc ring id #12 IRQ info */
<0 140 4>, /* Rx desc ring id #13 IRQ info */
<0 141 4>, /* Rx desc ring id #14 IRQ info */
<0 142 4>, /* Rx desc ring id #15 IRQ info */
<0 191 4>, /* Misc error IRQ info */
<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
};
leds {
compatible = "gpio-leds";
led@25 {
label = "blue:status";
gpios = <&tca6416 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@61 {
label = "green:phy";
gpios = <&tca6416 15 GPIO_ACTIVE_HIGH>;
};
led@62 {
label = "yellow:phy";
gpios = <&tca6416 14 GPIO_ACTIVE_HIGH>;
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "rst";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
wsi: wsi {
id = <0>;
num_chip = <2>;
status = "okay";
chip_info = <0 1 1>,
<1 1 0>;
};
};
};
&wifi0 {
// led-gpio = <&tlmm 36 GPIO_ACTIVE_HIGH>;
qcom,rproc = <&q6_wcss_pd1>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
memory-region = <&q6_region>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <0>;
qcom,board_id = <0x16>;
status = "okay";
};
&qcn9224_pcie1 {
status = "okay";
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "disabled";
};
&blsp1_i2c2 {
clock-frequency = <400000>;
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
tca6416: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
};
&blsp1_spi0 { //nor flash
pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "n25q128a11";
//, "jedec,spi-nor";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
};
};
&blsp1_spi1 { /*tpm*/
pinctrl-0 = <&spi_1_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "okay";
tpm: spi-tpm@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,st33htpm-spi";
reg = <0>;
spi-max-frequency = <20000000>;
status = "okay";
};
};
&pcm {
pinctrl-0 = <&audio_pins_pri>;
pinctrl-names = "primary";
status = "disabled";
};
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
status = "disabled";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo {
clock-frequency = <24000000>;
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qspi_default_state>;
pinctrl-names = "default";
status = "okay";
nandcs@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&pcie1_phy_x2 {
status = "okay";
};
&pcie1 {
pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
status = "okay";
pcie1_rp {
reg = <0 0 0 0 0>;
qcom,mhi@1 {
reg = <0 0 0 0 0>;
boot-args = <0x2 0x4 0x34 0x3 0x0 0x0 /* MX Rail, GPIO52, Drive strength 0x3 */
0x4 0x4 0x18 0x3 0x0 0x0 /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
memory-region = <&qcn9224_pcie1>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <1>;
qcom,board_id = <0x100f>; //0x1019->0x100f
};
};
};
/* PINCTRL */
&tlmm {
audio_pins_pri: audio_pinmux_pri {
mux_1 {
pins = "gpio29";
function = "audio_pri";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio30";
function = "audio_pri";
drive-strength = <8>;
bias-pull-down;
};
mux_3 {
pins = "gpio31";
function = "audio_pri";
drive-strength = <4>;
bias-pull-down;
};
mux_4 {
pins = "gpio32";
function = "audio_pri";
drive-strength = <4>;
bias-pull-down;
};
};
i2c_0_pins: i2c-0-state {
pins = "gpio43", "gpio45";
function = "blsp2_i2c0";
drive-strength = <8>;
bias-pull-up;
};
spi_1_pins: spi-1-pins { /* tpm */
pins = "gpio29", "gpio30", "gpio31", "gpio32";
function = "blsp1_spi0";
drive-strength = <8>;
bias-pull-down;
};
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio13";
function = "sdc_clk";
drive-strength = <8>;
bias-disable;
};
cmd-pins {
pins = "gpio12";
function = "sdc_cmd";
drive-strength = <8>;
bias-pull-up;
};
data-pins {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "sdc_data";
drive-strength = <8>;
bias-pull-up;
};
};
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-down;
};
spi_0_cs_pins: spi-0-cs-state {
pins = "gpio17";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-up;
};
qspi_default_state: qspi-default-state {
qspi_clock {
pins = "gpio13";
function = "qspi_clk";
drive-strength = <8>;
bias-pull-down;
};
qspi_cs {
pins = "gpio12";
function = "qspi_cs";
drive-strength = <8>;
bias-pull-up;
};
qspi_data {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "qspi_data";
drive-strength = <8>;
bias-pull-down;
};
};
serial_1_pins: serial1-pinmux { /*ble*/
// pins = "gpio33", "gpio34", "gpio35", "gpio36";
pins = "gpio33", "gpio35";
function = "blsp1_uart2";
drive-strength = <8>;
bias-pull-up;
};
/* gpio_leds_default: gpio-leds-default-state {
pins = "gpio36";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};*/
button_pins: button-state {
pins = "gpio1";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
pwm_pins: pwm-state {
pins = "gpio46";
function = "pwm0";
drive-strength = <8>;
};
pcie1_default_state: pcie1-default-state {
pins = "gpio47";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-low;
};
};
&license_manager {
status = "okay";
};
&usb3 {
qcom,multiplexed-phy;
status = "okay";
};
&pwm {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
status = "okay";
};
&hs_m31phy_0 {
status = "okay";
};
&ssuniphy_0 {
status = "okay";
};
//sercomm add
&wifi3 {
/* QCN9224 5G+6G */
hremote_node = <&qcn9224_pcie1>;
qcom,board_id = <0x100f>;
status = "okay";
};

View File

@@ -0,0 +1,601 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ5332 RDP468 board device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "ipq5332.dtsi"
#include "ipq5332-default-memory.dtsi"
/ {
model = "Sercomm WiFi-7";
compatible = "sercomm,ap72tip", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
aliases {
serial0 = &blsp1_uart0; /*console*/
serial1 = &blsp1_uart1; /*ble*/
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
stdout-path = "serial0";
};
soc@0 {
#if 1 //AQR114C
mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 0 GPIO_ACTIVE_LOW>;
phyaddr_fixup = <0xC90F018>;
uniphyaddr_fixup = <0xC90F014>;
mdio_clk_fixup; /* MDIO clock sequence fix up flag */
status = "okay";
phy0: ethernet-phy@0 {
reg = <24>;
};
phy1: ethernet-phy@1 { //aqr114c
reg = <0>;
compatible ="ethernet-phy-ieee802.3-c45";
};
};
ess-instance {
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x0>; /* lan port bitmap */
switch_wan_bmp = <0x6>; /* wan port bitmap */
switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <24>;
mdiobus = <&mdio>;
};
port@1 { //aqr114c
port_id = <2>;
phy_address = <0>;
mdiobus = <&mdio>;
ethernet-phy-ieee802.3-c45;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <24>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a504000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,phy-mdio-addr = <0>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
#else //SFP
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <24>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a504000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <30>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
mdio:mdio@90000 {
status = "okay";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
/*gpio0 for napa*/
phy-reset-gpio = <&tlmm 0 0>;
phy0: ethernet-phy@0 {
reg = <24>;
};
};
ess-instance {
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x0>; /* lan port bitmap */
switch_wan_bmp = <0x6>; /* wan port bitmap */
switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1 sfp PORT_WRAPPER_10GBASE_R*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <24>;
};
port@1 {
port_id = <2>;
phy_address = <30>;
media-type = "sfp";
};
};
};
};
#endif
/* EDMA host driver configuration for the board */
edma@3ab00000 {
qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
qcom,rx-queue-start = <0>; /* Rx queue start */
qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
<0 164 4>, /* Tx complete ring id #5 IRQ info */
<0 165 4>, /* Tx complete ring id #6 IRQ info */
<0 166 4>, /* Tx complete ring id #7 IRQ info */
<0 167 4>, /* Tx complete ring id #8 IRQ info */
<0 168 4>, /* Tx complete ring id #9 IRQ info */
<0 169 4>, /* Tx complete ring id #10 IRQ info */
<0 170 4>, /* Tx complete ring id #11 IRQ info */
<0 171 4>, /* Tx complete ring id #12 IRQ info */
<0 172 4>, /* Tx complete ring id #13 IRQ info */
<0 173 4>, /* Tx complete ring id #14 IRQ info */
<0 174 4>, /* Tx complete ring id #15 IRQ info */
<0 139 4>, /* Rx desc ring id #12 IRQ info */
<0 140 4>, /* Rx desc ring id #13 IRQ info */
<0 141 4>, /* Rx desc ring id #14 IRQ info */
<0 142 4>, /* Rx desc ring id #15 IRQ info */
<0 191 4>, /* Misc error IRQ info */
<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
};
leds {
compatible = "gpio-leds";
led@25 {
label = "blue:status";
gpios = <&tca6416 9 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@24 {
label = "red:status";
gpios = <&tca6416 10 GPIO_ACTIVE_HIGH>;
};
led_power: led@16 {
label = "green:status";
gpios = <&tca6416 11 GPIO_ACTIVE_HIGH>;
};
led@61 {
label = "green:phy";
gpios = <&tca6416 15 GPIO_ACTIVE_HIGH>;
};
led@62 {
label = "yellow:phy";
gpios = <&tca6416 14 GPIO_ACTIVE_HIGH>;
};
};
/*
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "rst";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};*/
wsi: wsi {
id = <0>;
num_chip = <2>;
status = "okay";
chip_info = <0 1 1>,
<1 1 0>;
};
};
};
&wifi0 {
// led-gpio = <&tlmm 36 GPIO_ACTIVE_HIGH>;
qcom,rproc = <&q6_wcss_pd1>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
memory-region = <&q6_region>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <0>;
qcom,board_id = <0x16>;
status = "okay";
};
&qcn9224_pcie1 {
status = "okay";
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "disabled";
};
&blsp1_i2c2 {
clock-frequency = <400000>;
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
tca6416: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
};
&blsp1_spi0 { //nor flash
pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "n25q128a11";
//, "jedec,spi-nor";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
};
};
&blsp1_spi1 { /*tpm*/
pinctrl-0 = <&spi_1_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "okay";
tpm: spi-tpm@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,st33htpm-spi";
reg = <0>;
spi-max-frequency = <20000000>;
status = "okay";
};
};
&pcm {
pinctrl-0 = <&audio_pins_pri>;
pinctrl-names = "primary";
status = "disabled";
};
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
status = "disabled";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo {
clock-frequency = <24000000>;
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qspi_default_state>;
pinctrl-names = "default";
status = "okay";
nandcs@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&pcie1_phy_x2 {
status = "okay";
};
&pcie1 {
pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
status = "okay";
pcie1_rp {
reg = <0 0 0 0 0>;
qcom,mhi@1 {
reg = <0 0 0 0 0>;
boot-args = <0x2 0x4 0x34 0x3 0x0 0x0 /* MX Rail, GPIO52, Drive strength 0x3 */
0x4 0x4 0x18 0x3 0x0 0x0 /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
memory-region = <&qcn9224_pcie1>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <1>;
qcom,board_id = <0x100f>; //0x1019->0x100f
};
};
};
/* PINCTRL */
&tlmm {
audio_pins_pri: audio_pinmux_pri {
mux_1 {
pins = "gpio29";
function = "audio_pri";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio30";
function = "audio_pri";
drive-strength = <8>;
bias-pull-down;
};
mux_3 {
pins = "gpio31";
function = "audio_pri";
drive-strength = <4>;
bias-pull-down;
};
mux_4 {
pins = "gpio32";
function = "audio_pri";
drive-strength = <4>;
bias-pull-down;
};
};
i2c_0_pins: i2c-0-state {
pins = "gpio43", "gpio45";
function = "blsp2_i2c0";
drive-strength = <8>;
bias-pull-up;
};
spi_1_pins: spi-1-pins { /* tpm */
pins = "gpio29", "gpio30", "gpio31", "gpio32";
function = "blsp1_spi0";
drive-strength = <8>;
bias-pull-down;
};
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio13";
function = "sdc_clk";
drive-strength = <8>;
bias-disable;
};
cmd-pins {
pins = "gpio12";
function = "sdc_cmd";
drive-strength = <8>;
bias-pull-up;
};
data-pins {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "sdc_data";
drive-strength = <8>;
bias-pull-up;
};
};
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-down;
};
spi_0_cs_pins: spi-0-cs-state {
pins = "gpio17";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-up;
};
qspi_default_state: qspi-default-state {
qspi_clock {
pins = "gpio13";
function = "qspi_clk";
drive-strength = <8>;
bias-pull-down;
};
qspi_cs {
pins = "gpio12";
function = "qspi_cs";
drive-strength = <8>;
bias-pull-up;
};
qspi_data {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "qspi_data";
drive-strength = <8>;
bias-pull-down;
};
};
serial_1_pins: serial1-pinmux { /*ble*/
// pins = "gpio33", "gpio34", "gpio35", "gpio36";
pins = "gpio33", "gpio35";
function = "blsp1_uart2";
drive-strength = <8>;
bias-pull-up;
};
/* gpio_leds_default: gpio-leds-default-state {
pins = "gpio36";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};*/
/*
button_pins: button-state {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};*/
pwm_pins: pwm-state {
pins = "gpio46";
function = "pwm0";
drive-strength = <8>;
};
pcie1_default_state: pcie1-default-state {
pins = "gpio47";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-low;
};
};
&license_manager {
status = "okay";
};
&usb3 {
qcom,multiplexed-phy;
status = "okay";
};
&pwm {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
status = "okay";
};
&hs_m31phy_0 {
status = "okay";
};
&ssuniphy_0 {
status = "okay";
};
//sercomm add
&wifi3 {
/* QCN9224 5G+6G */
hremote_node = <&qcn9224_pcie1>;
qcom,board_id = <0x100f>;
status = "okay";
};

View File

@@ -736,6 +736,36 @@
status = "disabled";
};
blsp1_spi1: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x078b6000 0x600>;
interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 6>, <&blsp_dma 7>;
dma-names = "tx", "rx";
status = "disabled";
};
blsp1_i2c2: i2c@78b7000 {
compatible = "qcom,i2c-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b7000 0x600>;
interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
clock-names = "iface", "core";
clock-frequency = <400000>;
dmas = <&blsp_dma 8>, <&blsp_dma 9>;
dma-names = "rx", "tx";
status = "disabled";
};
blsp1_i2c1: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b6000 0x600>;

View File

@@ -2288,7 +2288,7 @@ CONFIG_GPIOLIB_FASTPATH_LIMIT=512
# CONFIG_GPIO_ML_IOH is not set
# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_MPC8XXX is not set
# CONFIG_GPIO_PCA953X is not set
CONFIG_GPIO_PCA953X=y
# CONFIG_GPIO_PCA953X_IRQ is not set
# CONFIG_GPIO_PCA9570 is not set
# CONFIG_GPIO_PCF857X is not set

View File

@@ -14,16 +14,30 @@ endef
TARGET_DEVICES += cig_wf189
define Device/sercomm_ap72tip
DEVICE_TITLE := Sercomm AP72 TIP
DEVICE_TITLE := Sercomm AP72TIP
DEVICE_DTS := ipq5332-sercomm-ap72tip
DEVICE_DTS_CONFIG := config@mi01.2-qcn9160-c1
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_CONFIG := config@mi01.6
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
IMAGE/nand-factory.ubi := append-ubi
DEVICE_PACKAGES := ath12k-wifi-sercomm-ap72tip ath12k-firmware-qcn92xx ath12k-firmware-ipq5332
endef
#TARGET_DEVICES += sercomm_ap72tip
TARGET_DEVICES += sercomm_ap72tip
define Device/sercomm_ap72tip-v4
DEVICE_TITLE := Sercomm AP72TIP-v4
DEVICE_DTS := ipq5332-sercomm-ap72tip-v4
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_CONFIG := config@mi01.6
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
IMAGE/nand-factory.ubi := append-ubi
DEVICE_PACKAGES := ath12k-wifi-sercomm-ap72tip-v4 ath12k-firmware-qcn92xx ath12k-firmware-ipq5332
endef
TARGET_DEVICES += sercomm_ap72tip-v4
define Device/edgecore_eap105
DEVICE_TITLE := Edgecore EAP105

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@@ -0,0 +1,16 @@
---
profile: sercomm_ap72tip-v4
target: ipq53xx
subtarget: generic
description: Build image for the Sercomm AP72TIP-v4
image: bin/targets/ipq53xx/generic/openwrt-ipq53xx-sercomm_ap72tip-v4-squashfs-sysupgrade.tar
feeds:
- name: qca
path: ../../feeds/qca-wifi-7
include:
- ucentral-ap
packages:
- ipq53xx
- qca-ssdk-shell
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0

View File

@@ -2,14 +2,14 @@
profile: sercomm_ap72tip
target: ipq53xx
subtarget: generic
description: Build image for the Sercomm AP72 TIP
description: Build image for the Sercomm AP72TIP
image: bin/targets/ipq53xx/generic/openwrt-ipq53xx-sercomm_ap72tip-squashfs-sysupgrade.tar
feeds:
- name: ipq95xx
path: ../../feeds/ipq95xx
packages:
- ipq53xx
- name: qca
path: ../../feeds/qca-wifi-7
include:
- ucentral-ap
packages:
- ipq53xx
diffconfig: |
CONFIG_KERNEL_IPQ_MEM_PROFILE=0