ipq807x_v5.4/ipq50xx: When device is booting, it causes lan/wan ports bridge together

Fixes: WIFI-14849
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>

feeds/hostapd/hostapd/patches/zzzz-002-initialize-mode-for-hostapd-cli-chan-switch.patch

@@ -0,0 +1,14 @@
+--- a/hostapd/ctrl_iface.c	2025-09-24 14:15:25.135668867 +0800
++++ b/hostapd/ctrl_iface.c	2025-09-24 15:32:46.082317382 +0800
+@@ -2657,6 +2657,11 @@ static int hostapd_ctrl_iface_chan_switc
+ 		break;
+ 	}
+ 
++    /* Initialize HT/VHT/HE parameters */
++    settings.freq_params.ht_enabled = iface->conf->ieee80211n;
++    settings.freq_params.vht_enabled = iface->conf->ieee80211ac;
++    settings.freq_params.he_enabled = iface->conf->ieee80211ax;
++
+ 	if (settings.freq_params.center_freq1)
+ 		dfs_range += hostapd_is_dfs_overlap(
+ 			iface, bandwidth, settings.freq_params.center_freq1);

feeds/ipq807x_v5.4/ath11k-wifi/Makefile

@@ -47,6 +47,11 @@ ALLWIFIBOARDS:= \
 	indio-um-310ax-v1 \
 	indio-um-510axp-v1 \
 	indio-um-510axm-v1 \
+	indio-um-325ax-v2 \
+	indio-um-335ax \
+	indio-um-345ax \
+	indio-um-525axp \
+	indio-um-525axm \
 	muxi-ap3220l \
 	plasmacloud-pax1800 \
 	wallys-dr5018 \
@@ -441,6 +446,11 @@ $(eval $(call generate-ath11k-wifi-package,liteon-wpx8324,Liteon WPX8324))
 $(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
 $(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
 $(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1))
+$(eval $(call generate-ath11k-wifi-package,indio-um-325ax-v2,Indio UM-325AX V2))
+$(eval $(call generate-ath11k-wifi-package,indio-um-335ax,Indio UM-335AX))
+$(eval $(call generate-ath11k-wifi-package,indio-um-345ax,Indio UM-345AX))
+$(eval $(call generate-ath11k-wifi-package,indio-um-525axp,Indio UM-525AXP))
+$(eval $(call generate-ath11k-wifi-package,indio-um-525axm,Indio UM-525AXM))
 $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
 $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
 $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-312g,Sonicfi RAP630W 312G))

feeds/ipq807x_v5.4/ipq50xx/Makefile

@@ -27,6 +27,7 @@ DEFAULT_PACKAGES += kmod-qca-nss-dp kmod-qca-ssdk swconfig \
 	kmod-ath11k-ahb  ath11k-firmware-ipq5018 \
 	kmod-gpio-button-hotplug iwinfo \
 	qca-ssdk-shell kmod-bootconfig \
-	uboot-envtools -procd-ujail
+	uboot-envtools -procd-ujail \
+	kmod-mdio-qca
 
 $(eval $(call BuildTarget))

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/board.d/01_leds

@@ -16,6 +16,14 @@ edgecore,eap104)
 	ucidef_set_led_netdev "wan" "wan" "yellow:uplink" "eth0"
         ucidef_set_led_default "power" "POWER" "green:power" "on"
 	;;
+indio,um-325ax-v2|\
+indio,um-335ax|\
+indio,um-525axm|\
+indio,um-525axp)
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "led_2g" "phy0tpt"
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "led_5g" "phy1tpt"
+	ucidef_set_led_default "power" "POWER" "led_sys" "on"
+	;;
 cig,wf186h|\
 cig,wf186w)
         ucidef_set_led_default "power" "POWER" "green:status" "on"

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/board.d/02_network

@@ -48,6 +48,15 @@ qcom_setup_interfaces()
 		ucidef_add_switch "switch1" \
 			"6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
 		;;
+	indio,um-325ax-v2|\
+	indio,um-335ax|\
+	indio,um-525axm|\
+	indio,um-525axp)
+		ucidef_set_interface_wan "eth1"
+		ucidef_set_interface_lan "eth0"
+		ucidef_add_switch "switch1" \
+			"6@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
+		;;
 	emplus,wap385c|\
 	hfcl,ion4x_w|\
 	hfcl,ion4xi_w)

feeds/ipq807x_v5.4/ipq50xx/base-files/etc/hotplug.d/firmware/10-ath11k-caldata

@@ -142,6 +142,10 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
 	emplus,wap385c|\
 	hfcl,ion4x_w|\
 	hfcl,ion4xi_w|\
+	indio,um-325ax-v2|\
+	indio,um-335ax|\
+	indio,um-525axm|\
+	indio,um-525axp|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
 	optimcloud,d50|\
@@ -183,6 +187,9 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
 	;;
 ath11k/qcn6122/hw1.0/caldata_2.bin)
 	case "$board" in
+	indio,um-325ax-v2|\
+	indio,um-525axm|\
+	indio,um-525axp|\
 	wallys,dr5018|\
 	edgecore,eap104|\
 	edgecore,oap101-6e|\
@@ -201,6 +208,7 @@ ath11k/qcn6122/hw1.0/caldata_2.bin)
 	;;
 ath11k/QCN9074/hw1.0/caldata_1.bin)
 	case "$board" in
+	indio,um-335ax|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
 	optimcloud,d50|\
@@ -234,6 +242,9 @@ ath11k-macs)
 	edgecore,oap101|\
 	edgecore,oap101-6e|\
 	edgecore,oap101e-6e|\
+	indio,um-325ax-v2|\
+	indio,um-525axp|\
+	indio,um-525axm|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
 	optimcloud,d50|\

feeds/ipq807x_v5.4/ipq50xx/base-files/lib/upgrade/platform.sh

@@ -81,6 +81,10 @@ platform_check_image() {
 	wallys,dr5018|\
 	hfcl,ion4x_w|\
 	hfcl,ion4xi_w|\
+	indio,um-325ax-v2|\
+	indio,um-335ax|\
+	indio,um-525axp|\
+	indio,um-525axm|\
 	optimcloud,d60|\
 	optimcloud,d60-5g|\
 	optimcloud,d50|\
@@ -107,6 +111,10 @@ platform_do_upgrade() {
 
 	board=$(board_name)
 	case $board in
+	indio,um-325ax-v2|\
+	indio,um-335ax|\
+	indio,um-525axp|\
+	indio,um-525axm|\
 	edgecore,oap101|\
 	edgecore,oap101-6e|\
 	edgecore,oap101e|\

feeds/ipq807x_v5.4/ipq50xx/config-5.4

@@ -635,7 +635,7 @@ CONFIG_MDIO_BITBANG=y
 CONFIG_MDIO_BOARDINFO=y
 # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
 CONFIG_MDIO_GPIO=y
-CONFIG_MDIO_QCA=y
+CONFIG_MDIO_QCA=m
 # CONFIG_MDM_GCC_9615 is not set
 # CONFIG_MDM_LCC_9615 is not set
 # CONFIG_MEMORY_HOTPLUG is not set

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-eww631-b1.dts

@@ -391,8 +391,8 @@
 				mdio-bus = <&mdio1>;
 				reset_gpio = <&tlmm 0x26 0>;
 				switch_cpu_bmp = <0x40>;  /* cpu port bitmap (Port 6 GMAC) */
-				switch_lan_bmp = <0x3c>; /* lan port bitmap */
-				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				switch_lan_bmp = <0x1c>; /* lan port bitmap */
+				switch_wan_bmp = <0x20>;  /* wan port bitmap */
 				qca,ar8327-initvals = <
 						0x00004 0x7600000   /* PAD0_MODE */
 						0x00008 0x1000000   /* PAD5_MODE */

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-indio-um-325ax-v2.dts

@@ -0,0 +1,941 @@
+/dts-v1/;
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq5018.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Indio UM-325AX V2";
+	compatible = "indio,um-325ax-v2", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
+		serial0 = &blsp1_uart1;
+		serial1 = &blsp1_uart2;
+		ethernet0 = "/soc/dp1";
+		ethernet1 = "/soc/dp2";
+                //led-failsafe = &led_red;
+                //led-running = &led_green;
+                //led-upgrade = &led_green;
+                //led-gateway = &led_blue;
+                //led-factory = &led_blue;
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		bootargs-append = " swiotlb=1";
+	#else
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+	#endif
+		stdout-path = "serial0";
+	};
+
+	reserved-memory {
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+	/*                   256 MB Profile
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |           8MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x40800000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D100000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D300000  |          15MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4E400000  |          15MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4F300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4F400000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x4500000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x1400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xD00000>;
+		};
+
+		m3_dump: m3_dump@4D100000 {
+			no-map;
+			reg = <0x0 0x4D100000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0xF00000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
+			no-map;
+			reg = <0x0 0x4E200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
+			no-map;
+			reg = <0x0 0x4E300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
+			no-map;
+			reg = <0x0 0x4E400000 0x0 0xF00000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
+			no-map;
+			reg = <0x0 0x4F300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
+			no-map;
+			reg = <0x0 0x4F400000 0x0 0x100000>;
+		};
+		
+	#else
+	/*                 512MB/1GB Profiles
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x41000000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          14MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  Caldb   |  0x4D400000  |           2MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D600000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E600000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E700000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  Caldb   |  0x4E800000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4ED00000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4FD00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4FE00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  Caldb   |  0x4FF00000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x5400000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 01400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xE00000>;
+		};
+
+		m3_dump: m3_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0x100000>;
+		};
+
+		q6_caldb_region: q6_caldb_region@4D400000 {
+			no-map;
+			reg = <0x0 0x4D400000 0x0 0x200000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
+			no-map;
+			reg = <0x0 0x4D600000 0x0 0x1000000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
+			no-map;
+			reg = <0x0 0x4E600000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
+			no-map;
+			reg = <0x0 0x4E700000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
+			no-map;
+			reg = <0x0 0x4E800000 0x0 0x500000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
+			no-map;
+			reg = <0x0 0x4ED00000 0x0 0x1000000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
+			no-map;
+			reg = <0x0 0x4FD00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
+			no-map;
+			reg = <0x0 0x4FE00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
+			no-map;
+			reg = <0x0 0x4FF00000 0x0 0x500000>;
+		};
+
+	#endif
+	};
+
+	soc {
+		gpio-watchdog {
+			compatible = "linux,wdt-gpio";
+			gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
+			hw_algo = "toggle";
+			hw_margin_ms = <5000>;
+			always-running;
+		};
+
+		serial@78af000 {
+			status = "ok";
+		};
+
+		blsp1_uart2: serial@78b0000 {
+			pinctrl-0 = <&blsp1_uart_pins>;
+			pinctrl-names = "default";
+		};
+
+		qpic_bam: dma@7984000{
+			status = "ok";
+		};
+
+		nand: qpic-nand@79b0000 {
+			pinctrl-0 = <&qspi_nand_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+		};
+
+		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
+			pinctrl-0 = <&blsp0_spi_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+			status = "ok";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				compatible = "n25q128a11";
+				linux,modalias = "m25p80", "n25q128a11";
+				spi-max-frequency = <50000000>;
+				use-default-sizes;
+			};
+		};
+
+		mdio0: mdio@88000 {
+			status = "ok";
+
+			ethernet-phy@0 {
+				reg = <7>;
+			};
+		};
+
+		mdio1: mdio@90000 {
+			status = "ok";
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 39 0>;
+
+			ethernet-phy@0 {
+				reg = <28>;
+			};
+		};
+
+		ess-instance {
+			num_devices = <0x1>;
+			ess-switch@0x39c00000 {
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
+				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <7>;
+						mdiobus = <&mdio0>;
+					};
+					port@1 {
+						port_id = <2>;
+						phy_address = <0x1c>;
+						mdiobus = <&mdio1>;
+						port_mac_sel = "QGMAC_PORT";
+					};
+				};
+				led_source@0 {
+					source = <0>;
+					mode = "normal";
+					speed = "all";
+					blink_en = "enable";
+					active = "high";
+				};
+			};
+				ess-switch1@1 {
+				compatible = "qcom,ess-switch-qca83xx";
+				device_id = <1>;
+				switch_access_mode = "mdio";
+				mdio-bus = <&mdio1>;
+				reset_gpio = <0x28>;
+				switch_cpu_bmp = <0x40>;  /* cpu port bitmap */
+				switch_lan_bmp = <0x1e>; /* lan port bitmap */
+				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				qca,ar8327-initvals = <
+						0x00004 0x7600000   /* PAD0_MODE */
+						0x00008 0x1000000   /* PAD5_MODE */
+						0x0000c 0x80        /* PAD6_MODE */
+						0x00010 0x2613a0    /* PORT6 FORCE MODE*/
+						0x000e4 0xaa545     /* MAC_POWER_SEL */
+						0x000e0 0xc74164de  /* SGMII_CTRL */
+						0x0007c 0x4e        /* PORT0_STATUS */
+						0x00094 0x4e        /* PORT6_STATUS */
+				>;
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <28>;
+					};
+				};
+			};
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <1>;
+			reg = <0x39C00000 0x10000>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <7>;
+			mdio-bus = <&mdio0>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		dp2 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <2>;
+			reg = <0x39D00000 0x10000>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <28>;
+			mdio-bus = <&mdio1>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		qcom,test@0 {
+			status = "ok";
+		};
+
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio1>;
+		};
+
+		lpass: lpass@0xA000000{
+			status = "disabled";
+		};
+
+		pcm: pcm@0xA3C0000{
+			pinctrl-0 = <&audio_pins>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
+		pcm_lb: pcm_lb@0 {
+			status = "disabled";
+		};
+	};
+
+	thermal-zones {
+		status = "ok";
+	};
+
+};
+
+&tlmm {
+	pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
+	pinctrl-names = "default";
+
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	blsp1_uart_pins: blsp1_uart_pins {
+		blsp1_uart_rx_tx {
+			pins = "gpio22", "gpio24", "gpio23", "gpio25";
+			function = "blsp1_uart2";
+			bias-disable;
+		};
+	};
+
+	blsp0_spi_pins: blsp0_spi_pins {
+		mux {
+			pins = "gpio10", "gpio11", "gpio12", "gpio13";
+			function = "blsp0_spi";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	qspi_nand_pins: qspi_nand_pins {
+		qspi_clock {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_cs {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_0 {
+			pins = "gpio7";
+			function = "qspi0";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_1 {
+			pins = "gpio6";
+			function = "qspi1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_2 {
+			pins = "gpio5";
+			function = "qspi2";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_3 {
+			pins = "gpio4";
+			function = "qspi3";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	mdio1_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mux_1 {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	phy_led_pins: phy_led_pins {
+		gephy_led_pin {
+			pins = "gpio46";
+			function = "led0";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	i2c_pins: i2c_pins {
+		i2c_scl {
+			pins = "gpio25";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		i2c_sda {
+			pins = "gpio26";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	button_pins: button_pins {
+		reset_button {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+audio_pins: audio_pinmux {
+};
+        leds_pins: leds_pins {
+                led_5g {
+                        pins = "gpio34";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+                led_2g {
+                        pins = "gpio33";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+                led_sys {
+                        pins = "gpio26";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+		led_onekey {
+                        pins = "gpio28";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+        };
+};
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		button@1 {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = <&leds_pins>;
+                pinctrl-names = "default";
+
+                led_blue: led@34 {
+                        label = "led_5g";
+                        gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_5g";
+                        default-state = "off";
+                };
+                led_green: led@33 {
+                        label = "led_2g";
+                        gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_2g";
+                        default-state = "off";
+                };
+                led_red: led@26 {
+                        label = "led_sys";
+                        gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_sys";
+                        default-state = "off";
+                };
+		led@28 {
+                        label = "led_onekey";
+                        gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_onekey";
+                        default-state = "off";
+                };
+        };
+};
+
+&q6v5_wcss {
+	compatible = "qcom,ipq5018-q6-mpd";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	firmware = "IPQ5018/q6_fw.mdt";
+	reg = <0x0cd00000 0x4040>,
+		<0x1938000 0x8>,
+		<0x193d204 0x4>;
+	reg-names = "qdsp6",
+			"tcsr-msip",
+			"tcsr-q6";
+	resets = <&gcc GCC_WCSSAON_RESET>,
+			<&gcc GCC_WCSS_Q6_BCR>;
+
+	reset-names = "wcss_aon_reset",
+			"wcss_q6_reset";
+
+	clocks = <&gcc GCC_Q6_AXIS_CLK>,
+		<&gcc GCC_WCSS_ECAHB_CLK>,
+		<&gcc GCC_Q6_AXIM_CLK>,
+		<&gcc GCC_Q6_AXIM2_CLK>,
+		<&gcc GCC_Q6_AHB_CLK>,
+		<&gcc GCC_Q6_AHB_S_CLK>,
+		<&gcc GCC_WCSS_AXI_S_CLK>;
+	clock-names = "gcc_q6_axis_clk",
+		"gcc_wcss_ecahb_clk",
+		"gcc_q6_axim_clk",
+		"gcc_q6_axim2_clk",
+		"gcc_q6_ahb_clk",
+		"gcc_q6_ahb_s_clk",
+		"gcc_wcss_axi_s_clk";
+
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>;
+	#else
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>,
+				<&q6_caldb_region>;
+	#endif
+
+	qcom,rproc = <&q6v5_wcss>;
+	qcom,bootargs_smem = <507>;
+	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
+			<0x2 0x4 0x2 0x12 0x0 0x0>;
+	status = "ok";
+	q6_wcss_pd1: remoteproc_pd1@4ab000 {
+		compatible = "qcom,ipq5018-wcss-ahb-mpd";
+		reg = <0x4ab000 0x20>;
+		reg-names = "rmb";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "IPQ5018/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 8 0>,
+					<&wcss_smp2p_in 9 0>,
+					<&wcss_smp2p_in 12 0>,
+					<&wcss_smp2p_in 11 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		resets = <&gcc GCC_WCSSAON_RESET>,
+				<&gcc GCC_WCSS_BCR>,
+				<&gcc GCC_CE_BCR>;
+		reset-names = "wcss_aon_reset",
+				"wcss_reset",
+				"ce_reset";
+
+		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
+				<&gcc GCC_WCSS_ACMT_CLK>,
+				<&gcc GCC_WCSS_AXI_M_CLK>;
+		clock-names = "gcc_wcss_ahb_s_clk",
+					"gcc_wcss_acmt_clk",
+					"gcc_wcss_axi_m_clk";
+
+		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
+
+		qcom,smem-states = <&wcss_smp2p_out 8>,
+					<&wcss_smp2p_out 9>,
+					<&wcss_smp2p_out 10>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>;
+	#else
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>, <&q6_caldb_region>;
+	#endif
+
+	};
+
+	q6_wcss_pd2: remoteproc_pd2 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "qcn6122/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 16 0>,
+					<&wcss_smp2p_in 17 0>,
+					<&wcss_smp2p_in 20 0>,
+					<&wcss_smp2p_in 19 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 16>,
+					<&wcss_smp2p_out 17>,
+					<&wcss_smp2p_out 18>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>;
+	#else
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
+	#endif
+
+	};
+
+	q6_wcss_pd3: remoteproc_pd3 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 24 0>,
+					<&wcss_smp2p_in 25 0>,
+					<&wcss_smp2p_in 28 0>,
+					<&wcss_smp2p_in 27 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 24>,
+					<&wcss_smp2p_out 25>,
+					<&wcss_smp2p_out 26>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef	__IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>;
+	#else
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
+	#endif
+	};
+};
+
+&i2c_0 {
+	pinctrl-0 = <&i2c_pins>;
+	pinctrl-names = "default";
+	status = "disabled";
+};
+
+&wifi0 {
+	/* IPQ5018 */
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x24>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
+	qcom,caldb-size = <0x200000>;
+	mem-region = <&q6_ipq5018_data>;
+#else
+	memory-region = <&q6_ipq5018_data>;
+#endif
+	status = "ok";
+};
+
+&wifi1 {
+	/* QCN6122 5G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
+	qcom,rproc = <&q6_wcss_pd2>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x50>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
+	qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data1>;
+#else
+	memory-region = <&q6_qcn6122_data1>;
+#endif
+	status = "disabled";
+};
+
+&wifi2 {
+	/* QCN6122 6G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
+	qcom,rproc = <&q6_wcss_pd3>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0xb0>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data2>;
+#else
+	memory-region = <&q6_qcn6122_data2>;
+#endif
+	status = "ok";
+};
+
+
+&usb3 {
+	status = "ok";
+	device-power-gpio = <&tlmm 24 1>;
+};
+
+&dwc_0 {
+	/delete-property/ #phy-cells;
+	/delete-property/ phys;
+	/delete-property/ phy-names;
+};
+&hs_m31phy_0 {
+	status = "ok";
+};
+
+&eud {
+	status = "ok";
+};
+
+&pcie_x1 {
+	#status = "disabled";
+	#perst-gpio = <&tlmm 18 1>;
+	perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x2 {
+	#status = "disabled";
+	#perst-gpio = <&tlmm 15 1>;
+	perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x1_rp {
+        status = "disabled";
+
+	mhi_0: qcom,mhi@0 {
+		reg = <0 0 0 0 0 >;
+	};
+};
+
+&pcie_x2_rp {
+        status = "disabled";
+
+	mhi_1: qcom,mhi@1 {
+		reg = <0 0 0 0 0 >;
+
+	};
+};
+

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-indio-um-335ax.dts

@@ -0,0 +1,731 @@
+/dts-v1/;
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq5018.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Indio UM-335AX";
+	compatible = "indio,um-335ax", "qcom,ipq5018-ap-mp03.1", "qcom,ipq5018-mp03.1", "qcom,ipq5018";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
+		serial0 = &blsp1_uart1;
+		serial1 = &blsp1_uart2;
+		ethernet0 = "/soc/dp1";
+		ethernet1 = "/soc/dp2";
+		led-boot = &led_red;
+		led-failsafe = &led_red;
+		led-running = &led_red;
+		led-upgrade = &led_red;
+
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+		stdout-path = "serial0";
+	};
+
+	gpio-watchdog {
+		compatible = "linux,wdt-gpio";
+		gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
+		hw_algo = "toggle";
+		hw_margin_ms = <5000>;
+		always-running;
+	};
+
+	reserved-memory {
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x1800000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xE00000>;
+		};
+
+		m3_dump: m3_dump@4C800000 {
+			no-map;
+			reg = <0x0 0x4C800000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4C900000 {
+			no-map;
+			reg = <0x0 0x4C900000 0x0 0x100000>;
+		};
+
+		q6_caldb_region: q6_caldb_region@4CA00000 {
+			no-map;
+			reg = <0x0 0x4CA00000 0x0 0x200000>;
+		};
+
+		qcn9000_pcie0: qcn9000_pcie0@4cc00000 {
+			no-map;
+			reg = <0x0 0x4CC00000 0x0 0x2600000>;
+		};
+
+	#if defined(__CNSS2__)
+		mhi_region1: dma_pool1@4F200000 {
+			compatible = "shared-dma-pool";
+			no-map;
+			reg = <0x0 0x4F200000 0x0 0x900000>;
+		};
+	#endif
+	};
+
+	soc {
+		serial@78af000 {
+			status = "ok";
+		};
+
+		blsp1_uart2: serial@78b0000 {
+			pinctrl-0 = <&blsp1_uart_pins>;
+			pinctrl-names = "default";
+		};
+
+		qpic_bam: dma@7984000{
+			status = "ok";
+		};
+
+		nand: qpic-nand@79b0000 {
+			pinctrl-0 = <&qspi_nand_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+		};
+
+		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
+			pinctrl-0 = <&blsp0_spi_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+			status = "ok";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				compatible = "n25q128a11";
+				linux,modalias = "m25p80", "n25q128a11";
+				spi-max-frequency = <50000000>;
+				use-default-sizes;
+			};
+		};
+
+		mdio0: mdio@88000 {
+			status = "ok";
+
+			ethernet-phy@0 {
+				reg = <7>;
+			};
+		};
+
+		mdio1: mdio@90000 {
+			status = "ok";
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 39 0>;
+
+			ethernet-phy@0 {
+				reg = <28>;
+			};
+		};
+
+		ess-instance {
+			num_devices = <0x1>;
+			ess-switch@0x39c00000 {
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
+				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <7>;
+						mdiobus = <&mdio0>;
+					};
+					port@1 {
+						port_id = <2>;
+						phy_address = <0x1c>;
+						mdiobus = <&mdio1>;
+						port_mac_sel = "QGMAC_PORT";
+					};
+				};
+				led_source@0 {
+					source = <0>;
+					mode = "normal";
+					speed = "all";
+					blink_en = "enable";
+					active = "high";
+				};
+			};
+				ess-switch1@1 {
+				compatible = "qcom,ess-switch-qca83xx";
+				device_id = <1>;
+				switch_access_mode = "mdio";
+				mdio-bus = <&mdio1>;
+				reset_gpio = <0x28>;
+				switch_cpu_bmp = <0x40>;  /* cpu port bitmap */
+				switch_lan_bmp = <0x1e>; /* lan port bitmap */
+				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				qca,ar8327-initvals = <
+						0x00004 0x7600000   /* PAD0_MODE */
+						0x00008 0x1000000   /* PAD5_MODE */
+						0x0000c 0x80        /* PAD6_MODE */
+						0x00010 0x2613a0    /* PORT6 FORCE MODE*/
+						0x000e4 0xaa545     /* MAC_POWER_SEL */
+						0x000e0 0xc74164de  /* SGMII_CTRL */
+						0x0007c 0x4e        /* PORT0_STATUS */
+						0x00094 0x4e        /* PORT6_STATUS */
+				>;
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <28>;
+					};
+				};
+			};
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <1>;
+			reg = <0x39C00000 0x10000>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <7>;
+			mdio-bus = <&mdio0>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		dp2 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <2>;
+			reg = <0x39D00000 0x10000>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <28>;
+			mdio-bus = <&mdio1>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		qcom,test@0 {
+			status = "ok";
+		};
+
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio1>;
+		};
+
+		lpass: lpass@0xA000000{
+			status = "disabled";
+		};
+
+		pcm: pcm@0xA3C0000{
+			pinctrl-0 = <&audio_pins>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
+		pcm_lb: pcm_lb@0 {
+			status = "disabled";
+		};
+	};
+
+	thermal-zones {
+		status = "ok";
+	};
+
+};
+
+&tlmm {
+	pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
+	pinctrl-names = "default";
+
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	blsp1_uart_pins: blsp1_uart_pins {
+		blsp1_uart_rx_tx {
+			pins = "gpio22", "gpio24", "gpio23", "gpio25";
+			function = "blsp1_uart2";
+			bias-disable;
+		};
+	};
+
+	blsp0_spi_pins: blsp0_spi_pins {
+		mux {
+			pins = "gpio10", "gpio11", "gpio12", "gpio13";
+			function = "blsp0_spi";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	qspi_nand_pins: qspi_nand_pins {
+		qspi_clock {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_cs {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_0 {
+			pins = "gpio7";
+			function = "qspi0";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_1 {
+			pins = "gpio6";
+			function = "qspi1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_2 {
+			pins = "gpio5";
+			function = "qspi2";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_3 {
+			pins = "gpio4";
+			function = "qspi3";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	mdio1_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mux_1 {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	phy_led_pins: phy_led_pins {
+		gephy_led_pin {
+			pins = "gpio46";
+			function = "led0";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	i2c_pins: i2c_pins {
+		i2c_scl {
+			pins = "gpio25";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		i2c_sda {
+			pins = "gpio26";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	button_pins: button_pins {
+		reset_button {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	audio_pins: audio_pinmux {
+	};
+
+	leds_pins: leds_pins {
+		led_blue: led_5g {
+			label = "led_5g";
+			pins = "gpio34";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_green: led_2g {
+			label = "led_2g";
+			pins = "gpio33";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_red: led_sys {
+			label = "led_sys";
+			pins = "gpio26";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_onekey {
+			pins = "gpio28";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+};
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		button@1 {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&leds_pins>;
+		pinctrl-names = "default";
+
+		led@33 {
+			label = "led_5g";
+			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_5g";
+			default-state = "off";
+		};
+		led@34 {
+			label = "led_2g";
+			gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_2g";
+			default-state = "off";
+		};
+		led@26 {
+			label = "led_sys";
+			gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_sys";
+			default-state = "on";
+		};
+		led@28 {
+			label = "led_onekey";
+			gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "led_onekey";
+			default-state = "off";
+		};
+	};
+};
+
+&q6v5_wcss {
+	compatible = "qcom,ipq5018-q6-mpd";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	firmware = "IPQ5018/q6_fw.mdt";
+	reg = <0x0cd00000 0x4040>,
+		<0x1938000 0x8>,
+		<0x193d204 0x4>;
+	reg-names = "qdsp6",
+			"tcsr-msip",
+			"tcsr-q6";
+	resets = <&gcc GCC_WCSSAON_RESET>,
+			<&gcc GCC_WCSS_Q6_BCR>;
+
+	reset-names = "wcss_aon_reset",
+			"wcss_q6_reset";
+
+	clocks = <&gcc GCC_Q6_AXIS_CLK>,
+		<&gcc GCC_WCSS_ECAHB_CLK>,
+		<&gcc GCC_Q6_AXIM_CLK>,
+		<&gcc GCC_Q6_AXIM2_CLK>,
+		<&gcc GCC_Q6_AHB_CLK>,
+		<&gcc GCC_Q6_AHB_S_CLK>,
+		<&gcc GCC_WCSS_AXI_S_CLK>;
+	clock-names = "gcc_q6_axis_clk",
+		"gcc_wcss_ecahb_clk",
+		"gcc_q6_axim_clk",
+		"gcc_q6_axim2_clk",
+		"gcc_q6_ahb_clk",
+		"gcc_q6_ahb_s_clk",
+		"gcc_wcss_axi_s_clk";
+
+	memory-region = <&q6_mem_regions>, <&q6_etr_region>,
+			<&q6_caldb_region>;
+
+	qcom,rproc = <&q6v5_wcss>;
+	qcom,bootargs_smem = <507>;
+	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
+			<0x2 0x4 0x2 0x12 0x0 0x0>;
+	status = "ok";
+	q6_wcss_pd1: remoteproc_pd1@4ab000 {
+		compatible = "qcom,ipq5018-wcss-ahb-mpd";
+		reg = <0x4ab000 0x20>;
+		reg-names = "rmb";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "IPQ5018/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 8 0>,
+					<&wcss_smp2p_in 9 0>,
+					<&wcss_smp2p_in 12 0>,
+					<&wcss_smp2p_in 11 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		resets = <&gcc GCC_WCSSAON_RESET>,
+				<&gcc GCC_WCSS_BCR>,
+				<&gcc GCC_CE_BCR>;
+		reset-names = "wcss_aon_reset",
+				"wcss_reset",
+				"ce_reset";
+
+		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
+				<&gcc GCC_WCSS_ACMT_CLK>,
+				<&gcc GCC_WCSS_AXI_M_CLK>;
+		clock-names = "gcc_wcss_ahb_s_clk",
+					"gcc_wcss_acmt_clk",
+					"gcc_wcss_axi_m_clk";
+
+		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
+
+		qcom,smem-states = <&wcss_smp2p_out 8>,
+					<&wcss_smp2p_out 9>,
+					<&wcss_smp2p_out 10>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>, <&q6_caldb_region>;
+	};
+};
+
+&i2c_0 {
+	pinctrl-0 = <&i2c_pins>;
+	pinctrl-names = "default";
+	// status = "disabled";
+};
+
+&usb3 {
+	status = "ok";
+	device-power-gpio = <&tlmm 24 1>;
+};
+
+&dwc_0 {
+	/delete-property/ #phy-cells;
+	/delete-property/ phys;
+	/delete-property/ phy-names;
+};
+
+&blsp1_uart1 {
+	status = "ok";
+};
+
+&ssuniphy_0 {
+	status = "ok";
+};
+
+&hs_m31phy_0 {
+	status = "ok";
+};
+
+&eud {
+	status = "ok";
+};
+
+&pcie_x1 {
+	perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x2 {
+	status = "ok";
+	perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
+};
+
+&wcss {
+	status = "ok";
+};
+
+&pcie_x2phy {
+	status = "ok";
+};
+
+&pcie_x1_rp {
+	status = "disabled";
+
+	mhi_0: qcom,mhi@0 {
+		reg = <0 0 0 0 0 >;
+	};
+};
+
+&pcie_x2_rp {
+	status = "ok";
+
+	mhi_1: qcom,mhi@1 {
+		reg = <0 0 0 0 0 >;
+		qrtr_instance_id = <0x20>;
+		qti,disable-rddm-prealloc;
+		qti,rddm-seg-len = <0x1000>;
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+#if defined(__CNSS2__)
+		memory-region = <0>,<&mhi_region1>;
+#else
+		base-addr = <0x4CB00000>;
+		m3-dump-addr = <0x4DF00000>;
+		etr-addr = <0x4E000000>;
+		qcom,caldb-addr = <0x4E100000>;
+		pageable-addr = <0x4E900000>;
+		qcom,tgt-mem-mode = <0x1>;
+#endif
+	};
+};
+
+&wifi0 {
+	/* IPQ5018 */
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+	qcom,tgt-mem-mode = <1>;
+	qcom,board_id = <0x24>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
+	qcom,caldb-size = <0x200000>;
+	mem-region = <&q6_ipq5018_data>;
+#else
+	memory-region = <&q6_ipq5018_data>;
+#endif
+	status = "ok";
+};
+
+&wifi3 {
+	/* QCN9000 5G */
+	board_id = <0xa0>;
+	hremote_node = <&qcn9000_pcie0>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	/* QCN9000 tgt-mem-mode=2 layout - 17MB
+	 * +=========+==============+=========+
+	 * |  Region | Start Offset |   Size  |
+	 * +---------+--------------+---------+
+	 * | HREMOTE |  0x4C900000  |   11MB  |
+	 * +---------+--------------+---------+
+	 * | M3 Dump |  0x4D400000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |   ETR   |  0x4D500000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * | Pageable|  0x4D600000  |   4MB   |
+	 * +==================================+
+	 */
+	base-addr = <0x4C900000>;
+	m3-dump-addr = <0x4D400000>;
+	etr-addr = <0x4D500000>;
+	caldb-addr = <0>;
+	pageable-addr = <0x4D600000>;
+	caldb-size = <0>;
+	hremote-size = <0xB00000>;
+	tgt-mem-mode = <0x2>;
+	pageable-size = <0x400000>;
+#elif __IPQ_MEM_PROFILE_512_MB__
+	/* QCN9000 tgt-mem-mode=1 layout - 26MB
+	 * +=========+==============+=========+
+	 * |  Region | Start Offset |   Size  |
+	 * +---------+--------------+---------+
+	 * | HREMOTE |  0x4CB00000  |   12MB  |
+	 * +---------+--------------+---------+
+	 * | M3 Dump |  0x4D700000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |   ETR   |  0x4D800000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |  Caldb  |  0x4D900000  |   8MB   |
+	 * +---------+--------------+---------+
+	 * | Pageable|  0x4E100000  |   4MB   |
+	 * +==================================+
+	 */
+	base-addr = <0x4CB00000>;
+	m3-dump-addr = <0x4D700000>;
+	etr-addr = <0x4D800000>;
+	caldb-addr = <0x4D900000>;
+	pageable-addr = <0x4E100000>;
+	caldb-size = <0x800000>;
+	hremote-size = <0xC00000>;
+	tgt-mem-mode = <0x1>;
+	pageable-size = <0x400000>;
+#else
+	/* QCN9000 tgt-mem-mode=0 layout - 53MB
+	 * +=========+==============+=========+
+	 * |  Region | Start Offset |   Size  |
+	 * +---------+--------------+---------+
+	 * | HREMOTE |  0x4CB00000  |   35MB  |
+	 * +---------+--------------+---------+
+	 * | M3 Dump |  0x4EE00000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |   ETR   |  0x4EF00000  |   1MB   |
+	 * +---------+--------------+---------+
+	 * |  Caldb  |  0x4F000000  |   8MB   |
+	 * +---------+--------------+---------+
+	 * | Pageable|  0x4F800000  |   8MB   |
+	 * +==================================+
+	 */
+	base-addr = <0x4CB00000>;
+	m3-dump-addr = <0x4EE00000>;
+	etr-addr = <0x4EF00000>;
+	caldb-addr = <0x4F000000>;
+	pageable-addr = <0x4F800000>;
+	hremote-size = <0x2300000>;
+	caldb-size = <0x800000>;
+	tgt-mem-mode = <0x0>;
+	pageable-size = <0x800000>;
+#endif
+	status = "ok";
+};

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-indio-um-525axm.dts

@@ -0,0 +1,941 @@
+/dts-v1/;
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq5018.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Indio UM-525AXM";
+	compatible = "indio,um-525axm", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
+		serial0 = &blsp1_uart1;
+		serial1 = &blsp1_uart2;
+		ethernet0 = "/soc/dp1";
+		ethernet1 = "/soc/dp2";
+                //led-failsafe = &led_red;
+                //led-running = &led_green;
+                //led-upgrade = &led_green;
+                //led-gateway = &led_blue;
+                //led-factory = &led_blue;
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		bootargs-append = " swiotlb=1";
+	#else
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+	#endif
+		stdout-path = "serial0";
+	};
+
+	reserved-memory {
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+	/*                   256 MB Profile
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |           8MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x40800000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D100000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D300000  |          15MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4E400000  |          15MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4F300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4F400000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x4500000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x1400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xD00000>;
+		};
+
+		m3_dump: m3_dump@4D100000 {
+			no-map;
+			reg = <0x0 0x4D100000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0xF00000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
+			no-map;
+			reg = <0x0 0x4E200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
+			no-map;
+			reg = <0x0 0x4E300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
+			no-map;
+			reg = <0x0 0x4E400000 0x0 0xF00000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
+			no-map;
+			reg = <0x0 0x4F300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
+			no-map;
+			reg = <0x0 0x4F400000 0x0 0x100000>;
+		};
+		
+	#else
+	/*                 512MB/1GB Profiles
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x41000000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          14MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  Caldb   |  0x4D400000  |           2MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D600000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E600000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E700000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  Caldb   |  0x4E800000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4ED00000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4FD00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4FE00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  Caldb   |  0x4FF00000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x5400000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 01400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xE00000>;
+		};
+
+		m3_dump: m3_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0x100000>;
+		};
+
+		q6_caldb_region: q6_caldb_region@4D400000 {
+			no-map;
+			reg = <0x0 0x4D400000 0x0 0x200000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
+			no-map;
+			reg = <0x0 0x4D600000 0x0 0x1000000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
+			no-map;
+			reg = <0x0 0x4E600000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
+			no-map;
+			reg = <0x0 0x4E700000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
+			no-map;
+			reg = <0x0 0x4E800000 0x0 0x500000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
+			no-map;
+			reg = <0x0 0x4ED00000 0x0 0x1000000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
+			no-map;
+			reg = <0x0 0x4FD00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
+			no-map;
+			reg = <0x0 0x4FE00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
+			no-map;
+			reg = <0x0 0x4FF00000 0x0 0x500000>;
+		};
+
+	#endif
+	};
+
+	soc {
+		gpio-watchdog {
+			compatible = "linux,wdt-gpio";
+			gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
+			hw_algo = "toggle";
+			hw_margin_ms = <5000>;
+			always-running;
+		};
+
+		serial@78af000 {
+			status = "ok";
+		};
+
+		blsp1_uart2: serial@78b0000 {
+			pinctrl-0 = <&blsp1_uart_pins>;
+			pinctrl-names = "default";
+		};
+
+		qpic_bam: dma@7984000{
+			status = "ok";
+		};
+
+		nand: qpic-nand@79b0000 {
+			pinctrl-0 = <&qspi_nand_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+		};
+
+		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
+			pinctrl-0 = <&blsp0_spi_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+			status = "ok";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				compatible = "n25q128a11";
+				linux,modalias = "m25p80", "n25q128a11";
+				spi-max-frequency = <50000000>;
+				use-default-sizes;
+			};
+		};
+
+		mdio0: mdio@88000 {
+			status = "ok";
+
+			ethernet-phy@0 {
+				reg = <7>;
+			};
+		};
+
+		mdio1: mdio@90000 {
+			status = "ok";
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 39 0>;
+
+			ethernet-phy@0 {
+				reg = <28>;
+			};
+		};
+
+		ess-instance {
+			num_devices = <0x1>;
+			ess-switch@0x39c00000 {
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
+				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <7>;
+						mdiobus = <&mdio0>;
+					};
+					port@1 {
+						port_id = <2>;
+						phy_address = <0x1c>;
+						mdiobus = <&mdio1>;
+						port_mac_sel = "QGMAC_PORT";
+					};
+				};
+				led_source@0 {
+					source = <0>;
+					mode = "normal";
+					speed = "all";
+					blink_en = "enable";
+					active = "high";
+				};
+			};
+				ess-switch1@1 {
+				compatible = "qcom,ess-switch-qca83xx";
+				device_id = <1>;
+				switch_access_mode = "mdio";
+				mdio-bus = <&mdio1>;
+				reset_gpio = <0x28>;
+				switch_cpu_bmp = <0x40>;  /* cpu port bitmap */
+				switch_lan_bmp = <0x1e>; /* lan port bitmap */
+				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				qca,ar8327-initvals = <
+						0x00004 0x7600000   /* PAD0_MODE */
+						0x00008 0x1000000   /* PAD5_MODE */
+						0x0000c 0x80        /* PAD6_MODE */
+						0x00010 0x2613a0    /* PORT6 FORCE MODE*/
+						0x000e4 0xaa545     /* MAC_POWER_SEL */
+						0x000e0 0xc74164de  /* SGMII_CTRL */
+						0x0007c 0x4e        /* PORT0_STATUS */
+						0x00094 0x4e        /* PORT6_STATUS */
+				>;
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <28>;
+					};
+				};
+			};
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <1>;
+			reg = <0x39C00000 0x10000>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <7>;
+			mdio-bus = <&mdio0>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		dp2 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <2>;
+			reg = <0x39D00000 0x10000>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <28>;
+			mdio-bus = <&mdio1>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		qcom,test@0 {
+			status = "ok";
+		};
+
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio1>;
+		};
+
+		lpass: lpass@0xA000000{
+			status = "disabled";
+		};
+
+		pcm: pcm@0xA3C0000{
+			pinctrl-0 = <&audio_pins>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
+		pcm_lb: pcm_lb@0 {
+			status = "disabled";
+		};
+	};
+
+	thermal-zones {
+		status = "ok";
+	};
+
+};
+
+&tlmm {
+	pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
+	pinctrl-names = "default";
+
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	blsp1_uart_pins: blsp1_uart_pins {
+		blsp1_uart_rx_tx {
+			pins = "gpio22", "gpio24", "gpio23", "gpio25";
+			function = "blsp1_uart2";
+			bias-disable;
+		};
+	};
+
+	blsp0_spi_pins: blsp0_spi_pins {
+		mux {
+			pins = "gpio10", "gpio11", "gpio12", "gpio13";
+			function = "blsp0_spi";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	qspi_nand_pins: qspi_nand_pins {
+		qspi_clock {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_cs {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_0 {
+			pins = "gpio7";
+			function = "qspi0";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_1 {
+			pins = "gpio6";
+			function = "qspi1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_2 {
+			pins = "gpio5";
+			function = "qspi2";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_3 {
+			pins = "gpio4";
+			function = "qspi3";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	mdio1_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mux_1 {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	phy_led_pins: phy_led_pins {
+		gephy_led_pin {
+			pins = "gpio46";
+			function = "led0";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	i2c_pins: i2c_pins {
+		i2c_scl {
+			pins = "gpio25";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		i2c_sda {
+			pins = "gpio26";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	button_pins: button_pins {
+		reset_button {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+audio_pins: audio_pinmux {
+};
+        leds_pins: leds_pins {
+                led_5g {
+                        pins = "gpio34";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+                led_2g {
+                        pins = "gpio33";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+                led_sys {
+                        pins = "gpio26";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+		led_onekey {
+                        pins = "gpio28";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+        };
+};
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		button@1 {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = <&leds_pins>;
+                pinctrl-names = "default";
+
+                led_blue: led@34 {
+                        label = "led_5g";
+                        gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_5g";
+                        default-state = "off";
+                };
+                led_green: led@33 {
+                        label = "led_2g";
+                        gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_2g";
+                        default-state = "off";
+                };
+                led_red: led@26 {
+                        label = "led_sys";
+                        gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_sys";
+                        default-state = "off";
+                };
+		led@28 {
+                        label = "led_onekey";
+                        gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_onekey";
+                        default-state = "off";
+                };
+        };
+};
+
+&q6v5_wcss {
+	compatible = "qcom,ipq5018-q6-mpd";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	firmware = "IPQ5018/q6_fw.mdt";
+	reg = <0x0cd00000 0x4040>,
+		<0x1938000 0x8>,
+		<0x193d204 0x4>;
+	reg-names = "qdsp6",
+			"tcsr-msip",
+			"tcsr-q6";
+	resets = <&gcc GCC_WCSSAON_RESET>,
+			<&gcc GCC_WCSS_Q6_BCR>;
+
+	reset-names = "wcss_aon_reset",
+			"wcss_q6_reset";
+
+	clocks = <&gcc GCC_Q6_AXIS_CLK>,
+		<&gcc GCC_WCSS_ECAHB_CLK>,
+		<&gcc GCC_Q6_AXIM_CLK>,
+		<&gcc GCC_Q6_AXIM2_CLK>,
+		<&gcc GCC_Q6_AHB_CLK>,
+		<&gcc GCC_Q6_AHB_S_CLK>,
+		<&gcc GCC_WCSS_AXI_S_CLK>;
+	clock-names = "gcc_q6_axis_clk",
+		"gcc_wcss_ecahb_clk",
+		"gcc_q6_axim_clk",
+		"gcc_q6_axim2_clk",
+		"gcc_q6_ahb_clk",
+		"gcc_q6_ahb_s_clk",
+		"gcc_wcss_axi_s_clk";
+
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>;
+	#else
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>,
+				<&q6_caldb_region>;
+	#endif
+
+	qcom,rproc = <&q6v5_wcss>;
+	qcom,bootargs_smem = <507>;
+	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
+			<0x2 0x4 0x2 0x12 0x0 0x0>;
+	status = "ok";
+	q6_wcss_pd1: remoteproc_pd1@4ab000 {
+		compatible = "qcom,ipq5018-wcss-ahb-mpd";
+		reg = <0x4ab000 0x20>;
+		reg-names = "rmb";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "IPQ5018/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 8 0>,
+					<&wcss_smp2p_in 9 0>,
+					<&wcss_smp2p_in 12 0>,
+					<&wcss_smp2p_in 11 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		resets = <&gcc GCC_WCSSAON_RESET>,
+				<&gcc GCC_WCSS_BCR>,
+				<&gcc GCC_CE_BCR>;
+		reset-names = "wcss_aon_reset",
+				"wcss_reset",
+				"ce_reset";
+
+		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
+				<&gcc GCC_WCSS_ACMT_CLK>,
+				<&gcc GCC_WCSS_AXI_M_CLK>;
+		clock-names = "gcc_wcss_ahb_s_clk",
+					"gcc_wcss_acmt_clk",
+					"gcc_wcss_axi_m_clk";
+
+		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
+
+		qcom,smem-states = <&wcss_smp2p_out 8>,
+					<&wcss_smp2p_out 9>,
+					<&wcss_smp2p_out 10>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>;
+	#else
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>, <&q6_caldb_region>;
+	#endif
+
+	};
+
+	q6_wcss_pd2: remoteproc_pd2 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "qcn6122/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 16 0>,
+					<&wcss_smp2p_in 17 0>,
+					<&wcss_smp2p_in 20 0>,
+					<&wcss_smp2p_in 19 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 16>,
+					<&wcss_smp2p_out 17>,
+					<&wcss_smp2p_out 18>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>;
+	#else
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
+	#endif
+
+	};
+
+	q6_wcss_pd3: remoteproc_pd3 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 24 0>,
+					<&wcss_smp2p_in 25 0>,
+					<&wcss_smp2p_in 28 0>,
+					<&wcss_smp2p_in 27 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 24>,
+					<&wcss_smp2p_out 25>,
+					<&wcss_smp2p_out 26>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef	__IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>;
+	#else
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
+	#endif
+	};
+};
+
+&i2c_0 {
+	pinctrl-0 = <&i2c_pins>;
+	pinctrl-names = "default";
+	status = "disabled";
+};
+
+&wifi0 {
+	/* IPQ5018 */
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x24>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
+	qcom,caldb-size = <0x200000>;
+	mem-region = <&q6_ipq5018_data>;
+#else
+	memory-region = <&q6_ipq5018_data>;
+#endif
+	status = "ok";
+};
+
+&wifi1 {
+	/* QCN6122 5G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
+	qcom,rproc = <&q6_wcss_pd2>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x50>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
+	qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data1>;
+#else
+	memory-region = <&q6_qcn6122_data1>;
+#endif
+	status = "disabled";
+};
+
+&wifi2 {
+	/* QCN6122 6G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
+	qcom,rproc = <&q6_wcss_pd3>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0xb0>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data2>;
+#else
+	memory-region = <&q6_qcn6122_data2>;
+#endif
+	status = "ok";
+};
+
+
+&usb3 {
+	status = "ok";
+	device-power-gpio = <&tlmm 24 1>;
+};
+
+&dwc_0 {
+	/delete-property/ #phy-cells;
+	/delete-property/ phys;
+	/delete-property/ phy-names;
+};
+&hs_m31phy_0 {
+	status = "ok";
+};
+
+&eud {
+	status = "ok";
+};
+
+&pcie_x1 {
+	#status = "disabled";
+	#perst-gpio = <&tlmm 18 1>;
+	perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x2 {
+	#status = "disabled";
+	#perst-gpio = <&tlmm 15 1>;
+	perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x1_rp {
+        status = "disabled";
+
+	mhi_0: qcom,mhi@0 {
+		reg = <0 0 0 0 0 >;
+	};
+};
+
+&pcie_x2_rp {
+        status = "disabled";
+
+	mhi_1: qcom,mhi@1 {
+		reg = <0 0 0 0 0 >;
+
+	};
+};
+

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-indio-um-525axp.dts

@@ -0,0 +1,941 @@
+/dts-v1/;
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq5018.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Indio UM-525AXP";
+	compatible = "indio,um-525axp", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
+	interrupt-parent = <&intc>;
+
+	aliases {
+		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
+		serial0 = &blsp1_uart1;
+		serial1 = &blsp1_uart2;
+		ethernet0 = "/soc/dp1";
+		ethernet1 = "/soc/dp2";
+                //led-failsafe = &led_red;
+                //led-running = &led_green;
+                //led-upgrade = &led_green;
+                //led-gateway = &led_blue;
+                //led-factory = &led_blue;
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		bootargs-append = " swiotlb=1";
+	#else
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+	#endif
+		stdout-path = "serial0";
+	};
+
+	reserved-memory {
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+	/*                   256 MB Profile
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |           8MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x40800000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          13MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D100000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D300000  |          15MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4E400000  |          15MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4F300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4F400000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x4500000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x1400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xD00000>;
+		};
+
+		m3_dump: m3_dump@4D100000 {
+			no-map;
+			reg = <0x0 0x4D100000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0xF00000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
+			no-map;
+			reg = <0x0 0x4E200000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
+			no-map;
+			reg = <0x0 0x4E300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
+			no-map;
+			reg = <0x0 0x4E400000 0x0 0xF00000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
+			no-map;
+			reg = <0x0 0x4F300000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
+			no-map;
+			reg = <0x0 0x4F400000 0x0 0x100000>;
+		};
+		
+	#else
+	/*                 512MB/1GB Profiles
+	 * +==========+==============+=========================+
+	 * |          |              |                         |
+	 * |  Region  | Start Offset |          Size           |
+	 * |          |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |    NSS   |  0x40000000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   Linux  |  0x41000000  | Depends on total memory |
+	 * +----------+--------------+-------------------------+
+	 * |   uboot  |  0x4A600000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    SBL   |  0x4AA00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |   smem   |  0x4AB00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    TZ    |  0x4AC00000  |           4MB           |
+	 * +----------+--------------+-------------------------+
+	 * |    Q6    |              |                         |
+	 * |   code/  |  0x4B000000  |          20MB           |
+	 * |   data   |              |                         |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   data   |  0x4C400000  |          14MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  M3 Dump |  0x4D200000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |   QDSS   |  0x4D300000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * |  IPQ5018 |              |                         |
+	 * |  Caldb   |  0x4D400000  |           2MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   data   |  0x4D600000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  M3 Dump |  0x4E600000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |   QDSS   |  0x4E700000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_1|              |                         |
+	 * |  Caldb   |  0x4E800000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   data   |  0x4ED00000  |          16MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  M3 Dump |  0x4FD00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |   QDSS   |  0x4FE00000  |           1MB           |
+	 * +----------+--------------+-------------------------+
+	 * | QCN6122_2|              |                         |
+	 * |  Caldb   |  0x4FF00000  |           5MB           |
+	 * +----------+--------------+-------------------------+
+	 * |                                                   |
+	 * |            Rest of the memory for Linux           |
+	 * |                                                   |
+	 * +===================================================+
+	 */
+		q6_mem_regions: q6_mem_regions@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 0x5400000>;
+		};
+
+		q6_code_data: q6_code_data@4B000000 {
+			no-map;
+			reg = <0x0 0x4B000000 0x0 01400000>;
+		};
+
+		q6_ipq5018_data: q6_ipq5018_data@4C400000 {
+			no-map;
+			reg = <0x0 0x4C400000 0x0 0xE00000>;
+		};
+
+		m3_dump: m3_dump@4D200000 {
+			no-map;
+			reg = <0x0 0x4D200000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D300000 {
+			no-map;
+			reg = <0x0 0x4D300000 0x0 0x100000>;
+		};
+
+		q6_caldb_region: q6_caldb_region@4D400000 {
+			no-map;
+			reg = <0x0 0x4D400000 0x0 0x200000>;
+		};
+
+		q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
+			no-map;
+			reg = <0x0 0x4D600000 0x0 0x1000000>;
+		};
+
+		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
+			no-map;
+			reg = <0x0 0x4E600000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
+			no-map;
+			reg = <0x0 0x4E700000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
+			no-map;
+			reg = <0x0 0x4E800000 0x0 0x500000>;
+		};
+
+		q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
+			no-map;
+			reg = <0x0 0x4ED00000 0x0 0x1000000>;
+		};
+
+		m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
+			no-map;
+			reg = <0x0 0x4FD00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
+			no-map;
+			reg = <0x0 0x4FE00000 0x0 0x100000>;
+		};
+
+		q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
+			no-map;
+			reg = <0x0 0x4FF00000 0x0 0x500000>;
+		};
+
+	#endif
+	};
+
+	soc {
+		gpio-watchdog {
+			compatible = "linux,wdt-gpio";
+			gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
+			hw_algo = "toggle";
+			hw_margin_ms = <5000>;
+			always-running;
+		};
+
+		serial@78af000 {
+			status = "ok";
+		};
+
+		blsp1_uart2: serial@78b0000 {
+			pinctrl-0 = <&blsp1_uart_pins>;
+			pinctrl-names = "default";
+		};
+
+		qpic_bam: dma@7984000{
+			status = "ok";
+		};
+
+		nand: qpic-nand@79b0000 {
+			pinctrl-0 = <&qspi_nand_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+		};
+
+		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
+			pinctrl-0 = <&blsp0_spi_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+			status = "ok";
+
+			m25p80@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0>;
+				compatible = "n25q128a11";
+				linux,modalias = "m25p80", "n25q128a11";
+				spi-max-frequency = <50000000>;
+				use-default-sizes;
+			};
+		};
+
+		mdio0: mdio@88000 {
+			status = "ok";
+
+			ethernet-phy@0 {
+				reg = <7>;
+			};
+		};
+
+		mdio1: mdio@90000 {
+			status = "ok";
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 39 0>;
+
+			ethernet-phy@0 {
+				reg = <28>;
+			};
+		};
+
+		ess-instance {
+			num_devices = <0x1>;
+			ess-switch@0x39c00000 {
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
+				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <7>;
+						mdiobus = <&mdio0>;
+					};
+					port@1 {
+						port_id = <2>;
+						phy_address = <0x1c>;
+						mdiobus = <&mdio1>;
+						port_mac_sel = "QGMAC_PORT";
+					};
+				};
+				led_source@0 {
+					source = <0>;
+					mode = "normal";
+					speed = "all";
+					blink_en = "enable";
+					active = "high";
+				};
+			};
+				ess-switch1@1 {
+				compatible = "qcom,ess-switch-qca83xx";
+				device_id = <1>;
+				switch_access_mode = "mdio";
+				mdio-bus = <&mdio1>;
+				reset_gpio = <0x28>;
+				switch_cpu_bmp = <0x40>;  /* cpu port bitmap */
+				switch_lan_bmp = <0x1e>; /* lan port bitmap */
+				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				qca,ar8327-initvals = <
+						0x00004 0x7600000   /* PAD0_MODE */
+						0x00008 0x1000000   /* PAD5_MODE */
+						0x0000c 0x80        /* PAD6_MODE */
+						0x00010 0x2613a0    /* PORT6 FORCE MODE*/
+						0x000e4 0xaa545     /* MAC_POWER_SEL */
+						0x000e0 0xc74164de  /* SGMII_CTRL */
+						0x0007c 0x4e        /* PORT0_STATUS */
+						0x00094 0x4e        /* PORT6_STATUS */
+				>;
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <1>;
+						phy_address = <28>;
+					};
+				};
+			};
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <1>;
+			reg = <0x39C00000 0x10000>;
+			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <7>;
+			mdio-bus = <&mdio0>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		dp2 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
+			clock-names = "nss-snoc-gmac-axi-clk";
+			qcom,id = <2>;
+			reg = <0x39D00000 0x10000>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			qcom,mactype = <2>;
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <28>;
+			mdio-bus = <&mdio1>;
+			local-mac-address = [000000000000];
+			phy-mode = "sgmii";
+		};
+
+		qcom,test@0 {
+			status = "ok";
+		};
+
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio1>;
+		};
+
+		lpass: lpass@0xA000000{
+			status = "disabled";
+		};
+
+		pcm: pcm@0xA3C0000{
+			pinctrl-0 = <&audio_pins>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
+		pcm_lb: pcm_lb@0 {
+			status = "disabled";
+		};
+	};
+
+	thermal-zones {
+		status = "ok";
+	};
+
+};
+
+&tlmm {
+	pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
+	pinctrl-names = "default";
+
+	blsp0_uart_pins: uart_pins {
+		blsp0_uart_rx_tx {
+			pins = "gpio20", "gpio21";
+			function = "blsp0_uart0";
+			bias-disable;
+		};
+	};
+
+	blsp1_uart_pins: blsp1_uart_pins {
+		blsp1_uart_rx_tx {
+			pins = "gpio22", "gpio24", "gpio23", "gpio25";
+			function = "blsp1_uart2";
+			bias-disable;
+		};
+	};
+
+	blsp0_spi_pins: blsp0_spi_pins {
+		mux {
+			pins = "gpio10", "gpio11", "gpio12", "gpio13";
+			function = "blsp0_spi";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	qspi_nand_pins: qspi_nand_pins {
+		qspi_clock {
+			pins = "gpio9";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_cs {
+			pins = "gpio8";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_0 {
+			pins = "gpio7";
+			function = "qspi0";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_1 {
+			pins = "gpio6";
+			function = "qspi1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_2 {
+			pins = "gpio5";
+			function = "qspi2";
+			drive-strength = <8>;
+			bias-disable;
+		};
+		qspi_data_3 {
+			pins = "gpio4";
+			function = "qspi3";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	mdio1_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio36";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mux_1 {
+			pins = "gpio37";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	phy_led_pins: phy_led_pins {
+		gephy_led_pin {
+			pins = "gpio46";
+			function = "led0";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	i2c_pins: i2c_pins {
+		i2c_scl {
+			pins = "gpio25";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		i2c_sda {
+			pins = "gpio26";
+			function = "blsp2_i2c1";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
+	button_pins: button_pins {
+		reset_button {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+audio_pins: audio_pinmux {
+};
+        leds_pins: leds_pins {
+                led_5g {
+                        pins = "gpio34";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+                led_2g {
+                        pins = "gpio33";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+                led_sys {
+                        pins = "gpio26";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+		led_onekey {
+                        pins = "gpio28";
+                        function = "gpio";
+                        drive-strength = <8>;
+                        bias-pull-down;
+                };
+        };
+};
+
+&soc {
+	gpio_keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		button@1 {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+
+        leds {
+                compatible = "gpio-leds";
+                pinctrl-0 = <&leds_pins>;
+                pinctrl-names = "default";
+
+                led_blue: led@34 {
+                        label = "led_5g";
+                        gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_5g";
+                        default-state = "off";
+                };
+                led_green: led@33 {
+                        label = "led_2g";
+                        gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_2g";
+                        default-state = "off";
+                };
+                led_red: led@26 {
+                        label = "led_sys";
+                        gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_sys";
+                        default-state = "off";
+                };
+		led@28 {
+                        label = "led_onekey";
+                        gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
+                        linux,default-trigger = "led_onekey";
+                        default-state = "off";
+                };
+        };
+};
+
+&q6v5_wcss {
+	compatible = "qcom,ipq5018-q6-mpd";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	firmware = "IPQ5018/q6_fw.mdt";
+	reg = <0x0cd00000 0x4040>,
+		<0x1938000 0x8>,
+		<0x193d204 0x4>;
+	reg-names = "qdsp6",
+			"tcsr-msip",
+			"tcsr-q6";
+	resets = <&gcc GCC_WCSSAON_RESET>,
+			<&gcc GCC_WCSS_Q6_BCR>;
+
+	reset-names = "wcss_aon_reset",
+			"wcss_q6_reset";
+
+	clocks = <&gcc GCC_Q6_AXIS_CLK>,
+		<&gcc GCC_WCSS_ECAHB_CLK>,
+		<&gcc GCC_Q6_AXIM_CLK>,
+		<&gcc GCC_Q6_AXIM2_CLK>,
+		<&gcc GCC_Q6_AHB_CLK>,
+		<&gcc GCC_Q6_AHB_S_CLK>,
+		<&gcc GCC_WCSS_AXI_S_CLK>;
+	clock-names = "gcc_q6_axis_clk",
+		"gcc_wcss_ecahb_clk",
+		"gcc_q6_axim_clk",
+		"gcc_q6_axim2_clk",
+		"gcc_q6_ahb_clk",
+		"gcc_q6_ahb_s_clk",
+		"gcc_wcss_axi_s_clk";
+
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>;
+	#else
+		memory-region = <&q6_mem_regions>, <&q6_etr_region>,
+				<&q6_caldb_region>;
+	#endif
+
+	qcom,rproc = <&q6v5_wcss>;
+	qcom,bootargs_smem = <507>;
+	boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
+			<0x2 0x4 0x2 0x12 0x0 0x0>;
+	status = "ok";
+	q6_wcss_pd1: remoteproc_pd1@4ab000 {
+		compatible = "qcom,ipq5018-wcss-ahb-mpd";
+		reg = <0x4ab000 0x20>;
+		reg-names = "rmb";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "IPQ5018/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 8 0>,
+					<&wcss_smp2p_in 9 0>,
+					<&wcss_smp2p_in 12 0>,
+					<&wcss_smp2p_in 11 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		resets = <&gcc GCC_WCSSAON_RESET>,
+				<&gcc GCC_WCSS_BCR>,
+				<&gcc GCC_CE_BCR>;
+		reset-names = "wcss_aon_reset",
+				"wcss_reset",
+				"ce_reset";
+
+		clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
+				<&gcc GCC_WCSS_ACMT_CLK>,
+				<&gcc GCC_WCSS_AXI_M_CLK>;
+		clock-names = "gcc_wcss_ahb_s_clk",
+					"gcc_wcss_acmt_clk",
+					"gcc_wcss_axi_m_clk";
+
+		qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
+
+		qcom,smem-states = <&wcss_smp2p_out 8>,
+					<&wcss_smp2p_out 9>,
+					<&wcss_smp2p_out 10>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>;
+	#else
+		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
+				<&q6_etr_region>, <&q6_caldb_region>;
+	#endif
+
+	};
+
+	q6_wcss_pd2: remoteproc_pd2 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		m3_firmware = "qcn6122/m3_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 16 0>,
+					<&wcss_smp2p_in 17 0>,
+					<&wcss_smp2p_in 20 0>,
+					<&wcss_smp2p_in 19 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 16>,
+					<&wcss_smp2p_out 17>,
+					<&wcss_smp2p_out 18>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef __IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>;
+	#else
+		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
+				<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
+	#endif
+
+	};
+
+	q6_wcss_pd3: remoteproc_pd3 {
+		compatible = "qcom,ipq5018-wcss-pcie-mpd";
+		firmware = "IPQ5018/q6_fw.mdt";
+		interrupts-extended = <&wcss_smp2p_in 24 0>,
+					<&wcss_smp2p_in 25 0>,
+					<&wcss_smp2p_in 28 0>,
+					<&wcss_smp2p_in 27 0>;
+		interrupt-names = "fatal",
+					"ready",
+					"spawn-ack",
+					"stop-ack";
+
+		qcom,smem-states = <&wcss_smp2p_out 24>,
+					<&wcss_smp2p_out 25>,
+					<&wcss_smp2p_out 26>;
+		qcom,smem-state-names = "shutdown",
+					"stop",
+					"spawn";
+	#ifdef	__IPQ_MEM_PROFILE_256_MB__
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>;
+	#else
+		memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
+				<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
+	#endif
+	};
+};
+
+&i2c_0 {
+	pinctrl-0 = <&i2c_pins>;
+	pinctrl-names = "default";
+	status = "disabled";
+};
+
+&wifi0 {
+	/* IPQ5018 */
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x24>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
+	qcom,caldb-size = <0x200000>;
+	mem-region = <&q6_ipq5018_data>;
+#else
+	memory-region = <&q6_ipq5018_data>;
+#endif
+	status = "ok";
+};
+
+&wifi1 {
+	/* QCN6122 5G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
+	qcom,rproc = <&q6_wcss_pd2>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0x50>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
+	qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data1>;
+#else
+	memory-region = <&q6_qcn6122_data1>;
+#endif
+	status = "disabled";
+};
+
+&wifi2 {
+	/* QCN6122 6G */
+	qcom,multipd_arch;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
+	qcom,rproc = <&q6_wcss_pd3>;
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+	qcom,tgt-mem-mode = <2>;
+#else
+	qcom,tgt-mem-mode = <1>;
+#endif
+	qcom,board_id = <0xb0>;
+#ifdef __CNSS2__
+	qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
+	qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
+	qcom,caldb-size = <0x500000>;
+	mem-region = <&q6_qcn6122_data2>;
+#else
+	memory-region = <&q6_qcn6122_data2>;
+#endif
+	status = "ok";
+};
+
+
+&usb3 {
+	status = "ok";
+	device-power-gpio = <&tlmm 24 1>;
+};
+
+&dwc_0 {
+	/delete-property/ #phy-cells;
+	/delete-property/ phys;
+	/delete-property/ phy-names;
+};
+&hs_m31phy_0 {
+	status = "ok";
+};
+
+&eud {
+	status = "ok";
+};
+
+&pcie_x1 {
+	#status = "disabled";
+	#perst-gpio = <&tlmm 18 1>;
+	perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x2 {
+	#status = "disabled";
+	#perst-gpio = <&tlmm 15 1>;
+	perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_x1_rp {
+        status = "disabled";
+
+	mhi_0: qcom,mhi@0 {
+		reg = <0 0 0 0 0 >;
+	};
+};
+
+&pcie_x2_rp {
+        status = "disabled";
+
+	mhi_1: qcom,mhi@1 {
+		reg = <0 0 0 0 0 >;
+
+	};
+};
+

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-rap630c-311g.dts

@@ -151,6 +151,14 @@
 			no-map;
 			reg = <0x0 0x4F000000 0x0 0x100000>;
 		};
+
+		ramoops: ramoops@4f100000 {
+			compatible = "ramoops";
+			reg = <0x0 0x4f100000 0x0 0x80000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
 	#else
 	/*                 512MB/1GB Profiles
 	 * +==========+==============+=========================+
@@ -285,6 +293,13 @@
 			reg = <0x0 0x4F800000 0x0 0x500000>;
 		};
 
+		ramoops: ramoops@4fd00000 {
+			compatible = "ramoops";
+			reg = <0x0 0x4fd00000 0x0 0x80000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
 	#endif
 	};
 

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-rap630w-311g.dts

@@ -151,6 +151,14 @@
 			no-map;
 			reg = <0x0 0x4F000000 0x0 0x100000>;
 		};
+
+		ramoops: ramoops@4f100000 {
+			compatible = "ramoops";
+			reg = <0x0 0x4f100000 0x0 0x80000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
 	#else
 	/*                 512MB/1GB Profiles
 	 * +==========+==============+=========================+
@@ -285,6 +293,13 @@
 			reg = <0x0 0x4F800000 0x0 0x500000>;
 		};
 
+		ramoops: ramoops@4fd00000 {
+			compatible = "ramoops";
+			reg = <0x0 0x4fd00000 0x0 0x80000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
 	#endif
 	};
 
@@ -393,8 +408,8 @@
 				mdio-bus = <&mdio1>;
 				reset_gpio = <&tlmm 0x26 0>;
 				switch_cpu_bmp = <0x40>;  /* cpu port bitmap (Port 6 GMAC) */
-				switch_lan_bmp = <0x3c>; /* lan port bitmap */
-				switch_wan_bmp = <0x0>;  /* wan port bitmap */
+				switch_lan_bmp = <0x1c>; /* lan port bitmap */
+				switch_wan_bmp = <0x20>;  /* wan port bitmap */
 				qca,ar8327-initvals = <
 						0x00004 0x7600000   /* PAD0_MODE */
 						0x00008 0x1000000   /* PAD5_MODE */

feeds/ipq807x_v5.4/ipq50xx/files/arch/arm64/boot/dts/qcom/qcom-ipq5018-rap630w-312g.dts

@@ -154,6 +154,14 @@
 			no-map;
 			reg = <0x0 0x4F000000 0x0 0x100000>;
 		};
+
+		ramoops: ramoops@4f100000 {
+			compatible = "ramoops";
+			reg = <0x0 0x4f100000 0x0 0x80000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
 	#else
 	/*		 512MB/1GB Profiles
 	 * +==========+==============+=========================+
@@ -288,6 +296,13 @@
 			reg = <0x0 0x4F800000 0x0 0x500000>;
 		};
 
+		ramoops: ramoops@4fd00000 {
+			compatible = "ramoops";
+			reg = <0x0 0x4fd00000 0x0 0x80000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
 	#endif
 	};
 

feeds/ipq807x_v5.4/ipq50xx/image/ipq50xx.mk

@@ -93,6 +93,42 @@ define Device/edgecore_eap104
 endef
 TARGET_DEVICES += edgecore_eap104
 
+define Device/indio_um-325ax-v2
+  DEVICE_TITLE := Indio UM-325ax-V2
+  DEVICE_DTS := qcom-ipq5018-indio-um-325ax-v2
+  SUPPORTED_DEVICES := indio,um-325ax-v2
+  DEVICE_PACKAGES := ath11k-wifi-indio-um-325ax-v2 ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
+  DEVICE_DTS_CONFIG := config@mp03.5-c1
+endef
+TARGET_DEVICES += indio_um-325ax-v2
+
+define Device/indio_um-335ax
+  DEVICE_TITLE := Indio UM-335ax
+  DEVICE_DTS := qcom-ipq5018-indio-um-335ax
+  SUPPORTED_DEVICES := indio,um-335ax
+  DEVICE_PACKAGES := ath11k-wifi-indio-um-335ax ath11k-firmware-qcn9000 ath11k-firmware-ipq50xx-spruce
+  DEVICE_DTS_CONFIG := config@mp03.1
+endef
+TARGET_DEVICES += indio_um-335ax
+
+define Device/indio_um-525axp
+  DEVICE_TITLE := Indio UM-525axp
+  DEVICE_DTS := qcom-ipq5018-indio-um-525axp
+  SUPPORTED_DEVICES := indio,um-525axp
+  DEVICE_PACKAGES := ath11k-wifi-indio-um-525axp ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
+  DEVICE_DTS_CONFIG := config@mp03.5-c1
+endef
+TARGET_DEVICES += indio_um-525axp
+
+define Device/indio_um-525axm
+  DEVICE_TITLE := Indio UM-525axm
+  DEVICE_DTS := qcom-ipq5018-indio-um-525axm
+  SUPPORTED_DEVICES := indio,um-525axm
+  DEVICE_PACKAGES := ath11k-wifi-indio-um-525axm ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
+  DEVICE_DTS_CONFIG := config@mp03.5-c1
+endef
+TARGET_DEVICES += indio_um-525axm
+
 define Device/udaya_a6_id2
   DEVICE_TITLE := Udaya A6 - ID2
   DEVICE_DTS := qcom-ipq5018-udaya-a6-id2

feeds/ipq807x_v5.4/ipq50xx/modules.mk

@@ -242,3 +242,17 @@ define KernelPackage/bootconfig/description
 endef
 
 $(eval $(call KernelPackage,bootconfig))
+
+define KernelPackage/mdio-qca
+  SUBMENU:=$(NETWORK_DEVICES_MENU)
+  TITLE:=Model for MDIO to QCA PHY connection
+  KCONFIG:=CONFIG_MDIO_QCA
+  FILES:=$(LINUX_DIR)/drivers/net/phy/mdio-qca.ko
+  AUTOLOAD:=$(call AutoLoad,30,mdio-qca)
+endef
+
+define KernelPackage/mdio-qca/description
+ This driver supports the MDIO interface found in Qualcomm Atheros ipq Soc chip.
+endef
+
+$(eval $(call KernelPackage,mdio-qca))

feeds/ipq807x_v5.4/ipq60xx/base-files/etc/board.d/02_network

@@ -20,6 +20,7 @@ qcom_setup_interfaces()
 		ucidef_set_interface_wan "eth0 eth1"
 		ucidef_set_interface_lan ""
 		;;
+	indio,um-310ax-v1|\
 	yuncore,ax840)
 		ucidef_set_interface_lan "eth0"
 		ucidef_set_interface_wan "eth1"
@@ -79,6 +80,7 @@ qcom_setup_macs()
 	emplus,wap386v2)
 		wan_mac=$(cat /sys/class/net/eth0/address)
 		;;
+	indio,um-310ax-v1|\
 	yuncore,ax840)
 		wan_mac=$(cat /sys/class/net/eth1/address)
 		lan_mac=$(macaddr_add "$wan_mac" 1)

feeds/ipq807x_v5.4/ipq60xx/base-files/etc/hotplug.d/firmware/10-ath11k-caldata

@@ -82,6 +82,7 @@ case "$FIRMWARE" in
 	hfcl,ion4x_2|\
 	hfcl,ion4x_3|\
 	hfcl,ion4xe|\
+	indio,um-310ax-v1|\
 	wallys,dr6018|\
 	wallys,dr6018-v4|\
 	yuncore,ax840|\

feeds/ipq807x_v5.4/ipq60xx/base-files/lib/upgrade/platform.sh

@@ -119,6 +119,7 @@ platform_check_image() {
 	cig,wf196|\
 	glinet,ax1800|\
 	glinet,axt1800|\
+	indio,um-310ax-v1|\
 	wallys,dr6018|\
 	wallys,dr6018-v4|\
 	edgecore,eap101|\
@@ -156,6 +157,7 @@ platform_do_upgrade() {
 		;;
 	glinet,ax1800|\
 	glinet,axt1800|\
+	indio,um-310ax-v1|\
 	wallys,dr6018|\
 	wallys,dr6018-v4|\
 	yuncore,ax840|\

feeds/ipq807x_v5.4/ipq60xx/files/arch/arm64/boot/dts/qcom/qcom-ipq6018-indio-um-310ax-v1.dts

@@ -0,0 +1,321 @@
+/dts-v1/;
+/*
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ipq6018.dtsi"
+#include "ipq6018-cpr-regulator.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Indio UM-310AX V1";
+	compatible = "indio,um-310ax-v1", "qcom,ipq6018-cp03", "qcom,ipq6018";
+	interrupt-parent = <&intc>;
+	qcom,msm-id = <0x1A5 0x0>;
+
+	aliases {
+		/*
+		 * Aliases as required by u-boot
+		 * to patch MAC addresses
+		 */
+		ethernet0 = "/soc/dp2";
+		ethernet1 = "/soc/dp1";
+		led-boot = &led_system;
+		led-failsafe = &led_system;
+		led-running = &led_system;
+		led-upgrade = &led_system;
+	};
+
+	chosen {
+		bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
+#ifdef __IPQ_MEM_PROFILE_256_MB__
+		bootargs-append = " swiotlb=1";
+#else
+		bootargs-append = " swiotlb=1 coherent_pool=2M";
+#endif
+	};
+
+	/*
+	 * +=========+==============+========================+
+	 * |        |              |                         |
+	 * | Region | Start Offset |          Size           |
+	 * |        |              |                         |
+	 * +--------+--------------+-------------------------+
+	 * |        |              |                         |
+	 * |        |              |                         |
+	 * |        |              |                         |
+	 * |        |              |                         |
+	 * | Linux  |  0x41000000  |         139MB           |
+	 * |        |              |                         |
+	 * |        |              |                         |
+	 * |        |              |                         |
+	 * +--------+--------------+-------------------------+
+	 * | TZ App |  0x49B00000  |           6MB           |
+	 * +--------+--------------+-------------------------+
+	 *
+	 * From the available 145 MB for Linux in the first 256 MB,
+	 * we are reserving 6 MB for TZAPP.
+	 *
+	 * Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi
+	 * for memory layout.
+	 */
+
+/* TZAPP is enabled only in default memory profile */
+#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__)
+	reserved-memory {
+		tzapp:tzapp@49B00000 {	/* TZAPPS */
+			no-map;
+			reg = <0x0 0x49B00000 0x0 0x00600000>;
+		};
+	};
+#endif
+};
+
+&tlmm {
+	uart_pins: uart_pins {
+		mux {
+			pins = "gpio44", "gpio45";
+			function = "blsp2_uart";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	spi_0_pins: spi_0_pins {
+		mux {
+			pins = "gpio38", "gpio39", "gpio40", "gpio41";
+			function = "blsp0_spi";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	button_pins: button_pins {
+		wps_button {
+			pins = "gpio9";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	mdio_pins: mdio_pinmux {
+		mux_0 {
+			pins = "gpio64";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+		mux_1 {
+			pins = "gpio65";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+		mux_2 {
+			pins = "gpio75";
+			function = "gpio";
+			bias-pull-up;
+		};
+	};
+
+	leds_pins: leds_pins {
+		led_blue {
+			pins = "gpio35";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+
+		led_green {
+			pins = "gpio37";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+
+		led_red {
+			pins = "gpio32";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+	};
+
+	button_pins: button_pins {
+		rst_button {
+			pins = "gpio19";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+};
+
+&soc {
+	mdio@90000 {
+		pinctrl-0 = <&mdio_pins>;
+		pinctrl-names = "default";
+		phy-reset-gpio = <&tlmm 75 0>;
+		status = "ok";
+		phy0: ethernet-phy@0 {
+			reg = <3>;
+		};
+		phy1: ethernet-phy@1 {
+			reg = <4>;
+		};
+	};
+
+	ess-switch@3a000000 {
+		switch_cpu_bmp =   <0x01>; /* cpu port bitmap */
+		switch_lan_bmp =   <0x10>; /* lan port bitmap */
+		switch_wan_bmp =   <0x20>; /* wan port bitmap */
+		switch_inner_bmp = <0x80>; /*inner port bitmap*/
+		switch_mac_mode =  <0x00>; /* mac mode for uniphy instance0*/
+		switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
+		switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
+
+		qcom,port_phyinfo {
+			port@3 {
+				port_id = <0x04>;
+				phy_address = <0x03>;
+			};
+
+			port@4 {
+				port_id = <0x05>;
+				phy_address = <0x04>;
+			};
+		};
+	};
+
+	dp1 {
+		device_type = "network";
+		compatible = "qcom,nss-dp";
+		qcom,id = <0x04>;
+		reg = <0x3a001600 0x200>;
+		qcom,mactype = <0x00>;
+		local-mac-address = [00 00 00 00 00 00];
+		qcom,link-poll = <0x01>;
+		qcom,phy-mdio-addr = <0x03>;
+		phy-mode = "sgmii";
+	};
+
+	dp2 {
+		device_type = "network";
+		compatible = "qcom,nss-dp";
+		qcom,id = <0x05>;
+		reg = <0x3a001800 0x200>;
+		qcom,mactype = <0x00>;
+		local-mac-address = [00 00 00 00 00 00];
+		qcom,link-poll = <0x01>;
+		qcom,phy-mdio-addr = <0x04>;
+		phy-mode = "sgmii";
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		pinctrl-0 = <&button_pins>;
+		pinctrl-names = "default";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
+			linux,input-type = <1>;
+			debounce-interval = <60>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&leds_pins>;
+		pinctrl-names = "default";
+
+		led_system: system {
+			label = "ax860:green:system";
+			gpio = <&tlmm 37 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2g {
+			label = "ax860:blue:wlan2g";
+			gpio = <&tlmm 35 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan5g {
+			label = "ax860:red:wlan5g";
+			gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&blsp1_uart3 {
+	pinctrl-0 = <&uart_pins>;
+	pinctrl-names = "default";
+	status = "ok";
+};
+
+&spi_0 {
+	pinctrl-0 = <&spi_0_pins>;
+	pinctrl-names = "default";
+	cs-select = <0>;
+	status = "ok";
+
+	m25p80@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		compatible = "n25q128a11";
+		linux,modalias = "m25p80", "n25q128a11";
+		spi-max-frequency = <50000000>;
+		use-default-sizes;
+	};
+};
+
+&qpic_bam {
+	status = "ok";
+};
+
+&qpic_nand {
+	status = "ok";
+
+	nand@0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+	};
+};
+
+&ssphy_0 {
+	status = "ok";
+};
+
+&qusb_phy_0 {
+	status = "ok";
+};
+
+&usb3 {
+	status = "ok";
+};
+
+&nss_crypto {
+	status = "ok";
+};

feeds/ipq807x_v5.4/ipq60xx/image/ipq60xx.mk

@@ -92,7 +92,7 @@ define Device/indio_um-310ax-v1
   SUPPORTED_DEVICES := indio,um-310ax-v1
   DEVICE_PACKAGES := ath11k-wifi-indio-um-310ax-v1 uboot-env
 endef
-#TARGET_DEVICES += indio_um-310ax-v1
+TARGET_DEVICES += indio_um-310ax-v1
 
 define Device/indio_um-510axp-v1
   DEVICE_TITLE := Indio UM-510AXP V1

feeds/ipq807x_v5.4/ipq807x/base-files/etc/board.d/01_leds

@@ -14,7 +14,8 @@ cig,wf194c4)
 	;;
 edgecore,eap102|\
 edgecore,oap102|\
-edgecore,oap103)
+edgecore,oap103|\
+indio,um-345ax)
 	ucidef_set_led_netdev "poe" "poe" "green:wan" "eth0"
         ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy0tpt"
         ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy1tpt"

feeds/ipq807x_v5.4/ipq807x/base-files/etc/board.d/02_network

@@ -18,7 +18,8 @@ qcom_setup_interfaces()
 		ucidef_set_interface_wan "eth0"
 		ucidef_set_interface_lan ""
 		;;
-	cig,wf194c4)
+	cig,wf194c4|\
+	indio,um-345ax)
 		ucidef_set_interface_lan "eth0"
 		ucidef_set_interface_wan "eth1"
 		;;

feeds/ipq807x_v5.4/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata

@@ -73,6 +73,7 @@ case "$FIRMWARE" in
 	edgecore,oap103 |\
 	edgecore,eap106 |\
 	emplus,wap380c|\
+	indio,um-345ax|\
 	qcom,ipq807x-hk01|\
 	qcom,ipq807x-hk14|\
 	tplink,ex227|\
@@ -107,7 +108,8 @@ ath11k-macs)
 	edgecore,eap102|\
 	edgecore,oap102|\
 	edgecore,oap103|\
-	edgecore,eap106)
+	edgecore,eap106|\
+	indio,um-345ax)
 		ath11k_generate_macs
 		;;
 	cig,wf196)

feeds/ipq807x_v5.4/ipq807x/base-files/lib/upgrade/platform.sh

@@ -30,6 +30,7 @@ platform_check_image() {
 	edgecore,oap103|\
 	edgecore,eap106|\
 	emplus,wap380c|\
+	indio,um-345ax|\
 	sonicfi,rap650c|\
 	tplink,ex227|\
 	tplink,ex447)
@@ -61,7 +62,8 @@ platform_do_upgrade() {
 	tplink,ex447)
 		nand_upgrade_tar "$1"
 		;;
-	edgecore,eap106)
+	edgecore,eap106|\
+	indio,um-345ax)
 		CI_UBIPART="rootfs1"
 		[ "$(find_mtd_chardev rootfs)" ] && CI_UBIPART="rootfs"
 		nand_upgrade_tar "$1"

feeds/ipq807x_v5.4/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-indio-um-345ax.dts

@@ -0,0 +1,713 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>
+ */
+
+/dts-v1/;
+
+#include "ipq8074.dtsi"
+#include "ipq8074-ac-cpu.dtsi"
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	model = "Indio UM-345AX";
+	compatible = "indio,um-345ax", "qcom,ipq807x-hk09", "qcom,ipq807x";
+	qcom,msm-id = <0x178 0x0>;
+	interrupt-parent = <&intc>;
+
+	aliases {
+		serial0 = &blsp1_uart5;
+		/* Aliases as required by u-boot to patch MAC addresses */
+		ethernet1 = "/soc/dp5";
+		ethernet0 = "/soc/dp6";
+
+		led-boot = &led_red;
+		led-failsafe = &led_red;
+		led-running = &led_green;
+		led-upgrade = &led_green;
+		led-gateway = &led_blue;
+		led-factory = &led_blue;
+	};
+
+	chosen {
+		stdout-path = "serial0";
+	};
+
+	soc {
+		pinctrl@1000000 {
+			pinctrl-0 = <&mcu_rst &mcu_rsv &usb_rear_pwr &usb_side_pwr &usb_hub_rst>;
+			pinctrl-names = "default";
+
+			mcu_rst: mcu_rst_pins {
+				pins = "gpio54";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-low;
+			};
+
+			mcu_rsv: mcu_rsv_pins {
+				pins = "gpio56";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+			};
+
+			usb_rear_pwr: usb_rear_pwr_pins {
+				pins = "gpio29";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
+			usb_side_pwr: usb_side_pwr_pins {
+				pins = "gpio30";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
+			usb_hub_rst: usb_hub_rst_pins {
+				pins = "gpio55";
+				function = "gpio";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+
+			button_pins: button_pins {
+				reset_button {
+					pins = "gpio57";
+					function = "gpio";
+					drive-strength = <8>;
+					bias-pull-up;
+				};
+			};
+
+			mdio_pins: mdio_pinmux {
+				mux_0 {
+					pins = "gpio68";
+					function = "mdc";
+					drive-strength = <8>;
+					bias-pull-up;
+				};
+				mux_1 {
+					pins = "gpio69";
+					function = "mdio";
+					drive-strength = <8>;
+					bias-pull-up;
+				};
+				mux_2 {
+					pins = "gpio25";
+					function = "gpio";
+					bias-pull-up;
+				};
+				mux_3 {
+					pins = "gpio44";
+					function = "gpio";
+					bias-pull-up;
+				};
+			};
+			led_pins: led_pins {
+				led_red {
+					pins = "gpio0";
+					function = "gpio";
+					drive-strength = <8>;
+					bias-pull-down;
+				};
+
+				led_2g {
+					pins = "gpio2";
+					function = "gpio";
+					drive-strength = <8>;
+					bias-pull-down;
+				};
+
+				led_5g {
+					pins = "gpio9";
+					function = "gpio";
+					drive-strength = <8>;
+					bias-pull-down;
+				};
+			};
+		};
+
+		serial@78b3000 {
+			status = "ok";
+		};
+
+		spi@78b5000 {
+			status = "ok";
+			pinctrl-0 = <&spi_0_pins>;
+			pinctrl-names = "default";
+			cs-select = <0>;
+
+			m25p80@0 {
+				  compatible = "n25q128a11";
+				  #address-cells = <1>;
+				  #size-cells = <1>;
+				  reg = <0>;
+				  spi-max-frequency = <50000000>;
+			};
+		};
+
+		dma@7984000 {
+			 status = "ok";
+		};
+
+		nand@79b0000 {
+			status = "ok";
+
+			nand@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				nand-ecc-strength = <4>;
+				nand-ecc-step-size = <512>;
+				nand-bus-width = <8>;
+			};
+		};
+
+		qusb@79000 {
+			status = "ok";
+		};
+
+		ssphy@78000 {
+			status = "ok";
+		};
+
+		usb3@8A00000 {
+			status = "ok";
+		};
+
+		usb3@8C00000 {
+			status = "ok";
+		};
+
+		qusb@59000 {
+			status = "ok";
+		};
+
+		ssphy@58000 {
+			status = "ok";
+		};
+
+		usb3@8C00000 {
+			status = "ok";
+		};
+
+		gpio_keys {
+			compatible = "gpio-keys";
+			pinctrl-0 = <&button_pins>;
+			pinctrl-names = "default";
+			status = "ok";
+
+			button@1 {
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
+				linux,input-type = <1>;
+				debounce-interval = <60>;
+			};
+		};
+
+		mdio: mdio@90000 {
+			pinctrl-0 = <&mdio_pins>;
+			pinctrl-names = "default";
+			phy-reset-gpio = <&tlmm 37 0 &tlmm 25 1 &tlmm 44 1>;
+			phy0: ethernet-phy@0 {
+				reg = <0>;
+			};
+			phy1: ethernet-phy@1 {
+				reg = <1>;
+			};
+			phy2: ethernet-phy@2 {
+				reg = <2>;
+			};
+			phy3: ethernet-phy@3 {
+				reg = <3>;
+			};
+			phy4: ethernet-phy@4 {
+				reg = <24>;
+			};
+			phy5: ethernet-phy@5 {
+				reg = <28>;
+			};
+		};
+
+		ess-switch@3a000000 {
+			switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+			switch_lan_bmp = <0x3e>; /* lan port bitmap */
+			switch_wan_bmp = <0x40>; /* wan port bitmap */
+			switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
+			switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
+			switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
+			bm_tick_mode = <0>; /* bm tick mode */
+			tm_tick_mode = <0>; /* tm tick mode */
+			qcom,port_phyinfo {
+				port@0 {
+					port_id = <1>;
+					phy_address = <0>;
+				};
+				port@1 {
+					port_id = <2>;
+					phy_address = <1>;
+				};
+				port@2 {
+					port_id = <3>;
+					phy_address = <2>;
+				};
+				port@3 {
+					port_id = <4>;
+					phy_address = <3>;
+				};
+				port@4 {
+					port_id = <5>;
+					phy_address = <24>;
+					port_mac_sel = "QGMAC_PORT";
+				};
+				port@5 {
+					port_id = <6>;
+					phy_address = <28>;
+					port_mac_sel = "QGMAC_PORT";
+				};
+			};
+			port_scheduler_resource {
+				port@0 {
+					port_id = <0>;
+					ucast_queue = <0 143>;
+					mcast_queue = <256 271>;
+					l0sp = <0 35>;
+					l0cdrr = <0 47>;
+					l0edrr = <0 47>;
+					l1cdrr = <0 7>;
+					l1edrr = <0 7>;
+				};
+				port@1 {
+					port_id = <1>;
+					ucast_queue = <144 159>;
+					mcast_queue = <272 275>;
+					l0sp = <36 39>;
+					l0cdrr = <48 63>;
+					l0edrr = <48 63>;
+					l1cdrr = <8 11>;
+					l1edrr = <8 11>;
+				};
+				port@2 {
+					port_id = <2>;
+					ucast_queue = <160 175>;
+					mcast_queue = <276 279>;
+					l0sp = <40 43>;
+					l0cdrr = <64 79>;
+					l0edrr = <64 79>;
+					l1cdrr = <12 15>;
+					l1edrr = <12 15>;
+				};
+				port@3 {
+					port_id = <3>;
+					ucast_queue = <176 191>;
+					mcast_queue = <280 283>;
+					l0sp = <44 47>;
+					l0cdrr = <80 95>;
+					l0edrr = <80 95>;
+					l1cdrr = <16 19>;
+					l1edrr = <16 19>;
+				};
+				port@4 {
+					port_id = <4>;
+					ucast_queue = <192 207>;
+					mcast_queue = <284 287>;
+					l0sp = <48 51>;
+					l0cdrr = <96 111>;
+					l0edrr = <96 111>;
+					l1cdrr = <20 23>;
+					l1edrr = <20 23>;
+				};
+				port@5 {
+					port_id = <5>;
+					ucast_queue = <208 223>;
+					mcast_queue = <288 291>;
+					l0sp = <52 55>;
+					l0cdrr = <112 127>;
+					l0edrr = <112 127>;
+					l1cdrr = <24 27>;
+					l1edrr = <24 27>;
+				};
+				port@6 {
+					port_id = <6>;
+					ucast_queue = <224 239>;
+					mcast_queue = <292 295>;
+					l0sp = <56 59>;
+					l0cdrr = <128 143>;
+					l0edrr = <128 143>;
+					l1cdrr = <28 31>;
+					l1edrr = <28 31>;
+				};
+				port@7 {
+					port_id = <7>;
+					ucast_queue = <240 255>;
+					mcast_queue = <296 299>;
+					l0sp = <60 63>;
+					l0cdrr = <144 159>;
+					l0edrr = <144 159>;
+					l1cdrr = <32 35>;
+					l1edrr = <32 35>;
+				};
+			};
+			port_scheduler_config {
+				port@0 {
+					port_id = <0>;
+					l1scheduler {
+						group@0 {
+							sp = <0 1>; /*L0 SPs*/
+							/*cpri cdrr epri edrr*/
+							cfg = <0 0 0 0>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							/*unicast queues*/
+							ucast_queue = <0 4 8>;
+							/*multicast queues*/
+							mcast_queue = <256 260>;
+							/*sp cpri cdrr epri edrr*/
+							cfg = <0 0 0 0 0>;
+						};
+						group@1 {
+							ucast_queue = <1 5 9>;
+							mcast_queue = <257 261>;
+							cfg = <0 1 1 1 1>;
+						};
+						group@2 {
+							ucast_queue = <2 6 10>;
+							mcast_queue = <258 262>;
+							cfg = <0 2 2 2 2>;
+						};
+						group@3 {
+							ucast_queue = <3 7 11>;
+							mcast_queue = <259 263>;
+							cfg = <0 3 3 3 3>;
+						};
+					};
+				};
+				port@1 {
+					port_id = <1>;
+					l1scheduler {
+						group@0 {
+							sp = <36>;
+							cfg = <0 8 0 8>;
+						};
+						group@1 {
+							sp = <37>;
+							cfg = <1 9 1 9>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <144>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <272>;
+							mcast_loop_pri = <4>;
+							cfg = <36 0 48 0 48>;
+						};
+					};
+				};
+				port@2 {
+					port_id = <2>;
+					l1scheduler {
+						group@0 {
+							sp = <40>;
+							cfg = <0 12 0 12>;
+						};
+						group@1 {
+							sp = <41>;
+							cfg = <1 13 1 13>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <160>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <276>;
+							mcast_loop_pri = <4>;
+							cfg = <40 0 64 0 64>;
+						};
+					};
+				};
+				port@3 {
+					port_id = <3>;
+					l1scheduler {
+						group@0 {
+							sp = <44>;
+							cfg = <0 16 0 16>;
+						};
+						group@1 {
+							sp = <45>;
+							cfg = <1 17 1 17>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <176>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <280>;
+							mcast_loop_pri = <4>;
+							cfg = <44 0 80 0 80>;
+						};
+					};
+				};
+				port@4 {
+					port_id = <4>;
+					l1scheduler {
+						group@0 {
+							sp = <48>;
+							cfg = <0 20 0 20>;
+						};
+						group@1 {
+							sp = <49>;
+							cfg = <1 21 1 21>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <192>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <284>;
+							mcast_loop_pri = <4>;
+							cfg = <48 0 96 0 96>;
+						};
+					};
+				};
+				port@5 {
+					port_id = <5>;
+					l1scheduler {
+						group@0 {
+							sp = <52>;
+							cfg = <0 24 0 24>;
+						};
+						group@1 {
+							sp = <53>;
+							cfg = <1 25 1 25>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <208>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <288>;
+							mcast_loop_pri = <4>;
+							cfg = <52 0 112 0 112>;
+						};
+					};
+				};
+				port@6 {
+					port_id = <6>;
+					l1scheduler {
+						group@0 {
+							sp = <56>;
+							cfg = <0 28 0 28>;
+						};
+						group@1 {
+							sp = <57>;
+							cfg = <1 29 1 29>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <224>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <292>;
+							mcast_loop_pri = <4>;
+							cfg = <56 0 128 0 128>;
+						};
+					};
+				};
+				port@7 {
+					port_id = <7>;
+					l1scheduler {
+						group@0 {
+							sp = <60>;
+							cfg = <0 32 0 32>;
+						};
+						group@1 {
+							sp = <61>;
+							cfg = <1 33 1 33>;
+						};
+					};
+					l0scheduler {
+						group@0 {
+							ucast_queue = <240>;
+							ucast_loop_pri = <16>;
+							mcast_queue = <296>;
+							cfg = <60 0 144 0 144>;
+						};
+					};
+				};
+			};
+		};
+
+		dp6 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			qcom,id = <6>;
+			reg = <0x3a001800 0x200>;
+			qcom,mactype = <0>;
+			local-mac-address = [000000000000];
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <28>;
+			phy-mode = "sgmii";
+		};
+
+		dp5 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			qcom,id = <5>;
+			reg = <0x3a001a00 0x200>;
+			qcom,mactype = <0>;
+			local-mac-address = [000000000000];
+			qcom,link-poll = <1>;
+			qcom,phy-mdio-addr = <24>;
+			phy-mode = "sgmii";
+		};
+
+		leds {
+			compatible = "gpio-leds";
+			pinctrl-0 = <&led_pins>;
+			pinctrl-names = "default";
+
+			led_red: led_sys {
+				label = "led_sys";
+				gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+				default-state = "off";
+				linux,default-trigger = "led_pwr";
+			};
+
+			led_green: led_2g {
+				label = "led_2g";
+				gpio = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+				default-state = "off";
+			};
+
+			led_blue: led_5g {
+				label = "led_5g";
+				gpio = <&tlmm 9 GPIO_ACTIVE_HIGH>;
+				default-state = "off";
+			};
+		};
+		nss-macsec0 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x18>;
+			mdiobus = <&mdio>;
+		};
+		nss-macsec1 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <0x1c>;
+			mdiobus = <&mdio>;
+		};
+	};
+};
+
+&apc_cpr {
+	/* Same CPR configuration as OAK */
+	compatible = "qcom,cpr4-ipq817x-apss-regulator";
+
+	thread@0 {
+		apc_vreg: regulator {
+			regulator-min-microvolt = <1>;
+			regulator-max-microvolt = <2>;
+			qcom,cpr-fuse-corners = <2>;
+			qcom,cpr-corners = <3>;
+			qcom,cpr-speed-bin-corners = <3>;
+			qcom,cpr-corner-fmax-map = <1 3>;
+
+			qcom,cpr-voltage-ceiling =
+				<840000 904000 944000>;
+			qcom,cpr-voltage-floor =
+				<592000 648000 712000>;
+			qcom,corner-frequencies =
+				<1017600000 1382400000 1382400000>;
+
+			qcom,cpr-open-loop-voltage-fuse-adjustment-0 =
+				/* Speed bin 0; CPR rev 0..7 */
+				< 0      0>,
+				< 0      0>,
+				< 0      0>,
+				< 0      0>,
+				< 0      0>,
+				< 0      0>,
+				< 0      0>,
+				< 0      0>;
+
+			qcom,cpr-open-loop-voltage-fuse-adjustment-1 =
+				/* Speed bin 0; CPR rev 0..7 */
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				< 20000  26000>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>;
+
+			qcom,cpr-open-loop-voltage-fuse-adjustment-v2-0 =
+				/* Speed bin 0; CPR rev 0..7 */
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>;
+
+			qcom,cpr-open-loop-voltage-fuse-adjustment-v2-1 =
+				/* Speed bin 0; CPR rev 0..7 */
+				<     0      0>,
+				<     0   7000>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>,
+				<     0      0>;
+
+			qcom,cpr-floor-to-ceiling-max-range =
+				< 40000 40000 40000>,
+				< 40000 40000 40000>,
+				< 40000 40000 40000>,
+				< 40000 40000 40000>,
+				< 40000 40000 40000>,
+				< 40000 40000 40000>,
+				< 40000 40000 40000>,
+				< 40000 40000 40000>;
+		};
+	};
+};
+
+&npu_cpr {
+	status = "disabled";
+};
+
+&nss0 {
+        qcom,low-frequency = <187200000>;
+        qcom,mid-frequency = <748800000>;
+        qcom,max-frequency = <1497600000>;
+};
+
+&nss0 {
+	npu-supply = <&dummy_reg>;
+	mx-supply = <&dummy_reg>;
+};
+
+&wifi0 {
+	qcom,board_id = <0x92>;
+};
+
+&wifi1 {
+	qcom,board_id = <0x292>;
+};

feeds/ipq807x_v5.4/ipq807x/image/ipq807x.mk

@@ -66,6 +66,15 @@ define Device/emplus_wap380c
 endef
 TARGET_DEVICES += emplus_wap380c
 
+define Device/indio_um-345ax
+  DEVICE_TITLE := Indio UM-345AX
+  DEVICE_DTS := qcom-ipq807x-indio-um-345ax
+  DEVICE_DTS_CONFIG=config@hk09
+  SUPPORTED_DEVICES := indio,um-345ax
+  DEVICE_PACKAGES := ath11k-wifi-indio-um-345ax uboot-envtools
+endef
+TARGET_DEVICES += indio_um-345ax
+
 define Device/sonicfi_rap650c
   DEVICE_TITLE := SonicFi RAP650C
   DEVICE_DTS := qcom-ipq807x-rap650c

feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-edgecore-eap112.dts

@@ -169,7 +169,8 @@
 		compatible = "mediatek,eth-mac";
 		reg = <0>;
 		phy-mode = "sgmii";
-		phy-handle = <&phy1>;      // add phy handler
+		phy-handle = <&phy30>;
+		phy-handle2 = <&phy1>;
 		mtd-mac-address = <&factory 0x24>;
 	};
 
@@ -193,6 +194,16 @@
 			nvmem-cell-names = "phy-cal-data";
 		};
 
+		phy30: ethernet-phy@30 { // AN8801SB
+			compatible = "ethernet-phy-idc0ff.0421";
+			reg = <30>; //0x1e
+			phy-mode = "sgmii";
+			full-duplex;
+			pause;
+			airoha,surge = <0>;
+			airoha,polarity = <2>;
+		};
+
 		phy1: ethernet-phy@1 {
 			compatible = "ethernet-phy-id03a2.9471";
 			reg = <24>;            // set phy address to 0x18
@@ -200,9 +211,8 @@
 			reset-assert-us = <600>;
 			reset-deassert-us = <20000>;
 			phy-mode = "sgmii";
-    };
-
-        };
+		};
+	};
 };
 
 &hnat {

feeds/qca-wifi-7/ath12k-wifi/Makefile

@@ -93,6 +93,11 @@ $(call Package/ath12k-wifi-default)
     TITLE:=board-2.bin for NWA130BE
 endef
 
+define Package/ath12k-wifi-zyxel-nwa50be
+$(call Package/ath12k-wifi-default)
+    TITLE:=board-2.bin for NWA50BE
+endef
+
 define Package/ath12k-wifi-cig-wf672
 $(call Package/ath12k-wifi-default)
     TITLE:=board-2.bin for WF672
@@ -191,6 +196,14 @@ define Package/ath12k-wifi-zyxel-nwa130be/install
 	$(INSTALL_DATA) ./board-2.bin.nwa130be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
 endef
 
+define Package/ath12k-wifi-zyxel-nwa50be/install
+	$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/
+	$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
+	$(INSTALL_DATA) ./board-2.bin.nwa50be.QCN6432 $(1)/lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin
+	$(INSTALL_DATA) ./board-2.bin.nwa50be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
+	$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
+endef
+
 define Package/ath12k-wifi-cig-wf672/install
 	$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
 	$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
@@ -210,4 +223,5 @@ $(eval $(call BuildPackage,ath12k-wifi-cig-wf189h))
 $(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip))
 $(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip-v4))
 $(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa130be))
+$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa50be))
 $(eval $(call BuildPackage,ath12k-wifi-cig-wf672))

feeds/qca-wifi-7/ath12k-wifi/board-2-nwa50be-IPQ5332.json

@@ -0,0 +1,20 @@
+[
+    {
+        "board": [
+            {
+                "names": [
+                    "bus=ahb,qmi-chip-id=0,qmi-board-id=18"
+                ],
+                "data": "nwa50be-IPQ5332.bin"
+            }
+        ],
+        "regdb": [
+            {
+                "names": [
+                    "bus=ahb,qmi-chip-id=0,qmi-board-id=18"
+                ],
+                "data": "ipq5332.regdb"
+            }
+        ]
+    }
+]

feeds/qca-wifi-7/ath12k-wifi/board-2-nwa50be-QCN6432.json

@@ -0,0 +1,20 @@
+[
+    {
+        "board": [
+            {
+                "names": [
+                    "bus=ahb,qmi-chip-id=0,qmi-board-id=112"
+                ],
+                "data": "nwa50be-QCN6432.bin"
+            }
+        ],
+        "regdb": [
+            {
+                "names": [
+                    "bus=ahb,qmi-chip-id=0,qmi-board-id=112"
+                ],
+                "data": "ipq5332_qcn6432.regdb"
+            }
+        ]
+    }
+]

feeds/qca-wifi-7/ath12k-wifi/generate.sh

@@ -18,3 +18,6 @@ $encoder -c board-2-ap72tip-v4-QCN92XX.json -o board-2.bin.ap72tip-v4.QCN92XX
 
 $encoder -c board-2-nwa130be-IPQ5332.json -o board-2.bin.nwa130be.IPQ5332
 $encoder -c board-2-nwa130be-QCN92XX.json -o board-2.bin.nwa130be.QCN92XX
+
+$encoder -c board-2-nwa50be-IPQ5332.json -o board-2.bin.nwa50be.IPQ5332
+$encoder -c board-2-nwa50be-QCN6432.json -o board-2.bin.nwa50be.QCN6432

feeds/qca-wifi-7/cig-platform-pkg/cig-wifi-mode-sw/Makefile

@@ -24,7 +24,9 @@ endef
 
 define KernelPackage/cig-wifi-mode-sw/install
 	$(INSTALL_DIR) $(1)/usr/sbin/
+	$(INSTALL_DIR) $(1)/etc/init.d/
 	$(INSTALL_BIN) ./files/cig_wifi_mode_sw $(1)/usr/sbin/cig_wms
+	$(INSTALL_BIN) ./files/cig_wifi_mode_boot $(1)/etc/init.d/cig_wmb
 endef
 
 $(eval $(call KernelPackage,cig-wifi-mode-sw))

feeds/qca-wifi-7/cig-platform-pkg/cig-wifi-mode-sw/files/cig_wifi_mode_boot

@@ -0,0 +1,13 @@
+#!/bin/sh /etc/rc.common
+
+START=60
+
+boot(){
+	local bands=$(cat /proc/rf_switch)
+
+	if [ "x$bands" = "x3" ]; then
+		echo "AFC is not ready, switch to 2-band mode" >/dev/console
+		echo 2 > /proc/rf_switch
+		firstboot -y -r
+	fi
+}

feeds/qca-wifi-7/hostapd/files/common.uc

@@ -259,8 +259,13 @@ const phy_proto = {
 			addr[0] ^= idx << 2;
 			break;
 		case "b5":
-			if (mbssid)
+			if (mbssid) {
+				let b5 = addr[5];
+				addr[5] = addr[3];
+				addr[3] = b5;
+				addr[5] &= ~0xf;
 				addr[0] |= 2;
+			}
 			addr[5] ^= idx;
 			break;
 		default:

feeds/qca-wifi-7/ipq53xx/base-files/etc/board.d/02_network

@@ -14,13 +14,17 @@ ipq53xx_setup_interfaces()
 		;;
 	cig,wf189|\
 	edgecore,eap105|\
-	sercomm,ap72tip|\
+	sercomm,ap72tip)
+		ucidef_set_interfaces_lan_wan "eth1" "eth0"
+		;;
 	sonicfi,rap750w-311a)
 		ucidef_set_interfaces_lan_wan "eth1" "eth0"
+		ucidef_add_switch "switch1" "0u@eth1" "3:lan" "2:lan" "1:lan"
 		;;
 	sonicfi,rap7110c-341x|\
 	sonicfi,rap750e-h|\
-	sonicfi,rap750e-s)
+	sonicfi,rap750e-s|\
+	zyxel,nwa50be)
 		ucidef_set_interfaces_lan_wan "" "eth0"
 		;;
 	cig,wf189w)
@@ -127,6 +131,16 @@ qcom_setup_macs()
 		ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
 		ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
 		;;
+	zyxel,nwa50be)
+		wan_mac=$(cat /proc/cmdline)
+		wan_mac="${wan_mac##*hwaddr=}"
+		wan_mac="${wan_mac%% *}"
+		wan_mac="$(echo ${wan_mac} | sed 's/\(..\)/\1:/g;s/:$//')"
+		ucidef_set_network_device_mac eth0 $wan_mac
+		ucidef_set_label_macaddr $wan_mac
+		ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 1)
+		ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 2)
+		;;
         *)
                 wan_mac=$(cat /sys/class/net/eth1/address)
                 lan_mac=$(macaddr_add "$wan_mac" 1)

feeds/qca-wifi-7/ipq53xx/base-files/etc/hotplug.d/firmware/10-ath12k-caldata

@@ -67,8 +67,9 @@ ath12k/IPQ5332/hw1.0/caldata.bin)
 	emplus,wap7635|\
 	sercomm,ap72tip-v4|\
 	sercomm,ap72tip|\
-	zyxel,nwa130be)
-		caldata_extract "0:ART" 0x1000 0x20000 
+	zyxel,nwa130be|\
+	zyxel,nwa50be)
+		caldata_extract "0:ART" 0x1000 0x20000
 		;;
 	cig,wf672)
 		cig_ipq5322_cal
@@ -124,6 +125,9 @@ ath12k/QCN6432/hw1.0/cal-ahb-soc@0:wifi2@c0000000.bin)
 	cig,wf189w)
 		caldata_extract "0:ART" 0x58800 0x20000
 		;;
+	zyxel,nwa50be)
+		caldata_extract "0:ART" 0x58800 0x2d000
+		;;
 	esac
 	;;
 ath12k/IPQ5332/hw1.0/board-2.bin)

feeds/qca-wifi-7/ipq53xx/base-files/etc/init.d/phy_quirks

@@ -9,14 +9,5 @@ boot() {
 	edgecore,eap105)
 		ssdk_sh debug phy set 0x1 0x601FD032 0xff
 		;;
-	zyxel,nwa130be)
-		#eth0: APPE: phyaddr 4  green:2.5G  orange:others
-		ssdk_sh debug phy set 4 0x40078074 0x670
-		ssdk_sh debug phy set 4 0x40078078 0x8600
-
-		#eth1:  MHT: phyaddr 3  green:2.5G orange:others
-		ssdk_sh debug phy set 3 0x40078074 0x670
-		ssdk_sh debug phy set 3 0x40078078 0x8600
-		;;
 	esac
 }

feeds/qca-wifi-7/ipq53xx/base-files/lib/upgrade/platform.sh

@@ -174,7 +174,8 @@ platform_do_upgrade() {
 		sonicfi_dualimage_check
 		nand_upgrade_tar "$1"
 		;;
-	zyxel,nwa130be)
+	zyxel,nwa130be|\
+	zyxel,nwa50be)
 		nand_upgrade_tar "$1"
 		;;
 	esac

feeds/qca-wifi-7/ipq53xx/config-6.1

@@ -1180,7 +1180,7 @@ CONFIG_QTI_LICENSE_MANAGER=y
 # CONFIG_SYMBOLIC_ERRNAME is not set
 # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
 # CONFIG_LEDS_CLASS_MULTICOLOR is not set
-# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y 
 # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
 # CONFIG_PINCTRL_SINGLE is not set
 # CONFIG_RANDOM_TRUST_BOOTLOADER is not set

feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa130be.dts

@@ -18,6 +18,21 @@
 	model = "Zyxel NWA130BE";
 	compatible = "zyxel,nwa130be", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332-rdp468", "qcom,ipq5332";
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		ramoops@49c00000 {
+			compatible = "ramoops";
+			no-map;
+			reg = <0x0 0x49c00000 0x0 0x100000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
+	};
+
 	aliases {
 		serial0 = &blsp1_uart0;
 		serial1 = &blsp1_uart1;
@@ -128,6 +143,26 @@
 					blink_en = "enable";
 					active = "high";
 				};
+
+				qcom,port_ledinfo {
+					port@1 {
+						port = <2>;
+						led_source@0 {
+							source = <0>;
+							mode = "normal";
+							speed = "2500M";
+							active = "high";
+							blink_en = "enable";
+						};
+						led_source@1 {
+							source = <1>;
+							mode = "normal";
+							speed = "10M", "100M","1000M";
+							active = "high";
+							blink_en = "enable";
+						};
+					};
+				};
 			};
 
 			ess-switch1@1 {
@@ -164,6 +199,26 @@
 					};
 				};
 
+				qcom,port_ledinfo {
+					port@3 {
+						port = <3>;
+						led_source@0 {
+							source = <0>;
+							mode = "normal";
+							speed = "2500M";
+							active = "high";
+							blink_en = "enable";
+						};
+						led_source@1 {
+							source = <1>;
+							mode = "normal";
+							speed = "10M", "100M","1000M";
+							active = "high";
+							blink_en = "enable";
+						};
+					};
+				};
+
 				led_source@2 {
 					source = <2>;
 					mode = "normal";

feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa50be.dts

@@ -0,0 +1,956 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * IPQ5332 RDP442 board device tree source
+ *
+ * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "ipq5332.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include "ipq5332-default-memory.dtsi"
+
+
+/ {
+	model = "Qualcomm Technologies, Inc. IPQ5332/RDP442/AP-MI01.3";
+	compatible = "zyxel,nwa50be", "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332-rdp442", "qcom,ipq5332";
+
+#ifdef __IPQ_MEM_PROFILE_512_MB__
+
+	/*     512M  Layout for IPQ5332 + QCN6432 + QCN6432
+	 * +==========+==============+========================+
+	 * |         |              |                         |
+	 * |  Region | Start Offset |          Size           |
+	 * |         |              |                         |
+	 * +---------+--------------+-------------------------+
+	 * |   Q6    |              |                         |
+	 * |  code/  |  0x4A900000  |          25MB           |
+	 * |  data   |              |                         |
+	 * +---------+--------------+-------------------------+
+	 * | IPQ5332 |              |                         |
+	 * |  data   |  0x4C200000  |          17MB           |
+	 * +---------+--------------+-------------------------+
+	 * | IPQ5332 |              |                         |
+	 * | M3 Dump |  0x4D300000  |           1MB           |
+	 * +---------+--------------+-------------------------+
+	 * | IPQ5332 |              |                         |
+	 * |  QDSS   |  0x4D400000  |           1MB           |
+	 * +---------+--------------+-------------------------+
+	 * | IPQ5332 |              |                         |
+	 * |  CALDB  |  0x4D500000  |           3MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_1|              |                         |
+	 * |  data   |  0x4D800000  |          16MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_1|              |                         |
+	 * | M3 Dump |  0x4E800000  |           1MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_1|              |                         |
+	 * |  QDSS   |  0x4E900000  |           1MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_1|              |                         |
+	 * |  CALDB  |  0x4EA00000  |           5MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_2|              |                         |
+	 * |  data   |  0x4EF00000  |          16MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_2|              |                         |
+	 * | M3 Dump |  0x4FF00000  |           1MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_2|              |                         |
+	 * |  QDSS   |  0x50000000  |           1MB           |
+	 * +---------+--------------+-------------------------+
+	 * |QCN6432_2|              |                         |
+	 * |  CALDB  |  0x50100000  |           5MB           |
+	 * +---------+--------------+-------------------------+
+	 * |         |              |                         |
+	 * |   MLO   |  0x50600000  |          12MB           |
+	 * +==================================================+
+	 * |                                                  |
+	 * |                                                  |
+	 * |                                                  |
+	 * |             Rest of memory for Linux             |
+	 * |                                                  |
+	 * |                                                  |
+	 * |                                                  |
+	 * +==================================================+
+	 */
+
+	reserved-memory {
+
+		/delete-node/ m3_dump@4cc00000;
+		/delete-node/ q6_etr_dump@1;
+		/delete-node/ mlo_global_mem_0@0x4db00000;
+		/delete-node/ wcnss@4a900000;
+		/delete-node/ q6_caldb_region@4ce00000;
+
+		q6_mem_regions: q6_mem_regions@4A900000  {
+			reg = <0x0 0x4a900000 0x0 0x5D00000>;
+			no-map;
+		};
+
+		q6_code_data: q6_code_data@4A900000 {
+			reg = <0x0 0x4a900000 0x0 0x1900000>;
+			no-map;
+		};
+
+		q6_ipq5332_data: q6_ipq5332_data@4C200000 {
+			reg = <0x0 0x4C200000 0x0 0x1100000>;
+			no-map;
+		};
+
+		m3_dump: m3_dump@4D300000 {
+			reg = <0x0 0x4D300000 0x0 0x100000>;
+			no-map;
+		};
+
+		q6_etr_region: q6_etr_dump@4D400000 {
+			reg = <0x0 0x4D400000 0x0 0x100000>;
+			no-map;
+		};
+
+		q6_ipq5332_caldb: q6_ipq5332_caldb@4D500000 {
+			reg = <0x0 0x4D500000 0x0 0x300000>;
+			no-map;
+		};
+
+		q6_qcn6432_data_1: q6_qcn6432_data_1@4D800000 {
+			reg = <0x0 0x4D800000 0x0 0x1000000>;
+			no-map;
+		};
+
+		m3_dump_qcn6432_1: m3_dump_qcn6432_1@4E800000 {
+			reg = <0x0 0x4E800000 0x0 0x100000>;
+			no-map;
+                };
+
+		q6_qcn6432_etr_1: q6_qcn6432_etr_1@4E900000 {
+			reg = <0x0 0x4E900000 0x0 0x100000>;
+			no-map;
+		};
+
+		q6_qcn6432_caldb_1: q6_qcn6432_caldb_1@4EA00000 {
+			reg = <0x0 0x4EA00000 0x0 0x500000>;
+			no-map;
+		};
+
+		q6_qcn6432_data_2: q6_qcn6432_data_2@4EF00000 {
+			reg = <0x0 0x4EF00000 0x0 0x1000000>;
+			no-map;
+		};
+
+		m3_dump_qcn6432_2: m3_dump_qcn6432_2@4FF00000 {
+			reg = <0x0 0x4FF00000 0x0 0x100000>;
+			no-map;
+                };
+
+		q6_qcn6432_etr_2: q6_qcn6432_etr_2@50000000 {
+			reg = <0x0 0x50000000 0x0 0x100000>;
+			no-map;
+		};
+
+		q6_qcn6432_caldb_2: q6_qcn6432_caldb_2@50100000 {
+			reg = <0x0 0x50100000 0x0 0x500000>;
+			no-map;
+		};
+
+		mlo_global_mem0: mlo_global_mem_0@50600000 {
+			reg = <0x0 0x50600000 0x0 0xC00000>;
+			no-map;
+		};
+	};
+#else
+
+	/*  1G  Layout for IPQ5332 + QCN6432 + QCN6432
+	* +==========+==============+========================+
+	* |         |              |                         |
+	* |  Region | Start Offset |          Size           |
+	* |         |              |                         |
+	* +---------+--------------+-------------------------+
+	* |   Q6    |              |                         |
+	* |  code/  |  0x4A900000  |          25MB           |
+	* |  data   |              |                         |
+	* +---------+--------------+-------------------------+
+	* | IPQ5332 |              |                         |
+	* |  data   |  0x4C200000  |          21MB           |
+	* +---------+--------------+-------------------------+
+	* | IPQ5332 |              |                         |
+	* | M3 Dump |  0x4D700000  |           1MB           |
+	* +---------+--------------+-------------------------+
+	* | IPQ5332 |              |                         |
+	* |  QDSS   |  0x4D800000  |           1MB           |
+	* +---------+--------------+-------------------------+
+	* | IPQ5332 |              |                         |
+	* |  CALDB  |  0x4D900000  |           5MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_1|              |                         |
+	* |  data   |  0x4DE00000  |          21MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_1|              |                         |
+	* | M3 Dump |  0x4F300000  |           1MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_1|              |                         |
+	* |  QDSS   |  0x4F400000  |           1MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_1|              |                         |
+	* |  CALDB  |  0x4F500000  |           5MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_2|              |                         |
+	* |  data   |  0x4FA00000  |          21MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_2|              |                         |
+	* | M3 Dump |  0x50F00000  |           1MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_2|              |                         |
+	* |  QDSS   |  0x51000000  |           1MB           |
+	* +---------+--------------+-------------------------+
+	* |QCN6432_2|              |                         |
+	* |  CALDB  |  0x51100000  |           5MB           |
+	* +---------+--------------+-------------------------+
+	* |         |              |                         |
+	* |   MLO   |  0x51600000  |          12MB           |
+	* +==================================================+
+	* |                                                  |
+	* |                                                  |
+	* |                                                  |
+	* |             Rest of memory for Linux             |
+	* |                                                  |
+	* |                                                  |
+	* |                                                  |
+	* +==================================================+
+	*/
+	reserved-memory {
+
+		/delete-node/ m3_dump@4cc00000;
+		/delete-node/ q6_etr_dump@1;
+		/delete-node/ mlo_global_mem_0@0x4db00000;
+		/delete-node/ wcnss@4a900000;
+		/delete-node/ q6_caldb_region@4ce00000;
+
+		ramoops@49c00000 {
+			compatible = "ramoops";
+			reg = <0x0 0x49c00000 0x0 0x100000>;
+			record-size = <0x20000>;
+			console-size = <0x20000>;
+			pmsg-size = <0x20000>;
+		};
+
+		q6_mem_regions: q6_mem_regions@4A900000  {
+			no-map;
+			reg = <0x0 0x4a900000 0x0 0x6D00000>;
+		};
+
+		q6_code_data: q6_code_data@4A900000 {
+			no-map;
+			reg = <0x0 0x4a900000 0x0 0x1900000>;
+		};
+
+		q6_ipq5332_data: q6_ipq5332_data@4C200000 {
+			no-map;
+			reg = <0x0 0x4C200000 0x0 0x1500000>;
+		};
+
+		m3_dump: m3_dump@4D700000 {
+			no-map;
+			reg = <0x0 0x4D700000 0x0 0x100000>;
+		};
+
+		q6_etr_region: q6_etr_dump@4D800000 {
+			no-map;
+			reg = <0x0 0x4D800000 0x0 0x100000>;
+		};
+
+		q6_ipq5332_caldb: q6_ipq5332_caldb@4D900000 {
+			no-map;
+			reg = <0x0 0x4D900000 0x0 0x500000>;
+		};
+
+		q6_qcn6432_data_1: q6_qcn6432_data_1@4DE00000 {
+			no-map;
+			reg = <0x0 0x4DE00000 0x0 0x1500000>;
+		};
+
+		m3_dump_qcn6432_1: m3_dump_qcn6432_1@4F300000 {
+			no-map;
+			reg = <0x0 0x4F300000 0x0 0x100000>;
+        };
+
+		q6_qcn6432_etr_1: q6_qcn6432_etr_1@4F400000 {
+			no-map;
+			reg = <0x0 0x4F400000 0x0 0x100000>;
+		};
+
+		q6_qcn6432_caldb_1: q6_qcn6432_caldb_1@4F500000 {
+			no-map;
+			reg = <0x0 0x4F500000 0x0 0x500000>;
+		};
+
+		q6_qcn6432_data_2: q6_qcn6432_data_2@4FA00000 {
+			no-map;
+			reg = <0x0 0x4FA00000 0x0 0x1500000>;
+		};
+
+		m3_dump_qcn6432_2: m3_dump_qcn6432_2@50F00000 {
+			no-map;
+			reg = <0x0 0x50F00000 0x0 0x100000>;
+		};
+
+		q6_qcn6432_etr_2: q6_qcn6432_etr_2@51000000 {
+			no-map;
+			reg = <0x0 0x51000000 0x0 0x100000>;
+		};
+
+		q6_qcn6432_caldb_2: q6_qcn6432_caldb_2@51100000 {
+			no-map;
+			reg = <0x0 0x51100000 0x0 0x500000>;
+		};
+
+		mlo_global_mem0: mlo_global_mem_0@51600000 {
+			no-map;
+			reg = <0x0 0x51600000 0x0 0xC00000>;
+		};
+	};
+#endif
+
+	aliases {
+		serial0 = &blsp1_uart0;
+		serial1 = &blsp1_uart1;
+		ethernet0 = "/soc/dp1";
+		ethernet1 = "/soc/dp2";
+	};
+
+	chosen {
+		stdout-path = "serial0";
+	};
+
+	soc@0 {
+		mdio:mdio@90000 {
+			pinctrl-0 = <&mdio1_pins>;
+			pinctrl-names = "default";
+			/*gpio22 is for wan napa, gpio51 for lan napa*/
+			phy-reset-gpio = <&tlmm 51 GPIO_ACTIVE_LOW>;
+			status = "okay";
+
+			phy2: ethernet-phy@2 {
+				reg = <28>;
+			};
+		};
+
+		leds {
+			compatible = "gpio-leds";
+			pinctrl-0 = <&led_pins>;
+			pinctrl-names = "default";
+			led_blue{
+				label = "led_blue";
+				gpio = <&tlmm 22 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "led_blue";
+				default-state = "off";
+			};
+			led_green {
+				label = "led_green";
+				gpio = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "led_green";
+				default-state = "on";
+			};
+			led_white {
+				label = "led_white";
+				gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "led_white";
+				default-state = "off";
+			};
+			led_red {
+				label = "led_red";
+				gpio = <&tlmm 44 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "led_red";
+				default-state = "off";
+			};
+		};
+
+		gpio_keys {
+			compatible = "gpio-keys";
+			pinctrl-0 = <&button_pins>;
+			pinctrl-names = "default";
+			status = "okay";
+
+			button@1 {
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+				linux,input-type = <1>;
+				debounce-interval = <60>;
+			};
+		};
+
+		ess-instance {
+			ess-switch@3a000000 {
+				switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
+				switch_lan_bmp = <0x4>; /* lan port bitmap */
+				switch_wan_bmp = <0x0>; /* wan port bitmap */
+				switch_mac_mode = <0xf>; /* mac mode for uniphy instance0*/
+				switch_mac_mode1 = <0xc>; /* mac mode for uniphy instance1*/
+				switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
+				qcom,port_phyinfo {
+					port@0 {
+						port_id = <2>;
+						phy_address = <28>;
+					};
+				};
+				qcom,port_ledinfo {
+					port@0 {
+						port = <2>;
+						led_source@0 {
+							source = <0>;
+							mode = "normal";
+							speed = "2500M";
+							active = "high";
+							blink_en = "enable";
+						};
+						led_source@1 {
+							source = <1>;
+							mode = "normal";
+							speed = "10M", "100M","1000M";
+							active = "high";
+							blink_en = "enable";
+						};
+					};
+				};
+			};
+		};
+
+		dp1 {
+			device_type = "network";
+			compatible = "qcom,nss-dp";
+			qcom,id = <2>;
+			reg = <0x3a504000 0x4000>;
+			qcom,mactype = <1>;
+			local-mac-address = [000000000000];
+			mdio-bus = <&mdio>;
+			qcom,phy-mdio-addr = <28>;
+			qcom,link-poll = <1>;
+			phy-mode = "sgmii";
+		};
+
+		nss-macsec0 {
+			compatible = "qcom,nss-macsec";
+			phy_addr = <28>;
+			mdiobus = <&mdio>;
+		};
+
+		/* EDMA host driver configuration for the board */
+		edma@3ab00000 {
+			qcom,txdesc-ring-start = <4>;		/* Tx desc ring start ID */
+			qcom,txdesc-rings = <12>;		/* Total number of Tx desc rings to be provisioned */
+			qcom,mht-txdesc-rings = <8>;            /* Extra Tx desc rings to be provisioned for MHT SW ports */
+			qcom,txcmpl-ring-start = <4>;		/* Tx complete ring start ID */
+			qcom,txcmpl-rings = <12>;		/* Total number of Tx complete rings to be provisioned */
+			qcom,mht-txcmpl-rings = <8>;            /* Extra Tx complete rings to be provisioned for mht sw ports. */
+			qcom,rxfill-ring-start = <4>;		/* Rx fill ring start ID */
+			qcom,rxfill-rings = <4>;		/* Total number of Rx fill rings to be provisioned */
+			qcom,rxdesc-ring-start = <12>;		/* Rx desc ring start ID */
+			qcom,rxdesc-rings = <4>;		/* Total number of Rx desc rings to be provisioned */
+			qcom,rx-page-mode = <0>;		/* Rx fill ring page mode */
+			qcom,tx-map-priority-level = <1>;	/* Tx priority level per port */
+			qcom,rx-map-priority-level = <1>;	/* Rx priority level per core */
+			qcom,ppeds-num = <2>;			/* Number of PPEDS nodes */
+			/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
+			qcom,ppeds-map = <1 1 1 1 32 8>,	/* PPEDS Node#0 ring and queue map */
+					<2 2 2 2 40 8>;		/* PPEDS Node#1 ring and queue map */
+			qcom,txdesc-map = <8 9 10 11>,		/* Port0 per-core Tx ring map */
+					<12 13 14 15>,        /* MHT-Port1 per-core Tx ring map */
+					<4 5 6 7>,            /* MHT-Port2 per-core Tx ring map/packets from  vp*/
+					<16 17 18 19>,        /* MHT-Port3 per-core Tx ring map */
+					<20 21 22 23>;        /* MHT-Port4 per-core Tx ring map */
+			qcom,txdesc-fc-grp-map = <1 2 3 4 5>;   /* Per GMAC flow control group map */
+			qcom,rxfill-map = <4 5 6 7>;		/* Per-core Rx fill ring map */
+			qcom,rxdesc-map = <12 13 14 15>;	/* Per-core Rx desc ring map */
+			qcom,rx-queue-start = <0>;		/* Rx queue start */
+			qcom,rx-ring-queue-map = <0 8 16 24>,	/* Priority 0 queues per-core Rx ring map */
+						<1 9 17 25>,	/* Priority 1 queues per-core Rx ring map */
+						<2 10 18 26>,	/* Priority 2 queues per-core Rx ring map */
+						<3 11 19 27>,	/* Priority 3 queues per-core Rx ring map */
+						<4 12 20 28>,	/* Priority 4 queues per-core Rx ring map */
+						<5 13 21 29>,	/* Priority 5 queues per-core Rx ring map */
+						<6 14 22 30>,	/* Priority 6 queues per-core Rx ring map */
+						<7 15 23 31>;	/* Priority 7 queues per-core Rx ring map */
+			interrupts = <0 163 4>,			/* Tx complete ring id #4 IRQ info */
+				   <0 164 4>,			/* Tx complete ring id #5 IRQ info */
+				   <0 165 4>,			/* Tx complete ring id #6 IRQ info */
+				   <0 166 4>,			/* Tx complete ring id #7 IRQ info */
+				   <0 167 4>,			/* Tx complete ring id #8 IRQ info */
+				   <0 168 4>,			/* Tx complete ring id #9 IRQ info */
+				   <0 169 4>,			/* Tx complete ring id #10 IRQ info */
+				   <0 170 4>,			/* Tx complete ring id #11 IRQ info */
+				   <0 171 4>,			/* Tx complete ring id #12 IRQ info */
+				   <0 172 4>,			/* Tx complete ring id #13 IRQ info */
+				   <0 173 4>,			/* Tx complete ring id #14 IRQ info */
+				   <0 174 4>,			/* Tx complete ring id #15 IRQ info */
+				   <0 139 4>,			/* Rx desc ring id #12 IRQ info */
+				   <0 140 4>,			/* Rx desc ring id #13 IRQ info */
+				   <0 141 4>,			/* Rx desc ring id #14 IRQ info */
+				   <0 142 4>,			/* Rx desc ring id #15 IRQ info */
+				   <0 191 4>,			/* Misc error IRQ info */
+				<0 160 4>,			/* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
+				<0 128 4>,			/* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
+				<0 152 4>,			/* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
+				<0 161 4>,			/* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
+				<0 129 4>,			/* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
+				<0 153 4>,                      /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
+				<0 175 4>,                   /* MHT port Tx complete ring id #16 IRQ info */
+				<0 176 4>,                   /* MHT port Tx complete ring id #17 IRQ info */
+				<0 177 4>,                   /* MHT port Tx complete ring id #18 IRQ info */
+				<0 178 4>,                   /* MHT port Tx complete ring id #19 IRQ info */
+				<0 179 4>,                   /* MHT port Tx complete ring id #20 IRQ info */
+				<0 180 4>,                   /* MHT port Tx complete ring id #21 IRQ info */
+				<0 181 4>,                   /* MHT port Tx complete ring id #22 IRQ info */
+				<0 182 4>;                   /* MHT port Tx complete ring id #23 IRQ info */
+		};
+
+		wsi: wsi {
+			id = <0>;
+			num_chip = <2>;
+			chip_info = <0 1 1>,
+				    <1 1 0>;
+		};
+
+		q6v5_wcss: remoteproc@d100000 {
+			boot-args = <0x1 0x4 0x3 0x0 0x26 0x2>,
+					<0x1 0x4 0x4 0x1 0x2f 0x2>;
+			memory-region = <&q6_mem_regions>;
+
+			/delete-node/ remoteproc_pd1;
+			/delete-node/ remoteproc_pd2;
+			/delete-node/ remoteproc_pd3;
+
+			q6_wcss_pd4: remoteproc_pd4 {
+				compatible = "qcom,ipq5332-mpd-upd-text";
+				firmware = "IPQ5332/q6_fw4.mdt";
+
+				q6_wcss_pd1: remoteproc_pd1 {
+					compatible = "qcom,ipq5332-wcss-ahb-mpd";
+					firmware = "IPQ5332/q6_fw1.mdt";
+					m3_firmware = "IPQ5332/iu_fw.mdt";
+					interrupts-extended = <&wcss_smp2p_in 8 0>,
+							<&wcss_smp2p_in 9 0>,
+							<&wcss_smp2p_in 12 0>,
+							<&wcss_smp2p_in 11 0>;
+					interrupt-names = "fatal",
+							"ready",
+							"spawn-ack",
+							"stop-ack";
+
+					qcom,smem-states = <&wcss_smp2p_out 8>,
+							<&wcss_smp2p_out 9>,
+							<&wcss_smp2p_out 10>;
+					qcom,smem-state-names = "shutdown",
+								"stop",
+								"spawn";
+					memory-region = <&q6_ipq5332_data>,
+							<&m3_dump>,
+							<&q6_etr_region>,
+							<&q6_ipq5332_caldb>;
+				};
+
+				q6_wcss_pd2: remoteproc_pd2 {
+					compatible = "qcom,ipq5332-wcss-pcie-mpd";
+					firmware = "IPQ5332/q6_fw2.mdt";
+					m3_firmware = "qcn6432/iu_fw.mdt";
+					interrupts-extended = <&wcss_smp2p_in 16 0>,
+							<&wcss_smp2p_in 17 0>,
+							<&wcss_smp2p_in 20 0>,
+							<&wcss_smp2p_in 19 0>;
+					interrupt-names = "fatal",
+							"ready",
+							"spawn-ack",
+							"stop-ack";
+
+					qcom,smem-states = <&wcss_smp2p_out 16>,
+							<&wcss_smp2p_out 17>,
+							<&wcss_smp2p_out 18>;
+					qcom,smem-state-names = "shutdown",
+								"stop",
+								"spawn";
+					memory-region = <&q6_qcn6432_data_1>,
+							<&m3_dump_qcn6432_1>,
+							<&q6_qcn6432_etr_1>,
+							<&q6_qcn6432_caldb_1>;
+					status = "okay";
+				};
+
+				q6_wcss_pd3: remoteproc_pd3 {
+					compatible = "qcom,ipq5332-wcss-pcie-mpd";
+					firmware = "IPQ5332/q6_fw3.mdt";
+					interrupts-extended = <&wcss_smp2p_in 24 0>,
+							<&wcss_smp2p_in 25 0>,
+							<&wcss_smp2p_in 28 0>,
+							<&wcss_smp2p_in 27 0>;
+					interrupt-names = "fatal",
+							"ready",
+							"spawn-ack",
+							"stop-ack";
+
+					qcom,smem-states = <&wcss_smp2p_out 24>,
+							<&wcss_smp2p_out 25>,
+							<&wcss_smp2p_out 26>;
+					qcom,smem-state-names = "shutdown",
+								"stop",
+								"spawn";
+					memory-region = <&q6_qcn6432_data_2>,
+							<&m3_dump_qcn6432_2>,
+							<&q6_qcn6432_etr_2>,
+							<&q6_qcn6432_caldb_2>;
+					status = "okay";
+				};
+			};
+		};
+	};
+};
+
+&blsp1_uart0 {
+	pinctrl-0 = <&serial_0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&blsp1_uart1 {
+        pinctrl-0 = <&serial_1_pins>;
+        pinctrl-names = "default";
+        status = "disabled";
+};
+
+&blsp1_i2c1 {
+	clock-frequency  = <400000>;
+	pinctrl-0 = <&i2c_1_pins>;
+	pinctrl-names = "default";
+	status = "disabled";
+};
+
+&blsp1_spi0 {
+	pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	flash@0 {
+		compatible = "n25q128a11", "micron,n25q128a11", "jedec,spi-nor";
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&sdhc {
+	bus-width = <4>;
+	max-frequency = <192000000>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	non-removable;
+	pinctrl-0 = <&sdc_default_state>;
+	pinctrl-names = "default";
+	status = "disabled";
+};
+
+&sleep_clk {
+	clock-frequency = <32000>;
+};
+
+&xo {
+	clock-frequency = <24000000>;
+};
+
+&qpic_bam {
+	status = "okay";
+};
+
+&qpic_nand {
+	pinctrl-0 = <&qspi_default_state>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	nandcs@0 {
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		nand-ecc-strength = <8>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+	};
+};
+
+/* PINCTRL */
+
+&tlmm {
+
+	led_pins: led_pins {
+		board_info {
+			pins = "gpio2", "gpio3";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+			input-enable;
+		};
+
+		apd_dc_in {
+			pins = "gpio24";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down; //Adapter un-plug
+			input-enable;
+		};
+
+		poe_status {
+			pins = "gpio34";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up; //AF
+			input-enable;
+		};
+
+		/* To MR pin */
+		rst_mb {
+			pins = "gpio29";
+			function = "gpio";
+			drive-strength = <8>;
+			output-high;
+		};
+
+		led_blue {
+			pins = "gpio22";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_green {
+			pins = "gpio45";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_white {
+			pins = "gpio43";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		led_red {
+			pins = "gpio44";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	qspi_default_state: qspi-default-state {
+		qspi_clock {
+			pins = "gpio13";
+			function = "qspi_clk";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+
+		qspi_cs {
+			pins = "gpio12";
+			function = "qspi_cs";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		qspi_data {
+			pins = "gpio8", "gpio9", "gpio10", "gpio11";
+			function = "qspi_data";
+			drive-strength = <8>;
+			bias-pull-down;
+		};
+	};
+
+	serial_1_pins: serial1-pinmux {
+		pins = "gpio33", "gpio34", "gpio35", "gpio36";
+		function = "blsp1_uart2";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	i2c_1_pins: i2c-1-state {
+		pins = "gpio29", "gpio30";
+		function = "blsp1_i2c0";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	button_pins: button-state {
+		pins = "gpio35";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	pwm_pins: pwm-state {
+		pins = "gpio46";
+		function = "pwm0";
+		drive-strength = <8>;
+	};
+
+	sdc_default_state: sdc-default-state {
+		clk-pins {
+			pins = "gpio13";
+			function = "sdc_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		cmd-pins {
+			pins = "gpio12";
+			function = "sdc_cmd";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		data-pins {
+			pins = "gpio8", "gpio9", "gpio10", "gpio11";
+			function = "sdc_data";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	spi_0_data_clk_pins: spi-0-data-clk-state {
+		pins = "gpio14", "gpio15", "gpio16";
+		function = "blsp0_spi";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	spi_0_cs_pins: spi-0-cs-state {
+		pins = "gpio17";
+		function = "blsp0_spi";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	mdio1_pins: mdio1-state {
+		mux_0 {
+			pins = "gpio27";
+			function = "mdc1";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+		mux_1 {
+			pins = "gpio28";
+			function = "mdio1";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+};
+
+&license_manager {
+	status = "okay";
+};
+
+&usb3 {
+	qcom,select-utmi-as-pipe-clk;
+	status = "okay";
+
+	dwc3@8a00000 {
+		/delete-property/ #phy-cells;
+		/delete-property/ phys;
+		/delete-property/ phy-names;
+	};
+};
+
+&pwm {
+	pinctrl-0 = <&pwm_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&hs_m31phy_0 {
+	status = "okay";
+};
+
+&wifi0 {
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd1>;
+	qcom,rproc_rpd = <&q6v5_wcss>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+	qcom,bdf-addr = <0x4C200000 0x4C200000 0x4C200000 0x0 0x0 0x0>;
+	qcom,caldb-addr = <0x4D900000 0x4D500000 0x0 0x0 0x0 0x0>;
+#ifdef __IPQ_MEM_PROFILE_512_MB__
+	qcom,tgt-mem-mode = <1>;
+	qcom,caldb-size = <0x300000>;
+#else
+	qcom,tgt-mem-mode = <0>;
+	qcom,caldb-size = <0x500000>;
+#endif
+	qcom,board_id = <0x12>;
+#if defined(__CNSS2__)
+	mem-region = <&q6_ipq5332_data>;
+#else
+	memory-region = <&q6_ipq5332_data>;
+#endif
+	qcom,wsi = <&wsi>;
+	qcom,wsi_index = <0>;
+	status = "okay";
+};
+
+&wifi1 {
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd2>;
+	qcom,rproc_rpd = <&q6v5_wcss>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
+	qcom,bdf-addr = <0x4DE00000 0x4D800000 0x0 0x0 0x0 0x0>;
+	qcom,caldb-addr = <0x4F500000 0x4EA00000 0x0 0x0 0x0 0x0>;
+	qcom,umac-irq-reset-addr = <0x20000884>;
+	qcom,caldb-size = <0x500000>;
+#ifdef __IPQ_MEM_PROFILE_512_MB__
+	qcom,tgt-mem-mode = <1>;
+#else
+	qcom,tgt-mem-mode = <0>;
+#endif
+	qcom,board_id = <0x060>;
+#if defined(__CNSS2__)
+	mem-region = <&q6_qcn6432_data_1>;
+#else
+	memory-region = <&q6_qcn6432_data_1>;
+#endif
+	qcom,wsi = <&wsi>;
+	qcom,wsi_index = <1>;
+	status = "disabled";
+	interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
+	interrupt-names = "umac_reset";
+};
+
+&wifi2 {
+	qcom,multipd_arch;
+	qcom,rproc = <&q6_wcss_pd3>;
+	qcom,rproc_rpd = <&q6v5_wcss>;
+	qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
+	qcom,bdf-addr = <0x4FA00000 0x4EF00000 0x4FA00000 0x0 0x0 0x0>;
+	qcom,caldb-addr = <0x51100000 0x50100000 0x51100000 0x0 0x0 0x0>;
+	qcom,umac-irq-reset-addr = <0x18000884>;
+	qcom,caldb-size = <0x500000>;
+#ifdef __IPQ_MEM_PROFILE_512_MB__
+	qcom,tgt-mem-mode = <1>;
+#else
+	qcom,tgt-mem-mode = <0>;
+#endif
+	qcom,board_id = <0x070>;
+#if defined(__CNSS2__)
+	mem-region = <&q6_qcn6432_data_2>;
+#else
+	memory-region = <&q6_qcn6432_data_2>;
+#endif
+	qcom,wsi = <&wsi>;
+	qcom,wsi_index = <1>;
+	qcom,wide_band = <1>;
+	status = "okay";
+	interrupts = <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>;
+	interrupt-names = "umac_reset";
+};

feeds/qca-wifi-7/ipq53xx/image/ipq53xx.mk

@@ -162,6 +162,22 @@ define Device/zyxel_nwa130be
 endef
 TARGET_DEVICES += zyxel_nwa130be
 
+
+define Device/zyxel_nwa50be
+  DEVICE_TITLE := Zyxel NWA50BE
+  DEVICE_DTS := ipq5332-zyxel-nwa50be
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_DTS_CONFIG := config@mi01.3
+  IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
+  IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
+  IMAGE/nand-factory.ubi := append-ubi
+  DEVICE_PACKAGES := ath12k-wifi-zyxel-nwa50be ath12k-firmware-ipq5332-peb-peb -ath12k-firmware-qcn92xx
+endef
+TARGET_DEVICES += zyxel_nwa50be
+
 define Device/cig_wf672
   DEVICE_TITLE := CIG WF672
   DEVICE_DTS := ipq5332-cig-wf672

feeds/qca-wifi-7/ipq53xx/patches-6.1/0660-add-IPQ_MEM_PROFILE-in-arm64-kconfig.patch

@@ -0,0 +1,33 @@
+From f7b27331b915477cd289c37b56efb0d28b2d6f38 Mon Sep 17 00:00:00 2001
+From: Antonio Wu <antonio.wu@cybertan.com.tw>
+Date: Tue, 5 Aug 2025 10:39:58 +0000
+Subject: [PATCH] Add IPQ_MEM_PROFILE in arm64 kconfig
+
+---
+ arch/arm64/Kconfig | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
+index 702a289..7864e79 100644
+--- a/arch/arm64/Kconfig
++++ b/arch/arm64/Kconfig
+@@ -2143,6 +2143,16 @@ config STACKPROTECTOR_PER_TASK
+ 	def_bool y
+ 	depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_SYSREG
+ 
++config IPQ_MEM_PROFILE
++	int "Select Memory Profile"
++	range 0 1024
++	default 0
++	help
++	  This option select memory profile to be used, which defines
++	  the reserved memory configuration used in device tree.
++
++	  If unsure, say 0
++
+ # The GPIO number here must be sorted by descending number. In case of
+ # a multiplatform kernel, we just want the highest value required by the
+ # selected platforms.
+-- 
+2.17.1
+

feeds/qca-wifi-7/mac80211/patches-sonicfi_rap7110c_341x/ath12k/0001-sonicfi_rap7110c-341x-therlaml-setting.patch

@@ -0,0 +1,63 @@
+Index: backports-6.5-rc3/drivers/net/wireless/ath/ath12k/thermal.h
+===================================================================
+--- backports-6.5-rc3.orig/drivers/net/wireless/ath/ath12k/thermal.h
++++ backports-6.5-rc3/drivers/net/wireless/ath/ath12k/thermal.h
+@@ -13,35 +13,35 @@
+ 
+ /* Below temperatures are in celsius */
+ #define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
+-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
+-#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
+-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
+-#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
+-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
+-#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
+-#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
++#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 110
++#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 115
++#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 110
++#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 120
++#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 115
++#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 125
+ 
+ #define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
+-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
+-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
+-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
+-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
+-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
+-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
+-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
+-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
++#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 100
++#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
++#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
++#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
++#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
++#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 110
+ #define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
+ 
+ #define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
+-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
+-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
+-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
++#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 30
++#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 50
++#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 70
+ 
+-#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
++#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE 0
++#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE 20
++#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE 40
++#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE 80
++#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE 100
+ 
+ #define THERMAL_CONFIG_POUT0                        0
+ #define THERMAL_CONFIG_POUT1                        12

feeds/qca-wifi-7/mac80211/patches-sonicfi_rap750w_311a/ath12k/0001-sonicfi-rap750w-311a-thermal-setting.patch

@@ -0,0 +1,57 @@
+--- a/drivers/net/wireless/ath/ath12k/thermal.h
++++ b/drivers/net/wireless/ath/ath12k/thermal.h
+@@ -13,34 +13,34 @@
+ 
+ /* Below temperatures are in celsius */
+ #define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
+-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
+-#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
+-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
+-#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
+-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
+-#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105
++#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 100
++#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110
++#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
++#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 110
+ #define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
+ 
+ #define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
+-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
+-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
+-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
+-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
+-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
+-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
+-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
+-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
++#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 100
++#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
++#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
++#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
++#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
++#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 110
+ #define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
+ 
+ #define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
+-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
+-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
+-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
++#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 30
++#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 50
++#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 70
+ 
+ #define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
++#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
++#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
++#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
+ #define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
+ 
+ #define THERMAL_CONFIG_POUT0                        0

feeds/qca-wifi-7/mac80211/patches-zyxel_nwa50be/ath12k/0001-thermal-thermal-setting.patch

@@ -0,0 +1,74 @@
+From 357da3320f8bcad056b905fb85cad3a29c343d31 Mon Sep 17 00:00:00 2001
+From: YenLin Pan <yenlin.pan@zyxel.com.tw>
+Date: Tue, 12 Aug 2025 15:41:39 +0800
+Subject: [PATCH] thermal: thermal setting
+
+lo0 -100 -hi0 105 -off0 0
+lo1 95 -hi1 110 -off1 20
+lo2 100 -hi2 115 -off2 60
+lo3 105 -hi3 119 -off3 98
+
+Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
+---
+ drivers/net/wireless/ath/ath12k/thermal.h | 34 +++++++++++------------
+ 1 file changed, 17 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
+index 5c91906..e81f9a4 100644
+--- a/drivers/net/wireless/ath/ath12k/thermal.h
++++ b/drivers/net/wireless/ath/ath12k/thermal.h
+@@ -13,34 +13,34 @@
+ 
+ /* Below temperatures are in celsius */
+ #define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
+-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
++#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105
+ #define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
+-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
++#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110
+ #define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
+-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
++#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
+ #define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
+-#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
++#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 119
+ 
+ #define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
+-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
+-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
+-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
+-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
+-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
+-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
+-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
++#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
++#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
++#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
++#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
++#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
++#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 105
++#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 119
+ #define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
+ #define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
+ 
+ #define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
+-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
+-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
+-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
++#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 20
++#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 60
++#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 98
+ 
+ #define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
+-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
++#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
++#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
++#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
+ #define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
+ 
+ #define THERMAL_CONFIG_POUT0                        0
+-- 
+2.34.1
+

feeds/qca-wifi-7/qca-ssdk-qca/files-zyxel_nwa50be/qca-ssdk

@@ -0,0 +1,315 @@
+#!/bin/sh /etc/rc.common
+# Copyright (c) 2018, 2021, The Linux Foundation. All rights reserved.
+# Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
+#
+# Permission to use, copy, modify, and/or distribute this software for any
+# purpose with or without fee is hereby granted, provided that the above
+# copyright notice and this permission notice appear in all copies.
+#
+# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+#
+
+START=16
+
+#!/bin/sh
+ruletype="ip4 ip6"
+side="wan lan"
+qwan="1 3 2 0 5 7 6 4"
+qlan="0 1 2 3 4 5 6 7"
+
+function create_war_acl_rules(){
+	for lw in $side
+	do
+		#echo $lw
+		if [ "$lw" == "wan" ];then
+			listid=254
+			queue=$qwan
+			portmap=0x20
+		else
+			listid=255
+			queue=$qlan
+			portmap=0x1e
+		fi
+		#echo $queue
+		#echo "creating list $listid"
+		ssdk_sh acl list create $listid 255
+		ruleid=0
+		for rt in $ruletype
+		do
+			for qid in $queue
+			do
+				cmd="ssdk_sh acl rule add $listid $ruleid  1 n 0 0"
+				#echo $cmd
+				if [ "$rt" == "ip4" ];then
+					cmd="$cmd ip4 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
+					#echo $cmd
+				else
+					cmd="$cmd ip6 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
+					#echo $cmd
+				fi
+				if [ $ruleid -le 3 ];then
+					#non-zero dscp
+					cmd="$cmd y 0x0 0xff"
+				elif [ $ruleid -le 7 ];then
+					#zero dscp
+					cmd="$cmd n"
+				elif [ $ruleid -le 11 ];then
+					#non-zero dscp
+					cmd="$cmd y 0x0 0xff"
+				else
+					#zero dscp
+					cmd="$cmd n"
+				fi
+				p=$((ruleid/2))
+				cmd="$cmd y mask $((ruleid%2)) 0x1 y mask $((p%2)) 0x1 n n n n n n n n n n n n n n n y n n n n n n n y $qid n n 0 0 n n n n n n n n n n n n n n n n n n n n 0"
+				#echo $cmd
+				$cmd
+				ruleid=`expr $ruleid + 1`
+			done
+		done
+		ssdk_sh acl list bind $listid 0 1 $portmap
+	done
+}
+
+function create_war_cosmap(){
+	ssdk_sh cosmap pri2q set 0 0
+	ssdk_sh cosmap pri2q set 1 0
+	ssdk_sh cosmap pri2q set 2 0
+	ssdk_sh cosmap pri2q set 3 0
+	ssdk_sh cosmap pri2q set 4 1
+	ssdk_sh cosmap pri2q set 5 1
+	ssdk_sh cosmap pri2q set 6 1
+	ssdk_sh cosmap pri2q set 7 1
+	ssdk_sh cosmap pri2ehq set 0 0
+	ssdk_sh cosmap pri2ehq set 1 0
+	ssdk_sh cosmap pri2ehq set 2 0
+	ssdk_sh cosmap pri2ehq set 3 0
+	ssdk_sh cosmap pri2ehq set 4 1
+	ssdk_sh cosmap pri2ehq set 5 1
+	ssdk_sh cosmap pri2ehq set 6 1
+	ssdk_sh cosmap pri2ehq set 7 1
+}
+
+function create_acl_byp_egstp_rules(){
+	chip_ver=$1
+	cmd="ssdk_sh servcode config set 1 n 0 0xfffefc7f 0xffbdff 0 0 0 0 0 0"
+	if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
+		cmd="$cmd 0"
+	fi
+	#echo $cmd
+	$cmd
+
+	ssdk_sh acl list create 56 48
+	#action bypass eg stp check
+	action="y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n n n n n n n"
+	if [ "$chip_ver" == "0x2000" ]; then
+		action="$action n n 0"
+	elif [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
+		action="$action n n n 0"
+	else
+		action="$action 0"
+	fi
+
+	for ruleid in $( seq 0 2 )
+	do
+		if [ "$ruleid" == "0" ];then
+			cmd="ssdk_sh acl rule add 56 0 1 n 0 0 mac n n n n n y 01-80-c2-00-00-00 ff-ff-ff-ff-ff-ff n n n n n n n n n n n n n n n n n n n n n n n"
+		elif [ "$ruleid" == "1" ];then
+			cmd="ssdk_sh acl rule add 56 1 1 n 0 0 mac n n n n n n n yes 0x8809 0xffff n n n n n n n n n n n n n n n n n n n n n"
+		else
+			cmd="ssdk_sh acl rule add 56 2 1 n 0 0 mac n n n n n n n yes 0x888e 0xffff n n n n n n n n n n n n n n n n n n n n n"
+		fi
+		if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
+			cmd="$cmd n $action"
+		else
+			cmd="$cmd $action"
+		fi
+		#echo $cmd
+		$cmd
+	done
+	ssdk_sh acl list bind 56 0 2 1
+}
+
+function delete_war_acl_rules(){
+	for lw in $side
+	do
+		#echo $lw
+		if [ "$lw" == "wan" ];then
+			listid=254
+			queue=$qwan
+			portmap=0x20
+		else
+			listid=255
+			queue=$qlan
+			portmap=0x1e
+		fi
+		ssdk_sh acl list unbind $listid 0 1 $portmap
+		for rt in $ruletype
+		do
+			for qid in $queue
+			do
+				cmd="ssdk_sh acl rule del $listid 0 1"
+				echo $cmd
+				$cmd
+			done
+		done
+		#echo "deleting list $listid"
+		ssdk_sh acl list destroy $listid
+	done
+}
+
+function delete_war_cosmap(){
+	ssdk_sh cosmap pri2q set 0 0
+	ssdk_sh cosmap pri2q set 1 0
+	ssdk_sh cosmap pri2q set 2 1
+	ssdk_sh cosmap pri2q set 3 1
+	ssdk_sh cosmap pri2q set 4 2
+	ssdk_sh cosmap pri2q set 5 2
+	ssdk_sh cosmap pri2q set 6 3
+	ssdk_sh cosmap pri2q set 7 3
+	ssdk_sh cosmap pri2ehq set 0 1
+	ssdk_sh cosmap pri2ehq set 1 0
+	ssdk_sh cosmap pri2ehq set 2 2
+	ssdk_sh cosmap pri2ehq set 3 2
+	ssdk_sh cosmap pri2ehq set 4 3
+	ssdk_sh cosmap pri2ehq set 5 3
+	ssdk_sh cosmap pri2ehq set 6 4
+	ssdk_sh cosmap pri2ehq set 7 5
+}
+
+function delete_acl_byp_egstp_rules(){
+	chip_ver=$1
+	cmd="ssdk_sh servcode config set 1 n 0 0xfffefcff 0xffbfff 0 0 0 0 0 0"
+	if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
+		cmd="$cmd 0"
+	fi
+	#echo $cmd
+	$cmd
+	ssdk_sh acl list unbind 56 0 2 1
+	ssdk_sh acl rule del 56 0 1
+	ssdk_sh acl rule del 56 1 1
+	ssdk_sh acl rule del 56 2 1
+	ssdk_sh acl list destroy 56
+}
+
+function edma_war_config_add(){
+	create_war_cosmap
+	ssdk_sh acl status set enable
+	create_war_acl_rules
+}
+
+function edma_war_config_del(){
+	delete_war_acl_rules
+	delete_war_cosmap
+}
+
+function ipq50xx_serdes_monitor () {
+	#if qca808x phy exist, need to monitor the serdes to avoid the effect for WIFI
+	port_id=2
+	old_linkstatus="DISABLE"
+	phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
+	if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd101" ]; then
+		ssdk_sh debug phy set 29 0xb 0x300d
+		ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
+
+		while true
+		do
+			cur_linkstatus=`ssdk_sh port linkstatus get $port_id | grep Status | awk -F ':' '{print $2}'`
+			#when qca808x phy link status is from down to up, serdes tx would be enabled
+			if [ "$cur_linkstatus" = "ENABLE" ] && [ "$old_linkstatus" = "DISABLE" ]; then
+				ssdk_sh debug phy set 29 0xb 0xb00d
+				ssdk_sh debug uniphy set 0 0x7ac 0xb00d 4
+			fi
+			#when qca808x phy link status is from up to down, serdes tx would be disabled
+			if [ "$cur_linkstatus" = "DISABLE" ] && [ "$old_linkstatus" = "ENABLE" ]; then
+				ssdk_sh debug phy set 29 0xb 0x300d
+				ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
+			fi
+			old_linkstatus=$cur_linkstatus
+		done
+	fi
+}
+
+function ipq53xx_phy_amplitude_set () {
+	#PHY (8081->5321): Full amplitude (bit[7:5]=000), half swing (bit[4]=1)
+	#for qca808x phy sgmii, set half amplitude with src_half_swing register
+	port_id=2
+	phy_addr=0x1d
+	phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
+	if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd101" ]; then
+		ssdk_sh debug phy set $phy_addr 0x40010087 0x208a
+		#Set the Reg0x67 bits[7:5]=3’b000 and bit4=1’b1
+		ampl_val=$(ssdk_sh debug phy get $phy_addr 0x40010067 | grep SSDK | grep -oE '0x[0-9a-fA-F]+' | sed 's/\(0x..\)./\11/')
+		ssdk_sh debug phy set $phy_addr 0x40010067 $ampl_val
+	fi
+}
+
+function ipq53xx_uniphy_amplitude_set () {
+        #UniPhy (5321->8081): Custom amplitude (bit[8:4]=21) = 0xb15d
+	#for ipq53xx sgmii, set half amplitude with tx_emp_lvl/margin_index and tx_margin
+	ssdk_sh debug uniphy set 1 0x7ac 0xb15d 4
+	ssdk_sh debug uniphy set 1 0x24 0 4
+}
+
+ssdk_dependency() {
+	counter=0
+	[ -e /lib/modules/$(uname -r)/qca-ssdk.ko ] && [ ! -d /sys/module/qca_ssdk ] && {
+		insmod qca-ssdk.ko
+	}
+	while [ ! -d /sys/ssdk ] && [ "$counter" -le 5 ]
+	do
+		sleep 1
+		counter=$((counter+1))
+	done
+}
+
+start() {
+	ssdk_dependency
+	chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
+	#The following commands should be uncommented to enable EDMA WAR
+	if [ "$chip_ver" = "0x1401" ]; then
+		#edma_war_config_add
+		echo ''
+	fi
+	#The following commands should be uncommented to add acl egress stp bypass rules
+	if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
+		#create_acl_byp_egstp_rules $chip_ver
+		echo ''
+	fi
+	#The following commands should be uncommented to enable WAR for ipq50xx
+	chip_type_info=`cat tmp/sysinfo/model`
+	result=$(echo $chip_type_info | grep "IPQ5018")
+	if [ "$result" != "" ]; then
+		#ipq50xx_serdes_monitor &
+		#ipq50xx_uniphy_amplitude_set
+		#ipq50xx_phy_amplitude_set
+		echo ''
+	fi
+	if [ "$chip_ver" = "0x2001" ]; then
+		ipq53xx_uniphy_amplitude_set
+		ipq53xx_phy_amplitude_set
+		echo ''
+	fi
+	echo starting
+}
+
+stop() {
+	chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
+	#The following commands should be uncommented to disable EDMA WAR
+	if [ "$chip_ver" = "0x1401" ]; then
+		#edma_war_config_del
+		echo ''
+	fi
+	#The following commands should be uncommented to delete acl egress stp bypass rules
+	if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
+		#delete_acl_byp_egstp_rules $chip_ver
+		echo ''
+	fi
+	echo stoping
+}

feeds/tip/certificates/files/etc/init.d/early_boot

@@ -25,6 +25,11 @@ copy_certificates() {
 }
 
 boot() {
+	case "$(board_name)" in
+	sonicfi,rap6*)
+		touch /tmp/squashfs
+	;;
+	esac
 	[ -f /etc/ucentral/key.pem ] && return
 	/usr/bin/mount_certs
 	copy_certificates

feeds/tip/certificates/files/usr/bin/mount_certs

@@ -37,13 +37,16 @@ sonicfi,rap7*)
 		mtd=$(find_mtd_index certificates)
 		[ -n "$mtd" ] && mount -t ext4 /dev/mtdblock$mtd /certificates
 	fi
-	if [ ! -f /certificates/cert.pem ] || [ ! -f /certificates/key.pem ]; then
-		part=$(tar_part_lookup "0:BOOTCONFIG" "0:BOOTCONFIG1")
-		if [ -n "part" ]; then
-			mmc_dev=$(echo $(find_mmc_part "$part") | sed 's/^.\{5\}//')
-			[ -n "$mmc_dev" ] && tar xf /dev/$mmc_dev -C /certificates
-		fi
+	;;
+sonicfi,rap6*)
+	mtd=$(find_mtd_index certificates)
+	if [ "$(head -c 4 /dev/mtd$mtd)" == "hsqs" ]; then
+		mount -t squashfs /dev/mtdblock$mtd /mnt
+		cp /mnt/* /certificates
+		umount /mnt
 	fi
+		mtd=$(find_mtd_index devinfo)
+		[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
 	;;
 udaya,a5-id2|\
 yuncore,ax820)
@@ -59,19 +62,6 @@ yuncore,ax820)
 		[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
 	fi
 	;;
-sonicfi,rap6*)
-	mtd=$(find_mtd_index certificates)
-	if [ "$(head -c 4 /dev/mtd$mtd)" == "hsqs" ]; then
-		mount -t squashfs /dev/mtdblock$mtd /mnt
-		cp /mnt/* /certificates
-		umount /mnt
-	fi
-	part=$(tar_part_lookup "devinfo" "certificates")
-	if [ -n "$part" ]; then
-		mtd=$(find_mtd_index $part)
-		[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
-	fi
-	;;
 *)
 	mtd=$(find_mtd_index certificates)
 

feeds/tip/certificates/files/usr/bin/store_certs

@@ -14,13 +14,6 @@ tar_part_lookup() {
 
 . /lib/functions.sh
 case "$(board_name)" in
-sonicfi,rap7110c-341x)
-	cd /certificates
-	tar cf /tmp/certs.tar .
-	part=$(tar_part_lookup "0:BOOTCONFIG" "0:BOOTCONFIG1")
-	mmc_dev=$(echo $(find_mmc_part $part) | sed 's/^.\{5\}//')
-	dd if=/tmp/certs.tar of=/dev/$mmc_dev
-	;;
 udaya,a5-id2|\
 yuncore,ax820)
 	cd /certificates
@@ -33,8 +26,7 @@ sonicfi,rap6*)
 	if [ "$(fw_printenv -n store_certs_disabled)" != "1" ]; then
 		cd /certificates
 		tar cf /tmp/certs.tar .
-		part=$(tar_part_lookup "devinfo" "certificates")
-		mtd=$(find_mtd_index $part)
+		mtd=$(find_mtd_index devinfo)
 		block_size=$(cat /sys/class/mtd/mtd$mtd/size)
 		dd if=/tmp/certs.tar of=/tmp/certs_pad.tar bs=$block_size conv=sync
 		mtd write /tmp/certs_pad.tar /dev/mtd$mtd

feeds/tip/cloud_discovery/files/usr/bin/cloud_discovery

@@ -23,6 +23,7 @@ let ubus = libubus.connect();
 let uci = libuci.cursor();
 let state = DISCOVER;
 let discovery_method = "";
+let discovery_block_list = [];
 let validate_time;
 let offline_time;
 let orphan_time;
@@ -49,10 +50,12 @@ function detect_certificate_type() {
 	let issuer = pipe.read("all");
 	pipe.close();
 
-	if (!match(issuer, /Telecom Infra Project Issuing CA/)) {
+	if (match(issuer, /OpenLAN Demo Birth CA/)) {
 		ulog(LOG_INFO, 'Certificate type is "Demo" \n');
 		cds_server = 'discovery-qa.open-lan.org';
 		timeouts.expiry_threshold = 3 * 24 * 60 * 60;
+	} else if (match(issuer, /OpenLAN Birth Issuing CA/)) {
+		ulog(LOG_INFO, 'Certificate type is "Production"\n');
 	} else {
 		ulog(LOG_INFO, 'Certificate type is "TIP"\n');
 	}
@@ -100,6 +103,9 @@ function gateway_load() {
 }
 
 function discovery_state_write() {
+	if (length(discovery_method) == 0)
+		return;
+
 	let discovery_state = {
 		"type": discovery_method,
 		"updated": time()
@@ -153,6 +159,7 @@ function set_state(set) {
 		ulog(LOG_INFO, 'Wait for validation\n');
 		validate_time = time();
 		state = VALIDATING;
+		push(discovery_block_list, discovery_method);
 		break;
 
 	case ONLINE:
@@ -161,6 +168,7 @@ function set_state(set) {
 			ulog(LOG_INFO, 'Setting cloud controller to validated\n');
 			gateway_write({ valid: true });
 			discovery_state_write();
+			discovery_block_list = [];
 		}
 		break;
 
@@ -229,6 +237,13 @@ function time_is_valid() {
 	return valid;
 }
 
+function is_discover_method_blacked() {
+	if (discovery_method in discovery_block_list)
+		return true;
+
+	return false;
+}
+
 function interval_handler() {
 	printf(`State ${state}\n`);
 	switch(state) {
@@ -258,19 +273,21 @@ function interval_handler() {
 		if (!time_is_valid())
 			return;
 
-		discovery_method = DISCOVER_DHCP;
-		if (discover_dhcp())
-			return;
-
 		if (system('/usr/bin/est_client enroll'))
 			return;
 
+		discovery_method = DISCOVER_DHCP;
+		if (!is_discover_method_blacked() && discover_dhcp())
+			return;
+
 		discovery_method = DISCOVER_FLASH;
-		if (!discover_flash())
+		if (!is_discover_method_blacked() && !discover_flash())
 			return;
 
 		discovery_method = DISCOVER_LOOKUP;
 		redirector_lookup();
+
+		discovery_block_list = [];
 		break;
 
 	case VALIDATING:

feeds/tip/cloud_discovery/files/usr/bin/est_client

@@ -16,9 +16,11 @@ function set_est_server() {
 	let issuer = pipe.read("all");
 	pipe.close();
 
-	if (!match(issuer, /Telecom Infra Project Issuing CA/)) {
+	if (match(issuer, /OpenLAN Demo Birth CA/)) {
 		ulog(LOG_INFO, 'Certificate type is "Demo" \n');
 		est_server = 'qaest.certificates.open-lan.org:8001';
+	} else if (match(issuer, /OpenLAN Birth Issuing CA/)) {
+		ulog(LOG_INFO, 'Certificate type is "Production"\n');
 	} else {
 		ulog(LOG_INFO, 'Certificate type is "TIP"\n');
 	}
@@ -165,7 +167,7 @@ function fwtool() {
 	let issuer = pipe.read("all");
 	pipe.close();
 
-	if (!(match(issuer, /OpenLAN/) && match(issuer, /Birth CA/)))
+	if (!(match(issuer, /OpenLAN/) && match(issuer, /Birth/)))
 		return 0;
 
 	ulog(LOG_INFO, 'The issuer is insta\n');

feeds/tip/cloud_discovery/files/usr/share/ucentral/cloud_discovery.uc

@@ -5,8 +5,8 @@ import * as fs from 'fs';
 
 let cmd = ARGV[0];
 let ifname = getenv("interface");
-let opt138 = getenv("opt138");
-let opt224 = getenv("opt224");
+let opt138 = fs.readfile('/tmp/dhcp-option-138');
+let opt224 = fs.readfile('/tmp/dhcp-option-224');
 
 if (cmd != 'bound' && cmd != 'renew')
 	exit(0);
@@ -23,14 +23,14 @@ let cloud = {
 	lease: true,
 };
 if (opt138) {
-	let dhcp = hexdec(opt138);
+	let dhcp = opt138;
 	dhcp = split(dhcp, ':');
 	cloud.dhcp_server = dhcp[0];
 	cloud.dhcp_port = dhcp[1] ?? 15002;
 	cloud.no_validation = true;
 }
 if (opt224) {
-	let dhcp = hexdec(opt224);
+	let dhcp = opt224;
 	dhcp = split(dhcp, ':');
 	cloud.dhcp_server = dhcp[0];
 	cloud.dhcp_port = dhcp[1] ?? 15002;

feeds/ucentral/ucentral-client/Makefile

@@ -4,6 +4,7 @@ PKG_NAME:=ucentral-client
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-client.git
+PKG_MIRROR_HASH:=2935998d6074f0c290d9b96c2988c89aae6f405608f12a0063fa7215498bae9a
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_DATE:=2025-08-11
 PKG_SOURCE_VERSION:=549e84e5fea7230c5471d6a3dbddcc7d3152f665

feeds/ucentral/ucentral-client/files/etc/ucentral/version.json

@@ -1,5 +1,5 @@
 {
 	"major": 4,
 	"minor": 1,
-	"patch": 0
+	"patch": 1
 }

feeds/ucentral/ucentral-event/files/ucentral-event

@@ -2,6 +2,8 @@
 
 'use strict';
 
+push(REQUIRE_SEARCH_PATH, '/usr/share/ucentral/*.uc');
+
 import * as libubus from 'ubus';
 import * as libuci from 'uci';
 import * as uloop from 'uloop';
@@ -36,6 +38,7 @@ let ucentral_running = false;
 let pending_events = [];
 let relay = {};
 let net_config = {};
+let vlan_refcount = {};
 
 
 function config_load() {
@@ -52,6 +55,20 @@ function config_load() {
 	net_config = {};
 }
 
+function vlan_refcount_init() {
+	let stations = require('wifi.station');
+
+	vlan_refcount = {};
+
+	for (let k, v in stations) {
+		let vlan = split(k, '-v')[1];
+		let count = length(v);
+		if (vlan && count > 0) {
+			vlan_refcount[vlan] = count;
+		}
+	}
+}
+
 function match(object, type, list) {
 	if (object in list || type in list)
 		return true;
@@ -261,13 +278,24 @@ handlers = {
 		if (config.config.swconfig)
 			return handlers.vlan_add_swconfig(notify);
 
-		for (let wan in wan_ports) {
-			let msg = {
-				name: wan,
-				vlan: [ `${notify.data.vlan_id}:t` ]
-			};
-			ubus.call('network.interface.up_none', 'add_device', msg);
-			ubus.call('udevstats', 'add_device', { device: wan, vlan: +notify.data.vlan_id });
+		let vlan_id = `${notify.data.vlan_id}`;
+		vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 0) + 1;
+
+		let parts = split(notify.data.ifname, '-v');
+		let is_wifi_iface = (length(parts) == 2 && wildcard(parts[0], 'wlan*'));
+
+		if (vlan_refcount[vlan_id] > 1 && !is_wifi_iface)
+			return;
+
+		if (vlan_refcount[vlan_id] == 1) {
+			for (let wan in wan_ports) {
+				let msg = {
+					name: wan,
+					vlan: [ `${notify.data.vlan_id}:t` ]
+				};
+				ubus.call('network.interface.up_none', 'add_device', msg);
+				ubus.call('udevstats', 'add_device', { device: wan, vlan: +notify.data.vlan_id });
+			}
 		}
 
 		let msg = {
@@ -282,6 +310,14 @@ handlers = {
 	vlan_remove: function(notify) {
 		if (config.config.swconfig)
 			return;
+
+		let vlan_id = `${notify.data.vlan_id}`;
+		vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 1) - 1;
+
+		if (vlan_refcount[vlan_id] > 0)
+			return;
+		delete vlan_refcount[vlan_id];
+
 		for (let wan in wan_ports) {
 			let msg = {
 				name: wan,
@@ -624,6 +660,7 @@ let ubus_methods = {
 };
 
 config_load();
+vlan_refcount_init();
 
 hapd_subscriber = ubus.subscriber(hapd_subscriber_notify_cb, hapd_subscriber_remove_cb);
 dhcp_subscriber = ubus.subscriber(dhcp_subscriber_notify_cb, dhcp_subscriber_remove_cb);

feeds/ucentral/ucentral-schema/Makefile

@@ -4,9 +4,10 @@ PKG_NAME:=ucentral-schema
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-schema.git
+PKG_MIRROR_HASH:=c0f43db0530a38eb424e81908ad47a14e1d4d8f8a86eb148e34f98187c79ba6b
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-08-04
-PKG_SOURCE_VERSION:=1c6b3095cb9e398fcbfcb2bf995365066eb76b21
+PKG_SOURCE_DATE:=2025-10-16
+PKG_SOURCE_VERSION:=dc9cad95641266a08de73aab85d931d992090159
 PKG_MAINTAINER:=John Crispin <john@phrozen.org>
 PKG_LICENSE:=BSD-3-Clause
 

feeds/ucentral/ucentral-schema/files/etc/ucentral/examples/multi-psk.json

@@ -1,17 +1,12 @@
 {
 	"uuid": 2,
 	"radios": [
-		{
-			"band": "6G",
-			"country": "CA",
-			"channel-mode": "HE",
-			"channel-width": 80
-		},
 		{
 			"band": "5G",
 			"country": "CA",
 			"channel-mode": "HE",
-			"channel-width": 80
+			"channel-width": 80,
+			"channel": 36
 		},
 		{
 			"band": "2G",
@@ -57,10 +52,7 @@
 							"key": "bbbbbbbb"
 						}
 					],
-					"roaming": {
-						"message-exchange": "ds",
-						"generate-psk": true
-					}
+					"roaming": true
 				}
 			]
 		},

feeds/ucentral/ucentral-schema/files/usr/share/ucentral/wifi_max_user.uc

@@ -1,7 +1,10 @@
 #!/usr/bin/ucode 
+import { readfile } from "fs";
 
 let nl = require("nl80211");
 let def = nl.const;
+let board_name = rtrim(readfile('/tmp/sysinfo/board_name'), '\n');
+let phy_index = 0;
 
 function phy_get() {
 	let res = nl.request(def.NL80211_CMD_GET_WIPHY, def.NLM_F_DUMP, { split_wiphy_dump: true });
@@ -12,5 +15,11 @@ function phy_get() {
 	return res;
 }
 
+switch(board_name) {
+case 'edgecore,eap112':
+        phy_index = 1;
+        break;
+}
+
 let phys = phy_get();
-printf("%d\n", phys[0].max_ap_assoc || 32);
+printf("%d\n", phys[phy_index].max_ap_assoc || 32);

feeds/ucentral/ucentral-tools/Makefile

@@ -3,12 +3,6 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=ucentral-tools
 PKG_RELEASE:=1
 
-PKG_SOURCE_URL=https://github.com/blogic/ucentral-tools.git
-PKG_MIRROR_HASH:=9ae6a0cd431595871c233550427c4043c2ba7ddb3c5d87e46ab74a03b2b5a947
-PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2021-01-28
-PKG_SOURCE_VERSION:=b013fc636e48d407870a46aaa68a09ed74de8d6f
-
 PKG_MAINTAINER:=John Crispin <john@phrozen.org>
 PKG_LICENSE:=BSD-3-Clause
 

feeds/ucentral/ucentral-tools/src/CMakeLists.txt

@@ -0,0 +1,36 @@
+cmake_minimum_required(VERSION 2.6)
+
+PROJECT(openwifi-tools C)
+INCLUDE(GNUInstallDirs)
+ADD_DEFINITIONS(-Os -ggdb -Wall -Werror --std=gnu99 -Wmissing-declarations)
+
+SET(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "")
+
+ADD_EXECUTABLE(firstcontact firstcontact.c)
+TARGET_LINK_LIBRARIES(firstcontact curl crypto ssl ubox)
+INSTALL(TARGETS firstcontact
+	RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
+)
+
+ADD_EXECUTABLE(dhcpdiscover dhcpdiscover.c)
+INSTALL(TARGETS dhcpdiscover
+	RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
+)
+
+ADD_EXECUTABLE(dnsprobe dnsprobe.c)
+TARGET_LINK_LIBRARIES(dnsprobe ubox resolv)
+INSTALL(TARGETS dnsprobe
+	RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
+)
+
+ADD_EXECUTABLE(radiusprobe radiusprobe.c)
+TARGET_LINK_LIBRARIES(radiusprobe radcli)
+INSTALL(TARGETS radiusprobe
+	RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
+)
+
+ADD_EXECUTABLE(ip-collide ip-collide.c)
+TARGET_LINK_LIBRARIES(ip-collide ubox)
+INSTALL(TARGETS ip-collide
+	RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
+)

feeds/ucentral/ucentral-tools/src/dnsprobe.c

@@ -0,0 +1,690 @@
+/*
+ * nslookup_lede - musl compatible replacement for busybox nslookup
+ *
+ * Copyright (C) 2017 Jo-Philipp Wich <jo@mein.io>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+//config:config NSLOOKUP_OPENWRT
+//config:	bool "nslookup_openwrt"
+//config:	depends on !NSLOOKUP
+//config:	default y
+//config:	help
+//config:	  nslookup is a tool to query Internet name servers (LEDE flavor).
+//config:
+//config:config FEATURE_NSLOOKUP_OPENWRT_LONG_OPTIONS
+//config:       bool "Enable long options"
+//config:       default y
+//config:       depends on NSLOOKUP_OPENWRT && LONG_OPTS
+//config:       help
+//config:         Support long options for the nslookup applet.
+
+//applet:IF_NSLOOKUP_OPENWRT(APPLET(nslookup, BB_DIR_USR_BIN, BB_SUID_DROP))
+
+//kbuild:lib-$(CONFIG_NSLOOKUP_OPENWRT) += nslookup_lede.o
+
+//usage:#define nslookup_lede_trivial_usage
+//usage:       "[HOST] [SERVER]"
+//usage:#define nslookup_lede_full_usage "\n\n"
+//usage:       "Query the nameserver for the IP address of the given HOST\n"
+//usage:       "optionally using a specified DNS server"
+//usage:
+//usage:#define nslookup_lede_example_usage
+//usage:       "$ nslookup localhost\n"
+//usage:       "Server:     default\n"
+//usage:       "Address:    default\n"
+//usage:       "\n"
+//usage:       "Name:       debian\n"
+//usage:       "Address:    127.0.0.1\n"
+
+#include <stdio.h>
+#include <resolv.h>
+#include <string.h>
+#include <errno.h>
+#include <time.h>
+#include <poll.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <sys/socket.h>
+#include <arpa/inet.h>
+#include <net/if.h>
+#include <netdb.h>
+
+#include <libubox/ulog.h>
+
+#define ENABLE_FEATURE_IPV6	1
+
+typedef struct len_and_sockaddr {
+	socklen_t len;
+	union {
+		struct sockaddr sa;
+		struct sockaddr_in sin;
+#if ENABLE_FEATURE_IPV6
+		struct sockaddr_in6 sin6;
+#endif
+	} u;
+} len_and_sockaddr;
+
+struct ns {
+	const char *name;
+	len_and_sockaddr addr;
+	int failures;
+	int replies;
+};
+
+struct query {
+	const char *name;
+	size_t qlen, rlen;
+	unsigned char query[512], reply[512];
+	unsigned long latency;
+	int rcode, n_ns;
+};
+
+static const char *rcodes[] = {
+	"NOERROR",
+	"FORMERR",
+	"SERVFAIL",
+	"NXDOMAIN",
+	"NOTIMP",
+	"REFUSED",
+	"YXDOMAIN",
+	"YXRRSET",
+	"NXRRSET",
+	"NOTAUTH",
+	"NOTZONE",
+	"RESERVED11",
+	"RESERVED12",
+	"RESERVED13",
+	"RESERVED14",
+	"RESERVED15",
+	"BADVERS"
+};
+
+static unsigned int default_port = 53;
+static unsigned int default_retry = 1;
+static unsigned int default_timeout = 2;
+
+
+static int parse_reply(const unsigned char *msg, size_t len, int *bb_style_counter)
+{
+	ns_msg handle;
+	ns_rr rr;
+	int i, n, rdlen;
+	const char *format = NULL;
+	char astr[INET6_ADDRSTRLEN], dname[MAXDNAME];
+	const unsigned char *cp;
+
+	if (ns_initparse(msg, len, &handle) != 0) {
+		//fprintf(stderr, "Unable to parse reply: %s\n", strerror(errno));
+		return -1;
+	}
+
+	for (i = 0; i < ns_msg_count(handle, ns_s_an); i++) {
+		if (ns_parserr(&handle, ns_s_an, i, &rr) != 0) {
+			//fprintf(stderr, "Unable to parse resource record: %s\n", strerror(errno));
+			return -1;
+		}
+
+		rdlen = ns_rr_rdlen(rr);
+
+		switch (ns_rr_type(rr))
+		{
+		case ns_t_a:
+			if (rdlen != 4) {
+				//fprintf(stderr, "Unexpected A record length\n");
+				return -1;
+			}
+			inet_ntop(AF_INET, ns_rr_rdata(rr), astr, sizeof(astr));
+			printf("Name:\t%s\nAddress: %s\n", ns_rr_name(rr), astr);
+			break;
+
+#if ENABLE_FEATURE_IPV6
+		case ns_t_aaaa:
+			if (rdlen != 16) {
+				//fprintf(stderr, "Unexpected AAAA record length\n");
+				return -1;
+			}
+			inet_ntop(AF_INET6, ns_rr_rdata(rr), astr, sizeof(astr));
+			printf("%s\thas AAAA address %s\n", ns_rr_name(rr), astr);
+			break;
+#endif
+
+		case ns_t_ns:
+			if (!format)
+				format = "%s\tnameserver = %s\n";
+			/* fall through */
+
+		case ns_t_cname:
+			if (!format)
+				format = "%s\tcanonical name = %s\n";
+			/* fall through */
+
+		case ns_t_ptr:
+			if (!format)
+				format = "%s\tname = %s\n";
+			if (ns_name_uncompress(ns_msg_base(handle), ns_msg_end(handle),
+				ns_rr_rdata(rr), dname, sizeof(dname)) < 0) {
+				//fprintf(stderr, "Unable to uncompress domain: %s\n", strerror(errno));
+				return -1;
+			}
+			printf(format, ns_rr_name(rr), dname);
+			break;
+
+		case ns_t_mx:
+			if (rdlen < 2) {
+				fprintf(stderr, "MX record too short\n");
+				return -1;
+			}
+			n = ns_get16(ns_rr_rdata(rr));
+			if (ns_name_uncompress(ns_msg_base(handle), ns_msg_end(handle),
+				ns_rr_rdata(rr) + 2, dname, sizeof(dname)) < 0) {
+				//fprintf(stderr, "Cannot uncompress MX domain: %s\n", strerror(errno));
+				return -1;
+			}
+			printf("%s\tmail exchanger = %d %s\n", ns_rr_name(rr), n, dname);
+			break;
+
+		case ns_t_txt:
+			if (rdlen < 1) {
+				//fprintf(stderr, "TXT record too short\n");
+				return -1;
+			}
+			n = *(unsigned char *)ns_rr_rdata(rr);
+			if (n > 0) {
+				memset(dname, 0, sizeof(dname));
+				memcpy(dname, ns_rr_rdata(rr) + 1, n);
+				printf("%s\ttext = \"%s\"\n", ns_rr_name(rr), dname);
+			}
+			break;
+
+		case ns_t_soa:
+			if (rdlen < 20) {
+				//fprintf(stderr, "SOA record too short\n");
+				return -1;
+			}
+
+			printf("%s\n", ns_rr_name(rr));
+
+			cp = ns_rr_rdata(rr);
+			n = ns_name_uncompress(ns_msg_base(handle), ns_msg_end(handle),
+			                       cp, dname, sizeof(dname));
+
+			if (n < 0) {
+				//fprintf(stderr, "Unable to uncompress domain: %s\n", strerror(errno));
+				return -1;
+			}
+
+			printf("\torigin = %s\n", dname);
+			cp += n;
+
+			n = ns_name_uncompress(ns_msg_base(handle), ns_msg_end(handle),
+			                       cp, dname, sizeof(dname));
+
+			if (n < 0) {
+				//fprintf(stderr, "Unable to uncompress domain: %s\n", strerror(errno));
+				return -1;
+			}
+
+			printf("\tmail addr = %s\n", dname);
+			cp += n;
+
+			printf("\tserial = %lu\n", ns_get32(cp));
+			cp += 4;
+
+			printf("\trefresh = %lu\n", ns_get32(cp));
+			cp += 4;
+
+			printf("\tretry = %lu\n", ns_get32(cp));
+			cp += 4;
+
+			printf("\texpire = %lu\n", ns_get32(cp));
+			cp += 4;
+
+			printf("\tminimum = %lu\n", ns_get32(cp));
+			break;
+
+		default:
+			break;
+		}
+	}
+
+	return i;
+}
+
+static int parse_nsaddr(const char *addrstr, len_and_sockaddr *lsa)
+{
+	char *eptr, *hash, ifname[IFNAMSIZ];
+	unsigned int port = default_port;
+	unsigned int scope = 0;
+
+	hash = strchr(addrstr, '#');
+
+	if (hash) {
+		*hash++ = '\0';
+		port = strtoul(hash, &eptr, 10);
+
+		if (eptr == hash || *eptr != '\0' || port > 65535) {
+			errno = EINVAL;
+			return -1;
+		}
+	}
+
+	hash = strchr(addrstr, '%');
+
+	if (hash) {
+		for (eptr = ++hash; *eptr != '\0' && *eptr != '#'; eptr++) {
+			if ((eptr - hash) >= IFNAMSIZ) {
+				errno = ENODEV;
+				return -1;
+			}
+
+			ifname[eptr - hash] = *eptr;
+		}
+
+		ifname[eptr - hash] = '\0';
+		scope = if_nametoindex(ifname);
+
+		if (scope == 0) {
+			errno = ENODEV;
+			return -1;
+		}
+	}
+
+#if ENABLE_FEATURE_IPV6
+	if (inet_pton(AF_INET6, addrstr, &lsa->u.sin6.sin6_addr)) {
+		lsa->u.sin6.sin6_family = AF_INET6;
+		lsa->u.sin6.sin6_port = htons(port);
+		lsa->u.sin6.sin6_scope_id = scope;
+		lsa->len = sizeof(lsa->u.sin6);
+		return 0;
+	}
+#endif
+
+	if (!scope && inet_pton(AF_INET, addrstr, &lsa->u.sin.sin_addr)) {
+		lsa->u.sin.sin_family = AF_INET;
+		lsa->u.sin.sin_port = htons(port);
+		lsa->len = sizeof(lsa->u.sin);
+		return 0;
+	}
+
+	errno = EINVAL;
+	return -1;
+}
+
+static unsigned long mtime(void)
+{
+	struct timespec ts;
+	clock_gettime(CLOCK_REALTIME, &ts);
+	return (unsigned long)ts.tv_sec * 1000 + ts.tv_nsec / 1000000;
+}
+
+#if ENABLE_FEATURE_IPV6
+static void to_v4_mapped(len_and_sockaddr *a)
+{
+	if (a->u.sa.sa_family != AF_INET)
+		return;
+
+	memcpy(a->u.sin6.sin6_addr.s6_addr + 12,
+	       &a->u.sin.sin_addr, 4);
+
+	memcpy(a->u.sin6.sin6_addr.s6_addr,
+	       "\0\0\0\0\0\0\0\0\0\0\xff\xff", 12);
+
+	a->u.sin6.sin6_family = AF_INET6;
+	a->u.sin6.sin6_flowinfo = 0;
+	a->u.sin6.sin6_scope_id = 0;
+	a->len = sizeof(a->u.sin6);
+}
+#endif
+
+
+/*
+ * Function logic borrowed & modified from musl libc, res_msend.c
+ */
+
+static int send_queries(struct ns *ns, int n_ns, struct query *queries, int n_queries)
+{
+	int fd;
+	int timeout = default_timeout * 1000, retry_interval, servfail_retry = 0;
+	len_and_sockaddr from = { };
+#if ENABLE_FEATURE_IPV6
+	int one = 1;
+#endif
+	int recvlen = 0;
+	int n_replies = 0;
+	struct pollfd pfd;
+	unsigned long t0, t1, t2;
+	int nn, qn, next_query = 0;
+
+	from.u.sa.sa_family = AF_INET;
+	from.len = sizeof(from.u.sin);
+
+#if ENABLE_FEATURE_IPV6
+	for (nn = 0; nn < n_ns; nn++) {
+		if (ns[nn].addr.u.sa.sa_family == AF_INET6) {
+			from.u.sa.sa_family = AF_INET6;
+			from.len = sizeof(from.u.sin6);
+			break;
+		}
+	}
+#endif
+
+	/* Get local address and open/bind a socket */
+	fd = socket(from.u.sa.sa_family, SOCK_DGRAM|SOCK_CLOEXEC|SOCK_NONBLOCK, 0);
+
+#if ENABLE_FEATURE_IPV6
+	/* Handle case where system lacks IPv6 support */
+	if (fd < 0 && from.u.sa.sa_family == AF_INET6 && errno == EAFNOSUPPORT) {
+		fd = socket(AF_INET, SOCK_DGRAM|SOCK_CLOEXEC|SOCK_NONBLOCK, 0);
+		from.u.sa.sa_family = AF_INET;
+	}
+#endif
+
+	if (fd < 0)
+		return -1;
+
+	if (bind(fd, &from.u.sa, from.len) < 0) {
+		close(fd);
+		return -1;
+	}
+
+#if ENABLE_FEATURE_IPV6
+	/* Convert any IPv4 addresses in a mixed environment to v4-mapped */
+	if (from.u.sa.sa_family == AF_INET6) {
+		setsockopt(fd, IPPROTO_IPV6, IPV6_V6ONLY, &one, sizeof(one));
+
+		for (nn = 0; nn < n_ns; nn++)
+			to_v4_mapped(&ns[nn].addr);
+	}
+#endif
+
+	pfd.fd = fd;
+	pfd.events = POLLIN;
+	retry_interval = timeout / default_retry;
+	t0 = t2 = mtime();
+	t1 = t2 - retry_interval;
+
+	for (; t2 - t0 < timeout; t2 = mtime()) {
+		if (t2 - t1 >= retry_interval) {
+			for (qn = 0; qn < n_queries; qn++) {
+				if (queries[qn].rlen)
+					continue;
+
+				for (nn = 0; nn < n_ns; nn++) {
+					sendto(fd, queries[qn].query, queries[qn].qlen,
+					       MSG_NOSIGNAL, &ns[nn].addr.u.sa, ns[nn].addr.len);
+				}
+			}
+
+			t1 = t2;
+			servfail_retry = 2 * n_queries;
+		}
+
+		/* Wait for a response, or until time to retry */
+		if (poll(&pfd, 1, t1+retry_interval-t2) <= 0)
+			continue;
+
+		while (1) {
+			recvlen = recvfrom(fd, queries[next_query].reply,
+			                   sizeof(queries[next_query].reply), 0,
+			                   &from.u.sa, &from.len);
+
+			/* read error */
+			if (recvlen < 0)
+				break;
+
+			/* Ignore non-identifiable packets */
+			if (recvlen < 4)
+				continue;
+
+			/* Ignore replies from addresses we didn't send to */
+			for (nn = 0; nn < n_ns; nn++)
+				if (memcmp(&from.u.sa, &ns[nn].addr.u.sa, from.len) == 0)
+					break;
+
+			if (nn >= n_ns)
+				continue;
+
+			/* Find which query this answer goes with, if any */
+			for (qn = next_query; qn < n_queries; qn++)
+				if (!memcmp(queries[next_query].reply, queries[qn].query, 2))
+					break;
+
+			if (qn >= n_queries || queries[qn].rlen)
+				continue;
+
+			queries[qn].rcode = queries[next_query].reply[3] & 15;
+			queries[qn].latency = mtime() - t0;
+			queries[qn].n_ns = nn;
+
+			ns[nn].replies++;
+
+			/* Only accept positive or negative responses;
+			 * retry immediately on server failure, and ignore
+			 * all other codes such as refusal. */
+			switch (queries[qn].rcode) {
+			case 0:
+			case 3:
+				break;
+
+			case 2:
+				if (servfail_retry && servfail_retry--) {
+					ns[nn].failures++;
+					sendto(fd, queries[qn].query, queries[qn].qlen,
+					       MSG_NOSIGNAL, &ns[nn].addr.u.sa, ns[nn].addr.len);
+				}
+				/* fall through */
+
+			default:
+				continue;
+			}
+
+			/* Store answer */
+			n_replies++;
+
+			queries[qn].rlen = recvlen;
+
+			if (qn == next_query) {
+				while (next_query < n_queries) {
+					if (!queries[next_query].rlen)
+						break;
+
+					next_query++;
+				}
+			}
+			else {
+				memcpy(queries[qn].reply, queries[next_query].reply, recvlen);
+			}
+
+			if (next_query >= n_queries)
+				return n_replies;
+		}
+	}
+
+	return n_replies;
+}
+
+static struct ns *add_ns(struct ns **ns, int *n_ns, const char *addr)
+{
+	char portstr[sizeof("65535")], *p;
+	len_and_sockaddr a = { };
+	struct ns *tmp;
+	struct addrinfo *ai, *aip, hints = {
+		.ai_flags = AI_NUMERICSERV,
+		.ai_socktype = SOCK_DGRAM
+	};
+
+	if (parse_nsaddr(addr, &a)) {
+		/* Maybe we got a domain name, attempt to resolve it using the standard
+		 * resolver routines */
+
+		p = strchr(addr, '#');
+		snprintf(portstr, sizeof(portstr), "%hu",
+		         (unsigned short)(p ? strtoul(p, NULL, 10) : default_port));
+
+		if (!getaddrinfo(addr, portstr, &hints, &ai)) {
+			for (aip = ai; aip; aip = aip->ai_next) {
+				if (aip->ai_addr->sa_family != AF_INET &&
+				    aip->ai_addr->sa_family != AF_INET6)
+					continue;
+
+#if ! ENABLE_FEATURE_IPV6
+				if (aip->ai_addr->sa_family != AF_INET)
+					continue;
+#endif
+
+				tmp = realloc(*ns, sizeof(**ns) * (*n_ns + 1));
+
+				if (!tmp)
+					return NULL;
+
+				*ns = tmp;
+
+				(*ns)[*n_ns].name = addr;
+				(*ns)[*n_ns].replies = 0;
+				(*ns)[*n_ns].failures = 0;
+				(*ns)[*n_ns].addr.len = aip->ai_addrlen;
+
+				memcpy(&(*ns)[*n_ns].addr.u.sa, aip->ai_addr, aip->ai_addrlen);
+
+				(*n_ns)++;
+			}
+
+			freeaddrinfo(ai);
+
+			return &(*ns)[*n_ns];
+		}
+
+		return NULL;
+	}
+
+	tmp = realloc(*ns, sizeof(**ns) * (*n_ns + 1));
+
+	if (!tmp)
+		return NULL;
+
+	*ns = tmp;
+
+	(*ns)[*n_ns].addr = a;
+	(*ns)[*n_ns].name = addr;
+	(*ns)[*n_ns].replies = 0;
+	(*ns)[*n_ns].failures = 0;
+
+	return &(*ns)[(*n_ns)++];
+}
+
+static struct query *add_query(struct query **queries, int *n_queries,
+                               int type, const char *dname)
+{
+	struct query *tmp;
+	ssize_t qlen;
+
+	tmp = realloc(*queries, sizeof(**queries) * (*n_queries + 1));
+
+	if (!tmp)
+		return NULL;
+
+	memset(&tmp[*n_queries], 0, sizeof(*tmp));
+
+	qlen = res_mkquery(QUERY, dname, C_IN, type, NULL, 0, NULL,
+	                   tmp[*n_queries].query, sizeof(tmp[*n_queries].query));
+
+	tmp[*n_queries].qlen = qlen;
+	tmp[*n_queries].name = dname;
+	*queries = tmp;
+
+	return &tmp[(*n_queries)++];
+}
+
+int main(int argc, char **argv)
+{
+	int rc = 1;
+	struct ns *ns = NULL;
+	struct query *queries = NULL;
+	int n_ns = 0, n_queries = 0;
+	int c = 0;
+
+	char *url = "telecominfraproject.com";
+	char *server = "127.0.0.1";
+	int v6 = 0;
+
+	while (1) {
+		int option = getopt(argc, argv, "u:s:i:6");
+
+		if (option == -1)
+			break;
+
+		switch (option) {
+		case '6':
+			v6 = 1;
+			break;
+		case 'u':
+			url = optarg;
+			break;
+		case 's':
+			server = optarg;
+			break;
+		default:
+		case 'h':
+			printf("Usage: dnsprobe OPTIONS\n"
+			       "  -6 - use ipv6\n"
+			       "  -u <url>\n"
+			       "  -s <server>\n");
+			return -1;
+		}
+	}
+
+	ulog_open(ULOG_SYSLOG | ULOG_STDIO, LOG_DAEMON, "dnsprobe");
+
+	ULOG_INFO("attempting to probe dns - %s %s %s\n",
+		url, server, v6 ? "ipv6" : "");
+
+
+	add_query(&queries, &n_queries, v6 ? T_AAAA : T_A, url);
+
+	add_ns(&ns, &n_ns, server);
+
+	rc = send_queries(&ns[0], 1, queries, n_queries);
+	if (rc <= 0) {
+		fprintf(stderr, "Failed to send queries: %s\n", strerror(errno));
+		rc = -1;
+		goto out;
+	}
+
+	if (queries[0].rcode != 0) {
+		printf("** server can't find %s: %s\n", queries[0].name,
+		rcodes[queries[0].rcode]);
+		goto out;
+	}
+
+	if (queries[0].rlen) {
+		c = parse_reply(queries[0].reply, queries[0].rlen, NULL);
+	}
+
+	if (c == 0)
+		printf("*** Can't find %s: No answer\n", queries[0].name);
+	else if (c < 0)
+		printf("*** Can't find %s: Parse error\n", queries[0].name);
+	else
+		rc = 0;
+
+out:
+	if (n_ns)
+		free(ns);
+
+	if (n_queries)
+		free(queries);
+
+	return rc;
+}

feeds/ucentral/ucentral-tools/src/firstcontact.c

@@ -0,0 +1,100 @@
+#define _GNU_SOURCE
+#include <stdio.h>
+#include <getopt.h>
+
+#include <curl/curl.h>
+
+#include <libubox/ulog.h>
+
+static const char *file_cert = "/etc/open-wifi/client.pem";
+static const char *file_key  = "/etc/open-wifi/client_dec.key";
+static const char *file_json = "/etc/open-wifi/redirector.json";
+static const char *file_dbg  = "/tmp/firstcontact.hdr";
+
+int main(int argc, char **argv)
+{
+	FILE *fp_json;
+	FILE *fp_dbg;
+	CURLcode res;
+	CURL *curl;
+	char *devid = NULL;
+	char *url;
+
+	while (1) {
+		int option = getopt(argc, argv, "k:c:o:hi:");
+
+		if (option == -1)
+			break;
+
+		switch (option) {
+		case 'k':
+			file_key = optarg;
+			break;
+		case 'c':
+			file_cert = optarg;
+			break;
+		case 'o':
+			file_json = optarg;
+			break;
+		case 'i':
+			devid = optarg;
+			break;
+		default:
+		case 'h':
+			printf("Usage: firstcontact OPTIONS\n"
+			       "  -k <keyfile>\n"
+			       "  -c <certfile>\n"
+			       "  -o <outfile>\n"
+			       "  -i <devid>\n");
+			return -1;
+		}
+	}
+
+	if (!devid) {
+		fprintf(stderr, "missing devid\n");
+		return -1;
+	}
+
+	ulog_open(ULOG_SYSLOG | ULOG_STDIO, LOG_DAEMON, "firstcontact");
+	ULOG_INFO("attempting first contact\n");
+
+	fp_dbg = fopen(file_dbg, "wb");
+	fp_json = fopen(file_json, "wb");
+	if (!fp_json) {
+		ULOG_ERR("failed to create %s\n", file_json);
+		return -1;
+	}
+
+	curl_global_init(CURL_GLOBAL_DEFAULT);
+	curl = curl_easy_init();
+	if (!curl) {
+		ULOG_ERR("curl_easy_init failed\n");
+		return -1;
+	}
+
+	if (asprintf(&url, "https://clientauth.demo.one.digicert.com/iot/api/v2/device/%s", devid) < 0) {
+		ULOG_ERR("failed to assemble url\n");
+		return -1;
+	}
+
+	curl_easy_setopt(curl, CURLOPT_URL, url);
+	curl_easy_setopt(curl, CURLOPT_WRITEDATA, fp_json);
+	curl_easy_setopt(curl, CURLOPT_HEADERDATA, fp_dbg);
+	curl_easy_setopt(curl, CURLOPT_SSLCERTTYPE, "PEM");
+	curl_easy_setopt(curl, CURLOPT_SSLCERT, file_cert);
+	curl_easy_setopt(curl, CURLOPT_SSLKEYTYPE, "PEM");
+	curl_easy_setopt(curl, CURLOPT_SSLKEY, file_key);
+	curl_easy_setopt(curl, CURLOPT_SSL_VERIFYPEER, 1L);
+
+	res = curl_easy_perform(curl);
+	if (res != CURLE_OK)
+		ULOG_ERR("curl_easy_perform() failed: %s\n", curl_easy_strerror(res));
+	else
+		ULOG_INFO("downloaded first contact data\n");
+	curl_easy_cleanup(curl);
+	curl_global_cleanup();
+
+	ulog_close();
+
+	return (res != CURLE_OK);
+}

feeds/ucentral/ucentral-tools/src/ip-collide.c

@@ -0,0 +1,86 @@
+#include <arpa/inet.h>
+#include <net/if.h>
+
+#include <libubox/list.h>
+#include <libubox/ulog.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+struct route {
+	struct list_head list;
+	char devname[64];
+	uint32_t domain;
+	uint32_t mask;
+};
+
+static struct list_head routes = LIST_HEAD_INIT(routes);
+
+static int parse_routes(void)
+{
+	FILE *fp = fopen("/proc/net/route", "r");
+	int flgs, ref, use, metric, mtu, win, ir;
+	struct route *route;
+	unsigned long g;
+	int r;
+
+	r = fscanf(fp, "%*[^\n]\n");
+	if (r < 0) {
+		fprintf(stderr, "failed to parse routes\n");
+		return -1;
+	}
+	while (1) {
+		route = malloc(sizeof(*route));
+		if (!route)
+			break;
+		memset(route, 0, sizeof(*route));
+		r = fscanf(fp, "%63s%x%lx%X%d%d%d%x%d%d%d\n",
+			route->devname, &route->domain, &g, &flgs, &ref, &use, &metric, &route->mask,
+			&mtu, &win, &ir);
+		if (r != 11 && (r < 0) && feof(fp))
+			break;
+		list_add(&route->list, &routes);
+		printf("1 %s %x %x\n", route->devname, ntohl(route->domain), ntohl(route->mask));
+	}
+
+	fclose(fp);
+
+	return 0;
+}
+
+static int find_collisions(void)
+{
+	struct route *route;
+
+	list_for_each_entry(route, &routes, list) {
+		struct route *compare;
+
+		if (!route->domain || !route->mask)
+			continue;
+		list_for_each_entry(compare, &routes, list) {
+			if (!compare->domain || !compare->mask)
+				continue;
+			if (compare == route)
+				continue;
+			if (((route->domain & route->mask) == (compare->domain & route->mask)) ||
+			    ((route->domain & compare->mask) == (compare->domain & compare->mask))) {
+				ULOG_ERR("collision detected\n");
+				return 1;
+			}
+		}
+	}
+	ULOG_INFO("no collision detected\n");
+	return 0;
+}
+
+int main(int argc, char **argv)
+{
+	ulog_open(ULOG_SYSLOG | ULOG_STDIO, LOG_DAEMON, "ip-collide");
+
+	parse_routes();
+	if (!list_empty(&routes))
+		return find_collisions();
+
+	return 0;
+}

feeds/ucentral/ucentral-tools/src/radiusprobe.c

@@ -0,0 +1,47 @@
+#include <stdio.h>
+#include <string.h>
+#include <radcli/radcli.h>
+
+int
+main(int argc, char **argv)
+{
+	int result;
+	char username[128];
+	char passwd[AUTH_PASS_LEN + 1];
+	VALUE_PAIR *send, *received;
+	uint32_t service;
+	rc_handle *rh;
+
+	/* Not needed if you already used openlog() */
+	rc_openlog("radiusprobe");
+
+	if ((rh = rc_read_config("/tmp/radius.conf")) == NULL)
+		return ERROR_RC;
+
+	strcpy(username, "healthcheck");
+	strcpy(passwd, "uCentral");
+
+	send = NULL;
+
+	if (rc_avpair_add(rh, &send, PW_USER_NAME, username, -1, 0) == NULL)
+		return ERROR_RC;
+
+	if (rc_avpair_add(rh, &send, PW_USER_PASSWORD, passwd, -1, 0) == NULL)
+		return ERROR_RC;
+
+	service = PW_AUTHENTICATE_ONLY;
+	if (rc_avpair_add(rh, &send, PW_SERVICE_TYPE, &service, -1, 0) == NULL)
+		return ERROR_RC;
+
+	result = rc_auth(rh, 0, send, &received, NULL);
+
+	if (result == OK_RC || result == REJECT_RC) {
+		fprintf(stderr, "RADIUS server OK\n");
+		result = 0;
+	} else {
+		fprintf(stderr, "RADIUS server failure\n");
+		result = -1;
+	}
+
+	return result;
+}

feeds/ucentral/udevmand/Makefile

@@ -2,17 +2,9 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=udevmand
 PKG_RELEASE:=1
-
-PKG_SOURCE_PROTO:=git
-PKG_SOURCE_URL=https://github.com/blogic/udevmand.git
-PKG_MIRROR_HASH:=6f6a5536656a64e1f38f03747ef06ab03b28ef797adc72a901eb7dbc6e45e496
-PKG_SOURCE_DATE:=20250704
-PKG_SOURCE_VERSION:=e56be31d7c341467cc26714dac5c6b450a612808
 CMAKE_INSTALL:=1
-
 PKG_LICENSE:=LGPL-2.1
 PKG_LICENSE_FILES:=
-
 PKG_MAINTAINER:=John Crispin <john@phrozen.org>
 
 include $(INCLUDE_DIR)/package.mk

feeds/ucentral/udevmand/src/CMakeLists.txt

@@ -0,0 +1,15 @@
+cmake_minimum_required(VERSION 2.6)
+
+include_directories(/usr/local/include/libnl-tiny)
+
+PROJECT(udevmand C)
+INCLUDE(GNUInstallDirs)
+ADD_DEFINITIONS(-Os -ggdb -Wall -Werror --std=gnu99 -Wmissing-declarations)
+
+SET(LIBS ubox ubus json-c blobmsg_json uci nl-tiny)
+
+ADD_EXECUTABLE(udevmand main.c mac.c neigh.c ubus.c blob.c netlink.c bridge.c dhcp.c netifd.c ethers.c netdev.c)
+TARGET_LINK_LIBRARIES(udevmand ${LIBS})
+INSTALL(TARGETS udevmand
+	RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
+)

feeds/ucentral/udevmand/src/COPYING

@@ -0,0 +1,502 @@
+                  GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+ 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+                            Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+Licenses are intended to guarantee your freedom to share and change
+free software--to make sure the software is free for all its users.
+
+  This license, the Lesser General Public License, applies to some
+specially designated software packages--typically libraries--of the
+Free Software Foundation and other authors who decide to use it.  You
+can use it too, but we suggest you first think carefully about whether
+this license or the ordinary General Public License is the better
+strategy to use in any particular case, based on the explanations below.
+
+  When we speak of free software, we are referring to freedom of use,
+not price.  Our General Public Licenses are designed to make sure that
+you have the freedom to distribute copies of free software (and charge
+for this service if you wish); that you receive source code or can get
+it if you want it; that you can change the software and use pieces of
+it in new free programs; and that you are informed that you can do
+these things.
+
+  To protect your rights, we need to make restrictions that forbid
+distributors to deny you these rights or to ask you to surrender these
+rights.  These restrictions translate to certain responsibilities for
+you if you distribute copies of the library or if you modify it.
+
+  For example, if you distribute copies of the library, whether gratis
+or for a fee, you must give the recipients all the rights that we gave
+you.  You must make sure that they, too, receive or can get the source
+code.  If you link other code with the library, you must provide
+complete object files to the recipients, so that they can relink them
+with the library after making changes to the library and recompiling
+it.  And you must show them these terms so they know their rights.
+
+  We protect your rights with a two-step method: (1) we copyright the
+library, and (2) we offer you this license, which gives you legal
+permission to copy, distribute and/or modify the library.
+
+  To protect each distributor, we want to make it very clear that
+there is no warranty for the free library.  Also, if the library is
+modified by someone else and passed on, the recipients should know
+that what they have is not the original version, so that the original
+author's reputation will not be affected by problems that might be
+introduced by others.
+
+  Finally, software patents pose a constant threat to the existence of
+any free program.  We wish to make sure that a company cannot
+effectively restrict the users of a free program by obtaining a
+restrictive license from a patent holder.  Therefore, we insist that
+any patent license obtained for a version of the library must be
+consistent with the full freedom of use specified in this license.
+
+  Most GNU software, including some libraries, is covered by the
+ordinary GNU General Public License.  This license, the GNU Lesser
+General Public License, applies to certain designated libraries, and
+is quite different from the ordinary General Public License.  We use
+this license for certain libraries in order to permit linking those
+libraries into non-free programs.
+
+  When a program is linked with a library, whether statically or using
+a shared library, the combination of the two is legally speaking a
+combined work, a derivative of the original library.  The ordinary
+General Public License therefore permits such linking only if the
+entire combination fits its criteria of freedom.  The Lesser General
+Public License permits more lax criteria for linking other code with
+the library.
+
+  We call this license the "Lesser" General Public License because it
+does Less to protect the user's freedom than the ordinary General
+Public License.  It also provides other free software developers Less
+of an advantage over competing non-free programs.  These disadvantages
+are the reason we use the ordinary General Public License for many
+libraries.  However, the Lesser license provides advantages in certain
+special circumstances.
+
+  For example, on rare occasions, there may be a special need to
+encourage the widest possible use of a certain library, so that it becomes
+a de-facto standard.  To achieve this, non-free programs must be
+allowed to use the library.  A more frequent case is that a free
+library does the same job as widely used non-free libraries.  In this
+case, there is little to gain by limiting the free library to free
+software only, so we use the Lesser General Public License.
+
+  In other cases, permission to use a particular library in non-free
+programs enables a greater number of people to use a large body of
+free software.  For example, permission to use the GNU C Library in
+non-free programs enables many more people to use the whole GNU
+operating system, as well as its variant, the GNU/Linux operating
+system.
+
+  Although the Lesser General Public License is Less protective of the
+users' freedom, it does ensure that the user of a program that is
+linked with the Library has the freedom and the wherewithal to run
+that program using a modified version of the Library.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.  Pay close attention to the difference between a
+"work based on the library" and a "work that uses the library".  The
+former contains code derived from the library, whereas the latter must
+be combined with the library in order to run.
+
+                  GNU LESSER GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License Agreement applies to any software library or other
+program which contains a notice placed by the copyright holder or
+other authorized party saying it may be distributed under the terms of
+this Lesser General Public License (also called "this License").
+Each licensee is addressed as "you".
+
+  A "library" means a collection of software functions and/or data
+prepared so as to be conveniently linked with application programs
+(which use some of those functions and data) to form executables.
+
+  The "Library", below, refers to any such software library or work
+which has been distributed under these terms.  A "work based on the
+Library" means either the Library or any derivative work under
+copyright law: that is to say, a work containing the Library or a
+portion of it, either verbatim or with modifications and/or translated
+straightforwardly into another language.  (Hereinafter, translation is
+included without limitation in the term "modification".)
+
+  "Source code" for a work means the preferred form of the work for
+making modifications to it.  For a library, complete source code means
+all the source code for all modules it contains, plus any associated
+interface definition files, plus the scripts used to control compilation
+and installation of the library.
+
+  Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running a program using the Library is not restricted, and output from
+such a program is covered only if its contents constitute a work based
+on the Library (independent of the use of the Library in a tool for
+writing it).  Whether that is true depends on what the Library does
+and what the program that uses the Library does.
+
+  1. You may copy and distribute verbatim copies of the Library's
+complete source code as you receive it, in any medium, provided that
+you conspicuously and appropriately publish on each copy an
+appropriate copyright notice and disclaimer of warranty; keep intact
+all the notices that refer to this License and to the absence of any
+warranty; and distribute a copy of this License along with the
+Library.
+
+  You may charge a fee for the physical act of transferring a copy,
+and you may at your option offer warranty protection in exchange for a
+fee.
+
+  2. You may modify your copy or copies of the Library or any portion
+of it, thus forming a work based on the Library, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) The modified work must itself be a software library.
+
+    b) You must cause the files modified to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    c) You must cause the whole of the work to be licensed at no
+    charge to all third parties under the terms of this License.
+
+    d) If a facility in the modified Library refers to a function or a
+    table of data to be supplied by an application program that uses
+    the facility, other than as an argument passed when the facility
+    is invoked, then you must make a good faith effort to ensure that,
+    in the event an application does not supply such function or
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+
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+
+That's all there is to it!

feeds/ucentral/udevmand/src/blob.c

@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2017 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "udevmand.h"
+
+struct blob_buf b = { 0 };
+
+static char *iftype_string[NUM_NL80211_IFTYPES] = {
+	[NL80211_IFTYPE_STATION] = "station",
+	[NL80211_IFTYPE_AP] = "ap",
+	[NL80211_IFTYPE_MONITOR] = "monitor",
+	[NL80211_IFTYPE_ADHOC] = "adhoc",
+};
+
+void blobmsg_add_iface(struct blob_buf *bbuf, char *name, int index)
+{
+	static char _ifname[IF_NAMESIZE];
+	char *ifname = if_indextoname(index, _ifname);
+
+	if (!ifname)
+		return;
+	blobmsg_add_string(&b, name, ifname);
+}
+
+void blobmsg_add_iftype(struct blob_buf *bbuf, const char *name, const uint32_t iftype)
+{
+	if (iftype_string[iftype])
+		blobmsg_add_string(&b, name, iftype_string[iftype]);
+	else
+		blobmsg_add_u32(&b, name, iftype);
+}
+
+void blobmsg_add_ipv4(struct blob_buf *bbuf, const char *name, const uint8_t* addr)
+{
+	char ip[16];
+
+	snprintf(ip, sizeof(ip), "%d.%d.%d.%d", addr[0], addr[1], addr[2], addr[3]);
+	blobmsg_add_string(&b, name, ip);
+}
+
+void blobmsg_add_ipv6(struct blob_buf *bbuf, const char *name, const uint8_t* _addr)
+{
+	const uint16_t* addr = (const uint16_t*) _addr;
+	char ip[40];
+
+	snprintf(ip, sizeof(ip), "%x:%x:%x:%x:%x:%x:%x:%x",
+		ntohs(addr[0]), ntohs(addr[1]), ntohs(addr[2]), ntohs(addr[3]),
+		ntohs(addr[4]), ntohs(addr[5]), ntohs(addr[6]), ntohs(addr[7]));
+	blobmsg_add_string(&b, name, ip);
+}
+
+void blobmsg_add_mac(struct blob_buf *bbuf, const char *name, const uint8_t* addr)
+{
+	char mac[18];
+
+	snprintf(mac, sizeof(mac), "%02x:%02x:%02x:%02x:%02x:%02x",
+		addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
+	blobmsg_add_string(&b, name, mac);
+}

feeds/ucentral/udevmand/src/bridge.c

@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2020 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "udevmand.h"
+
+#include <linux/if_bridge.h>
+
+#define BR_MAX_ENTRY	2048
+
+static struct uloop_timeout bridge_timer;
+static struct vlist_tree bridge_mac;
+static LIST_HEAD(bridge_if);
+
+struct bridge_if {
+	struct list_head list;
+
+	char name[IF_NAMESIZE];
+	unsigned int port_no;
+};
+
+static void
+bridge_read_mac(const char *bridge)
+{
+	FILE *fd;
+	int i, cnt;
+	struct __fdb_entry fe[BR_MAX_ENTRY];
+	char path[PATH_MAX];
+
+	snprintf(path, PATH_MAX, "/sys/class/net/%s/brforward", bridge);
+	fd = fopen(path, "r");
+	if (!fd)
+		return;
+
+	cnt = fread(fe, sizeof(struct __fdb_entry), BR_MAX_ENTRY, fd);
+	fclose(fd);
+
+	for (i = 0; i < cnt; i++) {
+		struct bridge_mac *b = malloc(sizeof(*b));
+		struct bridge_if *brif;
+
+		if (!b)
+			continue;
+		strncpy(b->bridge, bridge, IF_NAMESIZE);
+		strncpy(b->ifname, bridge, IF_NAMESIZE);
+		list_for_each_entry(brif, &bridge_if, list)
+			if (fe[i].port_no == brif->port_no)
+				strncpy(b->ifname, brif->name, IF_NAMESIZE);
+		memcpy(b->addr, fe[i].mac_addr, ETH_ALEN);
+		b->port_no = fe[i].port_no;
+		vlist_add(&bridge_mac, &b->vlist, (void *) b);
+	}
+}
+
+void
+bridge_dump_if(const char *bridge)
+{
+	char path[PATH_MAX];
+	void *c = NULL;
+	glob_t gl;
+	int i;
+
+	snprintf(path, PATH_MAX, "/sys/class/net/%s/brif/*", bridge);
+	if (glob(path, GLOB_MARK | GLOB_ONLYDIR | GLOB_NOSORT, NULL, &gl))
+		return;
+
+	for (i = 0; i < gl.gl_pathc; i++) {
+		if (!c)
+			c = blobmsg_open_array(&b, "bridge");
+
+		blobmsg_add_string(&b, NULL, basename(gl.gl_pathv[i]));
+	}
+	if (c)
+		blobmsg_close_array(&b, c);
+
+	globfree(&gl);
+}
+
+static void
+bridge_read_if(const char *bridge)
+{
+	struct bridge_if *brif;
+	char path[PATH_MAX];
+	glob_t gl;
+	int i;
+
+	snprintf(path, PATH_MAX, "/sys/class/net/%s/brif/*", bridge);
+	if (glob(path, GLOB_MARK | GLOB_ONLYDIR | GLOB_NOSORT, NULL, &gl))
+		return;
+
+	for (i = 0; i < gl.gl_pathc; i++) {
+		unsigned int port_no;
+		FILE *fd;
+		int ret;
+
+		snprintf(path, PATH_MAX, "/sys/class/net/%s/brif/%s/port_no", bridge, basename(gl.gl_pathv[i]));
+		fd = fopen(path, "r");
+		if (!fd)
+			continue;
+		ret = fscanf(fd, "0x%x", &port_no);
+		fclose(fd);
+		if (ret != 1)
+			continue;
+		brif = malloc(sizeof(*brif));
+		if (!brif)
+			goto out;
+		strcpy(brif->name, basename(gl.gl_pathv[i]));
+		brif->port_no = port_no;
+		list_add(&brif->list, &bridge_if);
+
+	}
+out:
+	globfree(&gl);
+}
+
+static void bridge_tout(struct uloop_timeout *t)
+{
+	struct bridge_if *brif, *tmp;
+	glob_t gl;
+
+	int i;
+
+	if (glob("/sys/class/net/*", GLOB_MARK | GLOB_ONLYDIR | GLOB_NOSORT, NULL, &gl))
+		goto out;
+
+	list_for_each_entry_safe(brif, tmp, &bridge_if, list) {
+		list_del(&brif->list);
+		free(brif);
+	}
+
+	for (i = 0; i < gl.gl_pathc; i++)
+		bridge_read_if(basename(gl.gl_pathv[i]));
+	vlist_update(&bridge_mac);
+	for (i = 0; i < gl.gl_pathc; i++)
+		bridge_read_mac(basename(gl.gl_pathv[i]));
+	vlist_flush(&bridge_mac);
+	globfree(&gl);
+
+out:
+	uloop_timeout_set(&bridge_timer, 1000);
+}
+
+static int bridge_cmp(const void *k1, const void *k2, void *ptr)
+{
+	const struct bridge_mac *b1 = (const struct bridge_mac *)k1;
+	const struct bridge_mac *b2 = (const struct bridge_mac *)k2;
+
+	return memcmp(b1->addr, b2->addr, ETH_ALEN);
+}
+
+static void bridge_update(struct vlist_tree *tree, struct vlist_node *node_new, struct vlist_node *node_old)
+{
+	struct bridge_mac *b1, *b2;
+
+	b1 = container_of(node_old, struct bridge_mac, vlist);
+	b2 = container_of(node_new, struct bridge_mac, vlist);
+
+	if (!!b1 != !!b2) {
+		struct bridge_mac *_b = b1 ? b1 : b2;
+
+		ULOG_INFO("%s fdb %s:%d "MAC_FMT"\n", b1 ? "del" : "new", _b->ifname, _b->port_no, MAC_VAR(_b->addr));
+	}
+
+	if (b1) {
+		list_del(&b1->mac);
+		free(b1);
+	}
+
+	if (b2) {
+		struct mac *mac = NULL;
+
+		mac = mac_find(b2->addr);
+		mac_update(mac, b2->bridge);
+		list_add(&b2->mac, &mac->bridge_mac);
+	}
+}
+
+void bridge_init(void)
+{
+	bridge_timer.cb = bridge_tout;
+	uloop_timeout_set(&bridge_timer, 1000);
+	vlist_init(&bridge_mac, bridge_cmp, bridge_update);
+}
+
+void bridge_flush(void)
+{
+	struct bridge_if *brif, *tmp;
+
+	vlist_flush_all(&bridge_mac);
+	list_for_each_entry_safe(brif, tmp, &bridge_if, list) {
+		list_del(&brif->list);
+		free(brif);
+	}
+}
+
+void
+bridge_mac_del(struct bridge_mac *b)
+{
+	list_del(&b->mac);
+	vlist_delete(&bridge_mac, &b->vlist);
+	free(b);
+}
+
+

feeds/ucentral/udevmand/src/dhcp.c

@@ -0,0 +1,161 @@
+#include "udevmand.h"
+
+enum {
+	DHCP_MAC,
+	DHCP_IP,
+	DHCP_NAME,
+	DHCP_IFACE,
+	__DHCP_MAX
+};
+
+static const struct blobmsg_policy dhcp_policy[__DHCP_MAX] = {
+	[DHCP_MAC] = { .name = "mac", .type = BLOBMSG_TYPE_STRING },
+	[DHCP_IP] = { .name = "ip", .type = BLOBMSG_TYPE_STRING },
+	[DHCP_NAME] = { .name = "name", .type = BLOBMSG_TYPE_STRING },
+	[DHCP_IFACE] = { .name = "interface", .type = BLOBMSG_TYPE_STRING },
+};
+
+static struct avl_tree dhcpv4_tree = AVL_TREE_INIT(dhcpv4_tree, avl_mac_cmp, false, NULL);
+
+static void
+dhcpv4_add(uint8_t *addr, uint8_t *ip, char *name, char *iface)
+{
+	struct dhcpv4 *dhcpv4;
+	struct mac *mac;
+
+	mac = mac_find(addr);
+
+	dhcpv4 = avl_find_element(&dhcpv4_tree, addr, dhcpv4, avl);
+	if (dhcpv4) {
+		list_del(&dhcpv4->mac);
+		avl_delete(&dhcpv4_tree, &dhcpv4->avl);
+		free(dhcpv4);
+	}
+
+	dhcpv4 = malloc(sizeof(*dhcpv4) + (name ? strlen(name) + 1 : 1));
+        if (!dhcpv4)
+                return;
+	if (iface)
+		strncpy(dhcpv4->iface, iface, sizeof(dhcpv4->iface));
+	else
+		*dhcpv4->iface = '\0';
+	if (name)
+		strcpy(dhcpv4->name, name);
+	else
+		*dhcpv4->name = '\0';
+	memcpy(dhcpv4->ip, ip, 4);
+	memcpy(dhcpv4->addr, addr, ETH_ALEN);
+	dhcpv4->avl.key = dhcpv4->addr;
+
+	avl_insert(&dhcpv4_tree, &dhcpv4->avl);
+	list_add(&dhcpv4->mac, &mac->dhcpv4);
+	mac_update(mac, dhcpv4->iface);
+	ULOG_INFO("new dhcpv4 " MAC_FMT "/" IP_FMT " for %s\n",
+		  MAC_VAR(dhcpv4->addr), IP_VAR(ip),
+		  strlen(dhcpv4->name) ? dhcpv4->name : "<unknown>");
+}
+
+void
+dhcpv4_ack(struct blob_attr *msg)
+{
+	struct blob_attr *tb[__DHCP_MAX];
+	uint8_t addr[ETH_ALEN], ip[4];
+	char *name = NULL;
+	int ret;
+
+	blobmsg_parse(dhcp_policy, __DHCP_MAX, tb, blob_data(msg), blob_len(msg));
+
+	if (!tb[DHCP_MAC] || !tb[DHCP_IP] || !tb[DHCP_IFACE])
+		return;
+
+	ret = sscanf(blobmsg_get_string(tb[DHCP_MAC]), "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+		     &addr[0], &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]);
+	if (ret != 6)
+		return;
+
+	ret = sscanf(blobmsg_get_string(tb[DHCP_IP]), "%hhu.%hhu.%hhu.%hhu",
+		     &ip[0], &ip[1], &ip[2], &ip[3]);
+	if (ret != 4)
+		return;
+
+	if (tb[DHCP_NAME])
+		name = blobmsg_get_string(tb[DHCP_NAME]);
+
+	dhcpv4_add(addr, ip, name, blobmsg_get_string(tb[DHCP_IFACE]));
+}
+
+void
+dhcpv4_release(struct blob_attr *msg)
+{
+	struct blob_attr *tb[__DHCP_MAX];
+	struct dhcpv4 *dhcpv4;
+	uint8_t addr[ETH_ALEN];
+	int ret;
+
+	blobmsg_parse(dhcp_policy, __DHCP_MAX, tb, blob_data(msg), blob_len(msg));
+
+	if (!tb[DHCP_MAC])
+		return;
+
+	ret = sscanf(blobmsg_get_string(tb[DHCP_MAC]), "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+		     &addr[0], &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]);
+	if (ret != 6)
+		return;
+
+	dhcpv4 = avl_find_element(&dhcpv4_tree, addr, dhcpv4, avl);
+	if (!dhcpv4)
+		return;
+	ULOG_INFO("del dhcpv4 " MAC_FMT "\n", MAC_VAR(dhcpv4->addr));
+	list_del(&dhcpv4->mac);
+	avl_delete(&dhcpv4_tree, &dhcpv4->avl);
+	free(dhcpv4);
+}
+
+void
+dhcpv4_del(struct dhcpv4 *dhcpv4)
+{
+	list_del(&dhcpv4->mac);
+	avl_delete(&dhcpv4_tree, &dhcpv4->avl);
+	free(dhcpv4);
+}
+
+void
+dhcp_init(void)
+{
+	FILE *fp = fopen("/tmp/dhcp.leases", "r");
+	char line[1024];
+
+	if (!fp)
+		return;
+
+	while (fgets(line, sizeof(line), fp)) {
+		uint8_t addr[ETH_ALEN], ip[4];
+		char hostname[256 + 1];
+		long int timestamp;
+		int ret;
+
+		ret = sscanf(line, "%ld %02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx %hhu.%hhu.%hhu.%hhu %s",
+			     &timestamp,
+			     &addr[0], &addr[1], &addr[2], &addr[3], &addr[4], &addr[5],
+			     &ip[0], &ip[1], &ip[2], &ip[3],
+			     hostname);
+		if (ret != 12)
+			continue;
+
+		dhcpv4_add(addr, ip, hostname, NULL);
+	}
+
+	fclose(fp);
+}
+
+void
+dhcp_done(void)
+{
+	struct dhcpv4 *d, *t;
+
+	avl_for_each_element_safe(&dhcpv4_tree, d, avl, t) {
+		avl_delete(&dhcpv4_tree, &d->avl);
+		free(d);
+	}
+}
+

feeds/ucentral/udevmand/src/ethers.c

@@ -0,0 +1,36 @@
+#include "udevmand.h"
+
+void
+ethers_init(void)
+{
+	char buf[512], *p;
+	int ret;
+	FILE *f;
+
+	f = fopen("/etc/ethers", "r");
+
+	if (!f)
+		return;
+
+	while (fgets(buf, sizeof(buf), f)) {
+		uint8_t addr[ETH_ALEN];
+		struct mac *mac;
+
+		p = strtok(buf, " \t\n");
+		ret = sscanf(p, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+			     &addr[0], &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]);
+		if (ret != 6)
+			continue;
+
+		p = strtok(NULL, " \t\n");
+
+		if (!p)
+			continue;
+		mac = mac_find(addr);
+		mac->ethers = strdup(p);
+		ULOG_INFO("new ethers " MAC_FMT" %s\n", MAC_VAR(addr), p);
+	}
+
+	fclose(f);
+}
+

feeds/ucentral/udevmand/src/mac.c

@@ -0,0 +1,158 @@
+#include "udevmand.h"
+
+int
+avl_mac_cmp(const void *k1, const void *k2, void *ptr)
+{
+	return memcmp(k1, k2, ETH_ALEN);
+}
+
+struct avl_tree mac_tree = AVL_TREE_INIT(mac_tree, avl_mac_cmp, false, NULL);
+
+struct mac*
+mac_find(uint8_t *addr)
+{
+	struct mac *mac;
+	uint8_t *addr_buf;
+
+	mac = avl_find_element(&mac_tree, addr, mac, avl);
+
+	if (mac)
+		return mac;
+
+	mac = calloc_a(sizeof(struct mac), &addr_buf, 6);
+	if (!mac)
+		return NULL;
+	mac->addr = memcpy(addr_buf, addr, ETH_ALEN);
+	mac->avl.key = mac->addr;
+	mac->ethers = NULL;
+	*mac->interface = '\0';
+	INIT_LIST_HEAD(&mac->neigh4);
+	INIT_LIST_HEAD(&mac->neigh6);
+	INIT_LIST_HEAD(&mac->dhcpv4);
+	INIT_LIST_HEAD(&mac->bridge_mac);
+
+	avl_insert(&mac_tree, &mac->avl);
+	ULOG_INFO("new mac "MAC_FMT"\n", MAC_VAR(mac->addr));
+
+	return mac;
+}
+
+void
+mac_update(struct mac *mac, char *iface)
+{
+	char *interface = interface_resolve(iface);
+
+	if (iface && *iface)
+		strncpy(mac->interface, interface, sizeof(mac->interface));
+
+	clock_gettime(CLOCK_MONOTONIC, &mac->ts);
+}
+
+void
+mac_dump(struct mac *mac, int interface)
+{
+	struct timespec ts;
+	time_t last_seen;
+	char buf[18];
+	void *c, *d;
+
+	neigh_enum();
+
+	clock_gettime(CLOCK_MONOTONIC, &ts);
+
+	last_seen = ts.tv_sec - mac->ts.tv_sec;
+	snprintf(buf, sizeof(buf), MAC_FMT, MAC_VAR(mac->addr));
+	c = blobmsg_open_table(&b, buf);
+	if (interface && *mac->interface)
+		blobmsg_add_string(&b, "interface", mac->interface);
+	if (mac->ethers)
+		blobmsg_add_string(&b, "ethers", mac->ethers);
+	if (last_seen < 5 * 60)
+		blobmsg_add_u32(&b, "last_seen", last_seen);
+	else
+		blobmsg_add_u8(&b, "offline", 1);
+	if (!list_empty(&mac->neigh4)) {
+		struct neigh *neigh;
+
+		d = blobmsg_open_array(&b, "ipv4");
+		list_for_each_entry(neigh, &mac->neigh4, list)
+			blobmsg_add_ipv4(&b, NULL, neigh->ip);
+		blobmsg_close_array(&b, d);
+	}
+
+	if (!list_empty(&mac->neigh6)) {
+		struct neigh *neigh;
+
+		d = blobmsg_open_array(&b, "ipv6");
+		list_for_each_entry(neigh, &mac->neigh6, list)
+			blobmsg_add_ipv6(&b, NULL, neigh->ip);
+		blobmsg_close_array(&b, d);
+	}
+
+	if (!list_empty(&mac->dhcpv4)) {
+		struct dhcpv4 *dhcpv4;
+
+		d = blobmsg_open_array(&b, "dhcpv4");
+		list_for_each_entry(dhcpv4, &mac->dhcpv4, mac) {
+			blobmsg_add_ipv4(&b, NULL, dhcpv4->ip);
+			if (strlen(dhcpv4->name) > 0)
+				blobmsg_add_string(&b, NULL, dhcpv4->name);
+			break;
+		}
+		blobmsg_close_array(&b, d);
+	}
+
+	if (!list_empty(&mac->bridge_mac)) {
+		struct bridge_mac *bridge_mac;
+
+		d = blobmsg_open_array(&b, "fdb");
+		list_for_each_entry(bridge_mac, &mac->bridge_mac, mac)
+			blobmsg_add_string(&b, NULL, bridge_mac->ifname);
+		blobmsg_close_array(&b, d);
+	}
+
+	blobmsg_close_array(&b, c);
+	neigh_flush();
+}
+
+static void
+mac_flush(struct mac *mac, struct timespec ts)
+{
+	time_t last_seen;
+
+	last_seen = ts.tv_sec - mac->ts.tv_sec;
+	if (last_seen <  60 * 60)
+		return;
+
+	if (!list_empty(&mac->dhcpv4)) {
+		struct dhcpv4 *dhcpv4, *t;
+
+		list_for_each_entry_safe(dhcpv4, t, &mac->dhcpv4, mac)
+			dhcpv4_del(dhcpv4);
+	}
+
+	if (!list_empty(&mac->bridge_mac)) {
+		struct bridge_mac *bridge_mac, *t;
+
+		list_for_each_entry_safe(bridge_mac, t, &mac->bridge_mac, mac)
+			bridge_mac_del(bridge_mac);
+	}
+}
+
+int
+mac_dump_all(void)
+{
+	struct mac *mac, *t;
+	struct timespec ts;
+
+	blob_buf_init(&b, 0);
+
+	avl_for_each_element(&mac_tree, mac, avl)
+		mac_dump(mac, 1);
+
+	clock_gettime(CLOCK_MONOTONIC, &ts);
+	avl_for_each_element_safe(&mac_tree, mac, avl, t)
+		mac_flush(mac, ts);
+
+	return 0;
+}

feeds/ucentral/udevmand/src/main.c

@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2020 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "udevmand.h"
+
+int main(int argc, char **argv)
+{
+	ulog_open(ULOG_STDIO, LOG_DAEMON, "udevmand");
+
+	uloop_init();
+	ubus_init();
+	ethers_init();
+	neigh_init();
+	bridge_init();
+	dhcp_init();
+	uloop_run();
+	uloop_done();
+	ubus_uninit();
+	bridge_flush();
+	blob_buf_free(&b);
+	neigh_done();
+	interface_done();
+	dhcp_done();
+	iface_done();
+
+	return 0;
+}

feeds/ucentral/udevmand/src/neigh.c

@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2020 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "udevmand.h"
+
+static struct nl_socket rtnl_sock;
+
+static int
+avl_ipv4_cmp(const void *k1, const void *k2, void *ptr)
+{
+	return memcmp(k1, k2, 4);
+}
+
+static int
+avl_ipv6_cmp(const void *k1, const void *k2, void *ptr)
+{
+	return memcmp(k1, k2, 16);
+}
+
+static struct avl_tree ip4_tree = AVL_TREE_INIT(ip4_tree, avl_ipv4_cmp, false, NULL);
+static struct avl_tree ip6_tree = AVL_TREE_INIT(ip6_tree, avl_ipv6_cmp, false, NULL);
+
+static void
+neigh_del(struct neigh *neigh)
+{
+	struct avl_tree *ip_tree = &ip4_tree;
+
+	if (neigh->ip_ver == 6)
+		ip_tree = &ip6_tree;
+
+	uloop_timeout_cancel(&neigh->ageing);
+	list_del(&neigh->list);
+	avl_delete(ip_tree, &neigh->avl);
+	free(neigh);
+}
+
+static void
+neigh_ageing_cb(struct uloop_timeout *t)
+{
+	struct neigh *neigh = container_of(t, struct neigh, ageing);
+
+	neigh_del(neigh);
+}
+
+static void
+neigh_handler(struct nlmsghdr *nh, int type)
+{
+	uint8_t *lladdr, *dummy[6] = { 0 };
+	uint8_t set[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+	uint8_t clear[6] = { };
+	uint8_t mcast[2] = { 0x33, 0x33 };
+	struct ndmsg *ndm = nlmsg_data(nh);
+	struct nlattr *nda[__NDA_MAX];
+	uint8_t *mac_buf, *ip_buf;
+	struct avl_tree *ip_tree;
+	struct neigh *neigh;
+	struct mac *mac;
+	int ip_len, ip_ver, refresh = 0;
+	void *dst;
+
+	nlmsg_parse(nh, sizeof(struct ndmsg), nda, NDA_MAX, NULL);
+	if (!nda[NDA_DST])
+		return;
+
+	dst = nla_data(nda[NDA_DST]);
+	lladdr = nda[NDA_LLADDR] ? nla_data(nda[NDA_LLADDR]) : dummy;
+	if (!memcmp(lladdr, set, 6) || !memcmp(lladdr, clear, 6) || !memcmp(lladdr, mcast, 2) || *lladdr == 0x1)
+		return;
+
+	mac = mac_find(lladdr);
+
+	switch (ndm->ndm_family) {
+	case AF_INET:
+		ip_len = ip_ver = 4;
+		ip_tree = &ip4_tree;
+		break;
+
+	case AF_INET6:
+		ip_len = 16;
+		ip_ver = 6;
+		ip_tree = &ip6_tree;
+		break;
+
+	default:
+		return;
+	}
+
+	neigh = avl_find_element(ip_tree, dst, neigh, avl);
+
+	if (neigh) {
+		if (!type)
+			ULOG_INFO("del ipv%d for "MAC_FMT" on %s\n", neigh->ip_ver,  MAC_VAR(lladdr), neigh->ifname);
+		refresh = 1;
+		neigh_del(neigh);
+	}
+
+	if (!type)
+		return;
+
+	neigh = calloc_a(sizeof(struct neigh),
+		&ip_buf, ip_len, &mac_buf, 6);
+	if (!neigh)
+		return;
+	neigh->ip = memcpy(ip_buf, dst, ip_len);
+	neigh->iface = ndm->ndm_ifindex;
+	neigh->avl.key = neigh->ip;
+	neigh->ip_ver = ip_ver;
+	neigh->ageing.cb = neigh_ageing_cb;
+	uloop_timeout_set(&neigh->ageing, 24 * 60 * 60 * 1000);
+	if_indextoname(neigh->iface, neigh->ifname);
+	if (neigh->ip_ver == 4)
+		list_add(&neigh->list, &mac->neigh4);
+	else
+		list_add(&neigh->list, &mac->neigh6);
+	avl_insert(ip_tree, &neigh->avl);
+	mac_update(mac, neigh->ifname);
+	if (!refresh)
+		ULOG_INFO("new ipv%d for "MAC_FMT" on %s\n", neigh->ip_ver,  MAC_VAR(lladdr), neigh->ifname);
+}
+
+static int
+neigh_netlink_cb(struct nl_msg *msg, void *arg)
+{
+
+	struct nlmsghdr *nh = nlmsg_hdr(msg);
+
+
+	switch (nh->nlmsg_type) {
+	case RTM_NEWNEIGH:
+		neigh_handler(nh, 1);
+		break;
+
+	case RTM_DELNEIGH:
+		neigh_handler(nh, 0);
+		break;
+
+	default:
+		break;
+	}
+	return NL_OK;
+}
+
+void
+neigh_enum(void)
+{
+	struct rtgenmsg msg = { .rtgen_family = AF_UNSPEC };
+
+	nl_send_simple(rtnl_sock.sock, RTM_GETNEIGH, NLM_F_DUMP, &msg, sizeof(msg));
+	nl_wait_for_ack(rtnl_sock.sock);
+}
+
+void
+neigh_flush(void)
+{
+	struct neigh *neigh, *tmp;
+
+	avl_for_each_element_safe(&ip4_tree, neigh, avl, tmp)
+		neigh_del(neigh);
+	avl_for_each_element_safe(&ip6_tree, neigh, avl, tmp)
+		neigh_del(neigh);
+}
+
+int
+neigh_init(void)
+{
+	ULOG_INFO("open neigh netlink socket\n");
+	if (!nl_status_socket(&rtnl_sock, NETLINK_ROUTE, neigh_netlink_cb, NULL)) {
+		ULOG_ERR("failed to open rtnl socket\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+void
+neigh_done(void)
+{
+	nl_socket_free(rtnl_sock.sock);
+}

feeds/ucentral/udevmand/src/netdev.c

@@ -0,0 +1,235 @@
+#include "udevmand.h"
+
+struct avl_tree iface_tree = AVL_TREE_INIT(iface_tree, avl_strcmp, false, NULL);
+
+struct iface_ip {
+	struct list_head list;
+	char ip[];
+};
+
+struct iface {
+	struct avl_node avl;
+	int alive;
+	char name[IF_NAMESIZE];
+	struct rtnl_link_stats stats;
+	struct rtnl_link_stats stats_old;
+	struct list_head ipv6, ipv4;
+	uint8_t addr[ETH_ALEN];
+};
+
+static struct iface*
+iface_find(char *name)
+{
+	struct iface *iface = avl_find_element(&iface_tree, name, iface, avl);
+
+	if (iface) {
+		iface->alive = 1;
+		return iface;
+	}
+	iface = malloc(sizeof(*iface));
+	if (!iface)
+		return NULL;
+	memset(iface, 0, sizeof(*iface));
+	iface->alive = 1;
+	iface->avl.key = strcpy(iface->name, name);
+	INIT_LIST_HEAD(&iface->ipv4);
+	INIT_LIST_HEAD(&iface->ipv6);
+	avl_insert(&iface_tree, &iface->avl);
+	return iface;
+}
+
+void
+iface_done(void)
+{
+	struct iface *i, *t;
+
+	avl_for_each_element_safe(&iface_tree, i, avl, t) {
+		avl_delete(&iface_tree, &i->avl);
+		free(i);
+	}
+}
+
+static void
+iface_get(void)
+{
+	int fd = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
+	struct ifaddrs *ifaddr, *ifa;
+	int n;
+
+	if (getifaddrs(&ifaddr) == -1) {
+		ULOG_ERR("failed to getifaddrs\n");
+		return;
+	}
+
+	for (ifa = ifaddr, n = 0; ifa != NULL; ifa = ifa->ifa_next, n++) {
+		char host[NI_MAXHOST];
+		struct iface *iface;
+		int family, s;
+
+		if (ifa->ifa_addr == NULL)
+			continue;
+
+		if ((ifa->ifa_flags & IFF_UP) == 0)
+			continue;
+
+		if (ifa->ifa_flags & IFF_LOOPBACK)
+			continue;
+
+		family = ifa->ifa_addr->sa_family;
+
+		iface = iface_find(ifa->ifa_name);
+		if (!iface)
+			continue;
+
+		if (family == AF_INET || family == AF_INET6) {
+			struct iface_ip *ip;
+
+			s = getnameinfo(ifa->ifa_addr,
+					(family == AF_INET) ? sizeof(struct sockaddr_in) :
+					sizeof(struct sockaddr_in6),
+					host, NI_MAXHOST,
+					NULL, 0, NI_NUMERICHOST);
+			if (s)
+				continue;
+			ip = malloc(sizeof(*ip) + strlen(host) + 1);
+			if (!ip)
+				continue;
+			strcpy(ip->ip, host);
+			if (family == AF_INET)
+				list_add(&ip->list, &iface->ipv4);
+			else
+				list_add(&ip->list, &iface->ipv6);
+		} else if (family == AF_PACKET && ifa->ifa_data != NULL) {
+			struct rtnl_link_stats *stats = ifa->ifa_data;
+			struct ifreq s;
+
+			memcpy(&iface->stats, stats, sizeof(*stats));
+			memset(iface->addr, 0, ETH_ALEN);
+			if (fd) {
+				strcpy(s.ifr_name, ifa->ifa_name);
+				if (!ioctl(fd, SIOCGIFHWADDR, &s))
+					memcpy(iface->addr, s.ifr_addr.sa_data, ETH_ALEN);
+			}
+		}
+	}
+
+	freeifaddrs(ifaddr);
+	if (fd)
+		close(fd);
+}
+
+static void
+iface_flush(void)
+{
+	struct iface *iface, *tmp;
+
+	avl_for_each_element_safe(&iface_tree, iface, avl, tmp) {
+		struct iface_ip *ip, *tmp;
+
+		list_for_each_entry_safe(ip, tmp, &iface->ipv4, list) {
+			list_del(&ip->list);
+			free(ip);
+		}
+
+		list_for_each_entry_safe(ip, tmp, &iface->ipv6, list) {
+			list_del(&ip->list);
+			free(ip);
+		}
+		if (!iface->alive) {
+			avl_delete(&iface_tree, &iface->avl);
+			free(iface);
+		} else {
+			iface->alive = 0;
+		}
+	}
+}
+
+static int get_counter_delta(__u32 new, __u32 old)
+{
+	uint32_t delta;
+
+	if (new < old)
+		delta = UINT32_MAX - old + new;
+	else
+		delta = new - old;
+
+
+	return delta > 0 ? delta : 0;
+}
+
+void
+iface_dump(int delta)
+{
+	struct iface *iface;
+
+	iface_get();
+
+	blob_buf_init(&b, 0);
+	avl_for_each_element(&iface_tree, iface, avl) {
+		struct iface_ip *ip;
+		void *c, *d;
+
+		if (!iface->alive)
+			continue;
+
+		c = blobmsg_open_table(&b, interface_resolve(iface->name));
+		blobmsg_add_mac(&b, "hwaddr", iface->addr);
+		if (!list_empty(&iface->ipv4)) {
+			d = blobmsg_open_array(&b, "ipv4");
+			list_for_each_entry(ip, &iface->ipv4, list)
+				blobmsg_add_string(&b, NULL, ip->ip);
+			blobmsg_close_array(&b, d);
+		}
+
+		if (!list_empty(&iface->ipv4)) {
+			d = blobmsg_open_array(&b, "ipv6");
+			list_for_each_entry(ip, &iface->ipv6, list)
+				blobmsg_add_string(&b, NULL, ip->ip);
+			blobmsg_close_array(&b, d);
+		}
+
+		d = blobmsg_open_table(&b, "counters");
+		blobmsg_add_u64(&b, "rx_packets", iface->stats.rx_packets);
+		blobmsg_add_u64(&b, "tx_packets", iface->stats.tx_packets);
+	        blobmsg_add_u64(&b, "rx_bytes", iface->stats.rx_bytes);
+	        blobmsg_add_u64(&b, "tx_bytes", iface->stats.tx_bytes);
+	        blobmsg_add_u64(&b, "rx_errors", iface->stats.rx_errors);
+	        blobmsg_add_u64(&b, "tx_errors", iface->stats.tx_errors);
+	        blobmsg_add_u64(&b, "rx_dropped", iface->stats.rx_dropped);
+	        blobmsg_add_u64(&b, "tx_dropped", iface->stats.tx_dropped);
+	        blobmsg_add_u64(&b, "multicast", iface->stats.multicast);
+	        blobmsg_add_u64(&b, "collisions", iface->stats.collisions);
+		blobmsg_close_table(&b, d);
+
+		if (delta) {
+			d = blobmsg_open_table(&b, "deltas");
+			blobmsg_add_u32(&b, "rx_packets",
+				get_counter_delta(iface->stats.rx_packets, iface->stats_old.rx_packets));
+			blobmsg_add_u32(&b, "tx_packets",
+				get_counter_delta(iface->stats.tx_packets, iface->stats_old.tx_packets));
+		        blobmsg_add_u32(&b, "rx_bytes",
+				get_counter_delta(iface->stats.rx_bytes, iface->stats_old.rx_bytes));
+		        blobmsg_add_u32(&b, "tx_bytes",
+				get_counter_delta(iface->stats.tx_bytes, iface->stats_old.tx_bytes));
+		        blobmsg_add_u32(&b, "rx_errors",
+				get_counter_delta(iface->stats.rx_errors, iface->stats_old.rx_errors));
+		        blobmsg_add_u32(&b, "tx_errors",
+				get_counter_delta(iface->stats.tx_errors, iface->stats_old.tx_errors));
+		        blobmsg_add_u32(&b, "rx_dropped",
+				get_counter_delta(iface->stats.rx_dropped, iface->stats_old.rx_dropped));
+		        blobmsg_add_u32(&b, "tx_dropped",
+				get_counter_delta(iface->stats.tx_dropped, iface->stats_old.tx_dropped));
+		        blobmsg_add_u32(&b, "multicast",
+				get_counter_delta(iface->stats.multicast, iface->stats_old.multicast));
+		        blobmsg_add_u32(&b, "collisions",
+				get_counter_delta(iface->stats.collisions, iface->stats_old.collisions));
+			blobmsg_close_table(&b, d);
+		}
+		memcpy(&iface->stats_old, &iface->stats, sizeof(iface->stats));
+
+		bridge_dump_if(iface->name);
+		blobmsg_close_table(&b, c);
+	}
+
+	iface_flush();
+}

feeds/ucentral/udevmand/src/netifd.c

@@ -0,0 +1,116 @@
+#include "udevmand.h"
+
+enum {
+	INTERFACE_DEVICE,
+	INTERFACE_IFACE,
+	__INTERFACE_MAX
+};
+
+static const struct blobmsg_policy interface_policy[__INTERFACE_MAX] = {
+	[INTERFACE_DEVICE] = { .name = "device", .type = BLOBMSG_TYPE_STRING },
+	[INTERFACE_IFACE] = { .name = "interface", .type = BLOBMSG_TYPE_STRING },
+};
+
+static struct avl_tree interface_tree = AVL_TREE_INIT(interface_tree, avl_strcmp, false, NULL);
+
+void
+interface_update(struct blob_attr *msg, int raw)
+{
+	struct blob_attr *tb[__INTERFACE_MAX];
+	struct interface *interface;
+	char *device, *iface, *device_buf, *iface_buf;
+
+	if (raw)
+		blobmsg_parse(interface_policy, __INTERFACE_MAX, tb, blob_data(msg), blob_len(msg));
+	else
+		blobmsg_parse(interface_policy, __INTERFACE_MAX, tb, blobmsg_data(msg), blobmsg_data_len(msg));
+
+	if (!tb[INTERFACE_DEVICE] || !tb[INTERFACE_IFACE])
+		return;
+
+	iface = blobmsg_get_string(tb[INTERFACE_IFACE]);
+	device = blobmsg_get_string(tb[INTERFACE_DEVICE]);
+
+	interface = avl_find_element(&interface_tree, iface, interface, avl);
+	if (interface) {
+		avl_delete(&interface_tree, &interface->avl);
+		free(interface);
+	}
+
+	interface = calloc_a(sizeof(struct neigh),
+			     &iface_buf, strlen(iface) + 1,
+			     &device_buf, strlen(device) + 1);
+        if (!interface)
+                return;
+	interface->iface = strcpy(iface_buf, iface);
+	interface->device = strcpy(device_buf, device);
+	interface->avl.key = interface->iface;
+
+	avl_insert(&interface_tree, &interface->avl);
+
+	ULOG_INFO("new interface %s:%s\n", iface, device);
+}
+
+void
+interface_down(struct blob_attr *msg)
+{
+	struct blob_attr *tb[__INTERFACE_MAX];
+	struct interface *interface;
+	char *iface;
+
+	blobmsg_parse(interface_policy, __INTERFACE_MAX, tb, blob_data(msg), blob_len(msg));
+
+	if (!tb[INTERFACE_IFACE])
+		return;
+
+	iface = blobmsg_get_string(tb[INTERFACE_IFACE]);
+
+	interface = avl_find_element(&interface_tree, iface, interface, avl);
+	if (!interface)
+		return;
+
+	ULOG_INFO("del interface %s\n", interface->iface);
+	avl_delete(&interface_tree, &interface->avl);
+	free(interface);
+}
+
+char*
+interface_resolve(char *ifname)
+{
+	struct interface *interface;
+
+	avl_for_each_element(&interface_tree, interface, avl)
+		if (!strcmp(interface->device, ifname))
+			return interface->iface;
+	return ifname;
+}
+
+int
+interface_dump(void)
+{
+	struct interface *interface;
+	struct mac *mac;
+
+	blob_buf_init(&b, 0);
+
+	avl_for_each_element(&interface_tree, interface, avl) {
+		void *c;
+
+		c = blobmsg_open_table(&b, interface->iface);
+		avl_for_each_element(&mac_tree, mac, avl)
+			if (!strcmp(interface->iface, mac->interface))
+				mac_dump(mac, 0);
+		blobmsg_close_table(&b, c);
+	}
+	return 0;
+}
+
+void
+interface_done(void)
+{
+	struct interface *i, *t;
+
+	avl_for_each_element_safe(&interface_tree, i, avl, t)
+		free(i);
+}
+

feeds/ucentral/udevmand/src/netlink.c

@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2017 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "udevmand.h"
+
+static void
+nl_handler_nl_status(struct uloop_fd *u, unsigned int statuss)
+{
+	struct nl_socket *ev = container_of(u, struct nl_socket, uloop);
+	int err;
+	socklen_t errlen = sizeof(err);
+
+	if (!u->error) {
+		nl_recvmsgs_default(ev->sock);
+		return;
+	}
+
+	if (getsockopt(u->fd, SOL_SOCKET, SO_ERROR, (void *)&err, &errlen))
+		goto abort;
+
+	switch(err) {
+	case ENOBUFS:
+		ev->bufsize *= 2;
+		if (nl_socket_set_buffer_size(ev->sock, ev->bufsize, 0))
+			goto abort;
+		break;
+
+	default:
+		goto abort;
+	}
+	u->error = false;
+	return;
+
+abort:
+	uloop_fd_delete(&ev->uloop);
+	return;
+}
+
+static struct nl_sock *
+nl_create_socket(int protocol, int groups)
+{
+	struct nl_sock *sock;
+
+	sock = nl_socket_alloc();
+	if (!sock)
+		return NULL;
+
+	if (groups)
+		nl_join_groups(sock, groups);
+
+	if (nl_connect(sock, protocol))
+		return NULL;
+
+	return sock;
+}
+
+static bool
+nl_raw_status_socket(struct nl_socket *ev, int protocol, int groups,
+		    uloop_fd_handler cb, int flags)
+{
+	ev->sock = nl_create_socket(protocol, groups);
+	if (!ev->sock)
+		return false;
+
+	ev->uloop.fd = nl_socket_get_fd(ev->sock);
+	ev->uloop.cb = cb;
+	if (uloop_fd_add(&ev->uloop, ULOOP_READ|flags))
+		return false;
+
+	return true;
+}
+
+bool
+nl_status_socket(struct nl_socket *ev, int protocol,
+		int (*cb)(struct nl_msg *msg, void *arg), void *priv)
+{
+	if (!nl_raw_status_socket(ev, protocol, 0, nl_handler_nl_status, ULOOP_ERROR_CB))
+		return false;
+
+	nl_socket_modify_cb(ev->sock, NL_CB_VALID, NL_CB_CUSTOM, cb, priv);
+	nl_socket_disable_seq_check(ev->sock);
+	ev->bufsize = 65535;
+	if (nl_socket_set_buffer_size(ev->sock, ev->bufsize, 0))
+		return false;
+
+	return true;
+}
+
+int genl_send_and_recv(struct nl_socket *ev, struct nl_msg * msg)
+{
+	int ret = nl_send_auto_complete(ev->sock, msg);
+
+	nlmsg_free(msg);
+	if (ret < 0)
+		return ret;
+
+	nl_recvmsgs_default(ev->sock);
+	nl_wait_for_ack(ev->sock);
+
+	return 0;
+}
+
+

feeds/ucentral/udevmand/src/ubus.c

@@ -0,0 +1,253 @@
+/*
+ * Copyright (C) 2020 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License version 2.1
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "udevmand.h"
+
+static struct ubus_auto_conn conn;
+static struct ubus_subscriber subscriber;
+
+enum {
+	EVENT_ID,
+	EVENT_PATH,
+	__EVENT_MAX
+};
+
+static const struct blobmsg_policy status_policy[__EVENT_MAX] = {
+	[EVENT_ID] = { .name = "id", .type = BLOBMSG_TYPE_INT32 },
+	[EVENT_PATH] = { .name = "path", .type = BLOBMSG_TYPE_STRING },
+};
+
+static const struct ubus_watch_list {
+	const char *path;
+	int wildcard;
+} ubus_watch_list[] = {
+	{
+		.path = "service",
+	}, {
+		.path = "dnsmasq",
+	}, {
+		.path = "network.interface",
+	}, {
+		.path = "network.status",
+	},
+};
+
+static int
+ubus_mac_cb(struct ubus_context *ctx, struct ubus_object *obj,
+	    struct ubus_request_data *req, const char *method,
+	    struct blob_attr *msg)
+{
+	if (!mac_dump_all())
+		ubus_send_reply(ctx, req, b.head);
+	return UBUS_STATUS_OK;
+}
+
+/*static int
+ubus_interface_cb(struct ubus_context *ctx, struct ubus_object *obj,
+		  struct ubus_request_data *req, const char *method,
+		  struct blob_attr *msg)
+{
+	if (!interface_dump())
+		ubus_send_reply(ctx, req, b.head);
+	return UBUS_STATUS_OK;
+}*/
+
+static int
+ubus_port_cb(struct ubus_context *ctx, struct ubus_object *obj,
+	     struct ubus_request_data *req, const char *method,
+	     struct blob_attr *msg)
+{
+	enum {
+		DUMP_DELTA,
+		__DUMP_MAX
+	};
+
+	static const struct blobmsg_policy dump_policy[__DUMP_MAX] = {
+		[DUMP_DELTA] = { .name = "delta", .type = BLOBMSG_TYPE_INT32 },
+	};
+
+	struct blob_attr *tb[__DUMP_MAX];
+	int delta = 0;
+
+	blobmsg_parse(dump_policy, __DUMP_MAX, tb, blob_data(msg), blob_len(msg));
+
+	if (tb[DUMP_DELTA])
+		delta = blobmsg_get_u32(tb[DUMP_DELTA]);
+
+	iface_dump(delta);
+	ubus_send_reply(ctx, req, b.head);
+
+	return UBUS_STATUS_OK;
+}
+
+static const struct ubus_method topology_methods[] = {
+	//UBUS_METHOD_NOARG("interface", ubus_interface_cb),
+        UBUS_METHOD_NOARG("mac", ubus_mac_cb),
+	UBUS_METHOD_NOARG("port", ubus_port_cb),
+};
+
+static struct ubus_object_type ubus_object_type =
+	UBUS_OBJECT_TYPE("topology", topology_methods);
+
+static struct ubus_object ubus_object = {
+	.name = "topology",
+	.type = &ubus_object_type,
+	.methods = topology_methods,
+	.n_methods = ARRAY_SIZE(topology_methods),
+};
+
+static int
+ubus_watch_match(const char *path)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(ubus_watch_list); i++) {
+		int len = strlen(ubus_watch_list[i].path);
+
+		if (ubus_watch_list[i].wildcard && strncmp(path, ubus_watch_list[i].path, len))
+			continue;
+		if (!ubus_watch_list[i].wildcard && strcmp(path, ubus_watch_list[i].path))
+			continue;
+		return 0;
+	}
+	return -1;
+}
+
+enum {
+	INTERFACE,
+	__INTERFACE_MAX,
+};
+
+static const struct blobmsg_policy interface_policy[__INTERFACE_MAX] = {
+	[INTERFACE] = { .name = "interface", .type = BLOBMSG_TYPE_ARRAY },
+};
+
+static void
+ubus_netifd_dump_cb(struct ubus_request *req,
+		    int type, struct blob_attr *msg)
+{
+	struct blob_attr *tb[__INTERFACE_MAX];
+	struct blob_attr *iter;
+	int rem;
+
+	blobmsg_parse(interface_policy, __INTERFACE_MAX, tb, blob_data(msg), blob_len(msg));
+	if (!tb[INTERFACE])
+		return;
+	blobmsg_for_each_attr(iter, tb[INTERFACE], rem)
+		interface_update(iter, 0);
+}
+
+static int
+ubus_notify_cb(struct ubus_context *ctx, struct ubus_object *obj,
+	       struct ubus_request_data *req, const char *method,
+	       struct blob_attr *msg)
+{
+	if (0) {
+		char *str;
+
+		str = blobmsg_format_json(msg, true);
+		ULOG_INFO("Received ubus notify '%s': %s\n", method, str);
+		free(str);
+	}
+
+	if (!strcmp(method, "dhcp.ack"))
+		dhcpv4_ack(msg);
+
+	else if (!strcmp(method, "dhcp.release"))
+		dhcpv4_release(msg);
+
+	else if (!strcmp(method, "interface.update"))
+		interface_update(msg, 1);
+
+	else if (!strcmp(method, "interface.down"))
+		interface_down(msg);
+
+	return 0;
+}
+
+static void
+ubus_event_handler_cb(struct ubus_context *ctx,  struct ubus_event_handler *ev,
+	      const char *type, struct blob_attr *msg)
+{
+	struct blob_attr *tb[__EVENT_MAX];
+	const char *path;
+	uint32_t id;
+
+	if (strcmp("ubus.object.add", type))
+		return;
+
+	if (0) {
+		char *str;
+
+		str = blobmsg_format_json(msg, true);
+		ULOG_INFO("Received ubus notify '%s': %s\n", type, str);
+		free(str);
+	}
+
+	blobmsg_parse(status_policy, __EVENT_MAX, tb, blob_data(msg), blob_len(msg));
+
+	if (!tb[EVENT_ID] || !tb[EVENT_PATH])
+		return;
+
+	path = blobmsg_get_string(tb[EVENT_PATH]);
+	id = blobmsg_get_u32(tb[EVENT_ID]);
+
+	if (!ubus_watch_match(path) && !ubus_subscribe(ctx, &subscriber, id))
+		ULOG_INFO("Subscribe to %s (%u)\n", path, id);
+}
+
+static struct ubus_event_handler ubus_event_handler = { .cb = ubus_event_handler_cb };
+
+static void
+receive_list_result(struct ubus_context *ctx, struct ubus_object_data *obj,
+		    void *priv)
+{
+	char *path = strdup(obj->path);
+
+	if (!ubus_watch_match(path) && !ubus_subscribe(ctx, &subscriber, obj->id))
+		ULOG_INFO("Subscribe to %s (%u)\n", path, obj->id);
+	free(path);
+}
+
+static void
+ubus_connect_handler(struct ubus_context *ctx)
+{
+	uint32_t netifd;
+
+	ubus_add_object(ctx, &ubus_object);
+
+	ubus_register_event_handler(ctx, &ubus_event_handler, "ubus.object.add");
+	ubus_register_event_handler(ctx, &ubus_event_handler, "ubus.object.remove");
+
+	subscriber.cb = ubus_notify_cb;
+	if (ubus_register_subscriber(ctx, &subscriber))
+		ULOG_ERR("failed to register ubus subscriber\n");
+
+	ubus_lookup(ctx, NULL, receive_list_result, NULL);
+
+	if (!ubus_lookup_id(ctx, "network.interface", &netifd))
+		ubus_invoke(ctx, netifd, "dump", NULL, ubus_netifd_dump_cb, NULL, 5000);
+}
+
+void
+ubus_init(void)
+{
+	conn.cb = ubus_connect_handler;
+	ubus_auto_connect(&conn);
+}
+
+void
+ubus_uninit(void)
+{
+	ubus_auto_shutdown(&conn);
+}

feeds/ucentral/udevmand/src/udevmand.h

@@ -0,0 +1,150 @@
+#define _GNU_SOURCE
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <glob.h>
+#include <time.h>
+#include <ifaddrs.h>
+
+#include <net/if.h>
+
+#include <sys/ioctl.h>
+#include <sys/types.h>
+
+#include <linux/if_ether.h>
+#include <linux/rtnetlink.h>
+#include <linux/nl80211.h>
+#include <linux/limits.h>
+#include <linux/sockios.h>
+#include <linux/ethtool.h>
+
+#include <netlink/msg.h>
+#include <netlink/attr.h>
+#include <netlink/socket.h>
+#include <netlink/genl/ctrl.h>
+#include <netlink/genl/genl.h>
+
+#include <libubox/avl.h>
+#include <libubox/avl-cmp.h>
+#include <libubox/uloop.h>
+#include <libubox/utils.h>
+#include <libubox/ulog.h>
+#include <libubox/blobmsg_json.h>
+#include <libubox/vlist.h>
+
+#include <libubus.h>
+
+#define MAC_FMT	"%02x:%02x:%02x:%02x:%02x:%02x"
+#define MAC_VAR(x) x[0], x[1], x[2], x[3], x[4], x[5]
+
+#define IP_FMT	"%d.%d.%d.%d"
+#define IP_VAR(x) x[0], x[1], x[2], x[3]
+
+struct nl_socket {
+	struct uloop_fd uloop;
+	struct nl_sock *sock;
+	int bufsize;
+};
+
+struct mac {
+	uint8_t *addr;
+	struct avl_node avl;
+	char interface[64];
+	char *ethers;
+
+	struct timespec ts;
+	struct list_head neigh4;
+	struct list_head neigh6;
+	struct list_head dhcpv4;
+	struct list_head bridge_mac;
+};
+
+struct neigh {
+	struct avl_node avl;
+	struct list_head list;
+
+	uint8_t *ip;
+	int ip_ver;
+	int iface;
+	char ifname[IF_NAMESIZE];
+
+	struct uloop_timeout ageing;
+};
+
+struct dhcpv4 {
+	struct avl_node avl;
+	struct list_head mac;
+
+	uint8_t addr[ETH_ALEN];
+	uint8_t ip[4];
+	char iface[IF_NAMESIZE];
+	char name[];
+};
+
+struct interface {
+	struct avl_node avl;
+
+	char *iface;
+	char *device;
+};
+
+struct bridge_mac {
+	struct vlist_node vlist;
+	struct list_head mac;
+
+	char bridge[IF_NAMESIZE];
+	char ifname[IF_NAMESIZE];
+	uint8_t addr[ETH_ALEN];
+	__u8 port_no;
+};
+
+int avl_mac_cmp(const void *k1, const void *k2, void *ptr);
+
+extern struct avl_tree mac_tree;
+int mac_dump_all(void);
+void mac_dump(struct mac *mac, int interface);
+struct mac* mac_find(uint8_t *addr);
+void mac_update(struct mac *mac, char *iface);
+
+int neigh_init(void);
+void neigh_enum(void);
+void neigh_flush(void);
+void neigh_done(void);
+
+bool nl_status_socket(struct nl_socket *ev, int protocol,
+		     int (*cb)(struct nl_msg *msg, void *arg), void *priv);
+int genl_send_and_recv(struct nl_socket *ev, struct nl_msg * msg);
+
+extern struct blob_buf b;
+void blobmsg_add_iface(struct blob_buf *bbuf, char *name, int index);
+void blobmsg_add_iftype(struct blob_buf *bbuf, const char *name, const uint32_t iftype);
+void blobmsg_add_ipv4(struct blob_buf *bbuf, const char *name, const uint8_t* addr);
+void blobmsg_add_ipv6(struct blob_buf *bbuf, const char *name, const uint8_t* addr);
+void blobmsg_add_mac(struct blob_buf *bbuf, const char *name, const uint8_t* addr);
+
+void ubus_init(void);
+void ubus_uninit(void);
+
+void bridge_init(void);
+void bridge_dump_if(const char *bridge);
+void bridge_flush(void);
+void bridge_mac_del(struct bridge_mac *b);
+
+void dhcpv4_ack(struct blob_attr *msg);
+void dhcpv4_release(struct blob_attr *msg);
+void dhcp_init(void);
+void dhcp_done(void);
+void dhcpv4_del(struct dhcpv4 *dhcpv4);
+
+int interface_dump(void);
+void interface_update(struct blob_attr *msg, int raw);
+void interface_down(struct blob_attr *msg);
+char *interface_resolve(char *device);
+void interface_done(void);
+
+void ethers_init(void);
+
+void iface_done(void);
+void iface_dump(int delta);

feeds/ucentral/udhcpinject/Makefile

@@ -12,7 +12,7 @@ define Package/udhcpinject
 	SECTION:=net
 	CATEGORY:=Network
 	TITLE:=An agent to inject DHCP option
-	DEPENDS:=+libpcap +kmod-ifb +tc
+	DEPENDS:=+libpcap +kmod-ifb +tc +libuci
 	MAINTAINER:=kmk <alex18_huang@accton.com>
 endef
 
@@ -41,4 +41,4 @@ define Package/udhcpinject/install
 	$(CP) ./files/* $(1)/
 endef
 
-$(eval $(call BuildPackage,udhcpinject))
+$(eval $(call BuildPackage,udhcpinject))