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100 Commits

Author SHA1 Message Date
YenLin Pan
fd06233996 qca-wifi-7: zyxel_nwa130be - fine tune thermal setting
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
2025-07-15 16:21:12 +08:00
John Crispin
a73676abaf ucentral-event: prune dynamic vlans when they are no longer needed
Fixes: WIFI-14833
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-12 06:49:57 +02:00
John Crispin
867c7fe397 qca-wifi-7/iw/: nl80211.h was not in sync causing iw to incorrectly report NO_EHT
Fixes: WIFI-14569
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-11 13:29:21 +02:00
John Crispin
15d7fe5f2e ucentral-schema: update to latest HEAD
5276d0b use more explicit code when checking for the existence of a wiphy

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-11 13:07:20 +02:00
John Crispin
a607aac99a cloud_discovery: set production timeouts
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-11 11:08:42 +02:00
John Crispin
5c84212bfd ucentral-schema: update to latest HEAD
8238eb6 HaLow: add a switch to enable/disable radio
3bda216 fix EAP112-L ucentral not working

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-11 10:44:00 +02:00
John Crispin
84fc3d3bf1 qca-wifi-7/hostapd: increase socket buffer size
Fixes: WIFI-14742
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-11 10:40:16 +02:00
CarosLiang
9f93e24219 ath12k-firmware: update QCN92xx firmware
fixes 6G CBP fail on 20MHz BW

Fixes: WIFI-14817
Signed-off-by: CarosLiang <cliang@actiontec.com>
2025-07-11 07:41:28 +02:00
YenLin Pan
63766bb505 qca-wifi-7: zyxel_nwa130be - fine tune thermal setting
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
2025-07-11 06:59:36 +02:00
CarosLiang
bd918f55c4 qca-wifi-7: CIG WiFi 7 Product Save crash log into pstore
Fixes: WIFI-14631
Signed-off-by: CarosLiang <cliang@actiontec.com>
2025-07-11 06:56:08 +02:00
CarosLiang
03d158d32a profiles/: Enable mpstats and iperf3 On CIG WiFi 7 Products
Fixes: WIFI-14825
Signed-off-by: CarosLiang <cliang@actiontec.com>
2025-07-11 06:55:27 +02:00
Sebastian Huang
195e1734bf modemmanager: EAP112 LTE to reconnect automatically after reboot
1. Copy modemmanager to feeds/ucentral.
2. Add function to find the device sysfs path when protocol is "wwan".
3. Call ifup when modem is ready for connection.
4. Add trigger to restart modemmanager when network uci is updated.

Fixes: WIFI-14751
Signed-off-by: Sebastian Huang <sebastian_huang@accton.com>
2025-07-11 06:53:50 +02:00
YenLin Pan
f67a2c404b qca-wifi-7: change patches-zyxel_nwa130be path
The original path cannot be patched

Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
2025-07-09 06:42:18 +02:00
John Crispin
974351335f ucentral-schema: update to latest HEAD
f3d1356 add reenroll command

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 10:25:21 +02:00
Justin.Guo
311b1a620c cig-device-boot: update WF672A configuration
* Reduce the i2c frequency to enable the encryption chip to be recognized
* Add USB xr Serial driver and init gps uart param
* Factory reset when switching wifi mode
* SFP gpio should be input mode

Fixes: WIFI-14789
Signed-off-by: Justin.Guo <guoxijun@actiontec.com>
2025-07-08 09:47:15 +02:00
John Crispin
066b442247 ucentral-client: prevent client from starting before cloud was discovered
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:42:57 +02:00
John Crispin
f2b69ce972 est_client: fix reenroll call
the wrong certificate was being used

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:41:12 +02:00
John Crispin
88830b2537 ucentral-client: update to latest HEAD
69829f6 Revert "Cloud Package Manager"
c3a3e05 remove certupdate from proto.c
4c4710a add reenroll to proto.c

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:40:30 +02:00
John Crispin
842b21fb5e certificates: add an explicit uci commit call
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 09:40:06 +02:00
John Crispin
8f8eb63ac4 ubus: fix PKG_MIRROR_HASH
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-08 08:45:48 +02:00
Justin.Guo
367a919d67 qca-wifi-7: WF-189w/h add temperature control
1.Change the WiFi temperature threshold.
2.Use single antenna when temperature is too high.

Fixes: WIFI-14788
Signed-off-by: Justin.Guo <guoxijun@actiontec.com>
2025-07-08 08:14:39 +02:00
Jesse Wu
919fe12372 ipq807x: add EMPLUS WAP380C support
Fixes: WIFI-14791
Signed-off-by: Jesse Wu <Jesse.Wu@emplustech.com>
2025-07-08 08:13:39 +02:00
John Crispin
d6d22433c5 ucentral-schema: update to latest HEAD
50ba97e allow sta-authorized and ft-finish to wifi-frames enum

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-07 16:43:35 +02:00
John Crispin
eff579f3ec ucentral-schema: update to latest HEAD
e062b7c properly detect 320MHz channel width

Fixes: WIFI-14607
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-07 07:55:49 +02:00
John Crispin
0768008764 ucentral-schema: update to latest HEAD
2819f87 HaLow: fix channel 8/24/40 cannot be set
3b04c09 HaLow: set default channel to avoid HaLow not working when no channel set by JSON

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-07 07:53:19 +02:00
John Crispin
53c45dfaeb udevmand: update to latest HEAD
e56be31 udevmand: fix segmentation fault during iface flushing

Fixes: WIFI-14752
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-04 08:39:43 +02:00
John Crispin
7e3f851788 ucentral-schema: update to latest HEAD
2b8a58b dont crash if udevmand does not reply
985f3cb WIFI-14588: Cloud Package Manager

Fixes: WIFI-14752
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-04 08:39:26 +02:00
John Crispin
205484080e Revert "netifd: add gcmp-256 as a cipher suite when SAE is enabled on HE/EHT"
This reverts commit b17db16c15.

Signed-off-by: John Crispin <john@phrozen.org>
2025-07-03 16:46:02 +02:00
cpchangemplu
f1fc99ccbe ipq50xx: Add back emplus,wap385c
Signed-off-by: cpchangemplu <cp.chang@emplustech.com>
2025-07-03 14:26:46 +02:00
jackcybertan
db36e09553 ipq50xx : add sonicfi rap630e
Fixes: WIFI-14728
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>
2025-07-03 14:23:37 +02:00
John Crispin
b3174a0434 ubus: bump to latest HEAD
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-03 09:21:59 +02:00
John Crispin
5f8c4d31cc cloud_discovery: use the correct certificte for CDS
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
aa78f40843 certificates: add support for tar file based certificate storage
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
721fb4cc4d est_client: fixup typo
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
f75a36f89f est_client: prevent downgrades to FW not supporting EST
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
a375b9f774 est_client: add reenroll support
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
16d029f10f cloud_discovery: split EST code out into its own tool
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
bb45e09e8b cloud_discovery: place intermediate files into the /tmp folder
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
2798088cec cloud_discovery: rtrim() the extracted subject
this removes trailing \n\n characters

Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
470703a490 luci-mod-ucentral: update certupdate for insta birth certificates
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
c56d60b2d3 certificates: do not check for cas.pem when mounting certs
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
1178c3b6f1 certificates: set new certs inside UCI
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
0db44ca55b cloud_discovery: add insta EST support
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
ae5015424b cloud_discovery: add initial ubus status call
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
32c7a7ff1d cloud_discovery: add support for hostname_validation
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
39e601cbd4 luci-mod-ucentral: remove digicert specific files
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
ce9c896371 cloud_discovery: depend on the certificates package
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
0008cb20dd cloud_discovery: add option 138 support
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
701242ed25 netifd: drop dhcp option 138 patch
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
67dd4bfca7 cloud_discovery: remove pki2 env lookup
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
John Crispin
88fb4cafbc firstcontact: remove now unused digicert client
Fixes: WIFI-14694
Signed-off-by: John Crispin <john@phrozen.org>
2025-07-01 07:18:54 +02:00
Justin.Guo
feb410ddc3 cig-poe-judgment: add package
Support reading WAN PoE type from /proc/poe_info for WF189/WF189W/WF189H/WF672A

Fixes: WIFI-14697
Signed-off-by: Justin.Guo <guoxijun@actiontec.com>
2025-06-27 12:39:58 +02:00
jackcybertan
43a8dd1303 poe: add userland helpers scripts/tools
Support user to control PSE on/off (chip: tps23861) via ucentral config file.
Use uci-default to write poe's uci default file.

Fixes: WIFI-14724
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>
2025-06-27 12:38:19 +02:00
Ian Chen
188f6b33e0 netifd-morse: fix HaLow client cannot access network
add wds_bridge in hostapd for HaLow radio

Fixes: WIFI-14615
Signed-off-by: Ian Chen <ian77_chen@accton.com>
2025-06-27 12:37:20 +02:00
John Crispin
27e4eb3685 ucentral-client: update to latest HEAD
08a842d Cloud Package Manager

Fixes: WIFI-14588
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-27 09:41:44 +02:00
John Crispin
cd8294eca0 ucentral-schema: update to latest HEAD
125a148 add PoE support for client ports
17b6c18 Cloud Package Manager
a86b8b0 Fix typo in enhanced MPSK property name
57852ed update schema.json to 4.1.0
e155483 command: update upgrade and factory commands to handle new operational certs

Signed-off-by: John Crispin <john@phrozen.org>
2025-06-27 07:39:52 +02:00
Kumiko18
e12ecf831e cpm: Cloud Package Manager
Added cpm init.d file to list installed package on remote APs

Fixes: WIFI-14588
Signed-off-by: Kumiko18 <alex18_huang@accton.com>
2025-06-27 07:38:23 +02:00
Marek Kwaczynski
1213182012 mpskd: fix incorrect MPSK value assignment
If MPSK is enabled on any interface, `ssid.mpsk` should be true.
Prevents overwriting true with a false value when multiple interfaces
share the same SSID.

Also allow handling of the 'reload' event even when MPSK is not enabled,
to ensure config reloads are not skipped, e.g. when configuration is empty.

Fixes: WIFI-14484

Signed-off-by: Marek Kwaczynski <marek@shasta.cloud>
2025-06-27 07:37:20 +02:00
Sundareswar P
d5df71619a qca-wifi7: hostapd: Fix for roaming failure during PSK2-RADIUS configuration
After roaming to EAP105, the roaming frames were exchanged successfully,
but the STA sent a deauthentication frame to the AP with an "INVALID IE" error.

The RSNXE subfield in the FTIE was set in the Reassociation Response frame.
The STA validated the Reassociation frame and was unable to process the
RSNXE subfield.

Modified SAE options (sae_pwe=4 and sae_require_pmf=0).

Fixes: WIFI-14544
Signed-off-by: Marek Kwaczynski <marek@shasta.cloud>
2025-06-27 07:37:20 +02:00
John Crispin
a177884893 .github/workflows/build-dev.yml: add cig_wf660a
Fixes: WIFI-14630
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-26 11:38:08 +02:00
Jesse Wu
1f7d8a7bb7 ipq50xx: add EMPLUS WAP385C support
Signed-off-by: Jesse Wu <Jesse.Wu@emplustech.com>
2025-06-18 07:01:49 +02:00
jackcybertan
dc02d2722a ipq807x_v5.4: update BDF for SonicFi RAP650C
Fixes: WIFI-14574
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>
2025-06-18 06:58:41 +02:00
jackcybertan
13ac9166ef ipq807x_v5.4: change SonicFi RAP650C Wi-Fi MAC address sequence
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>
2025-06-18 06:58:41 +02:00
John Crispin
3d6f360cb6 ucentral-client: set version.json to 4.1.0
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-13 08:19:37 +02:00
John Crispin
6659e77bd0 qca-wifi-7/ipq53xx: consolidate phy_quirk handling
Fixes: WIFI-14680
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-13 08:19:37 +02:00
wingate5678
b061cc55ce ipq807x_v5.4: cooling daemon with configuration file support
Fixes: WIFI-14682
Signed-off-by: wingate5678 <wingate.chi@cybertan.com.tw>
2025-06-13 08:19:37 +02:00
John Crispin
b17db16c15 netifd: add gcmp-256 as a cipher suite when SAE is enabled on HE/EHT
Fixes: WIFI-14594
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-11 14:26:29 +02:00
John Crispin
d36866301f feeds/hostapd: fix/improve rssi_threshold handling
* add an ucentral-event
* turn thresholds into bss options

Fixes: WIFI-14679
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-11 09:18:09 +02:00
John Crispin
ffccb65d1b qca-wifi-7/hostapd: fix/improve rssi_threshold handling
* add an ucentral-event
* turn thresholds into bss options

Fixes: WIFI-14679
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-11 09:18:07 +02:00
John Crispin
af165342ed ipq807x_v5.4/hostapd: fix/improve rssi_threshold handling
* add an ucentral-event
* turn thresholds into bss options

Fixes: WIFI-14679
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-11 09:18:04 +02:00
John Crispin
ed62236d31 ucentral-schema: update to latest HEAD
ac3a1c7 convert rssi threshold to interface options

Fixes: WIFI-14679
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-11 09:17:55 +02:00
wingate5678
346bdd9c16 qca-wifi-7: sonicfi rap7110c-341x change BDF
Fixes: WIFI-14661
Signed-off-by: wingate5678 <wingate.chi@cybertan.com.tw>
2025-06-10 10:53:33 +02:00
Jesse Wu
dc41a0fd0c ipq60xx: Support EMPLUS WAP386V2 model
Device specifications:
======================

SoC: Qualcomm IPQ6018
RAM: 1 x 1G DDR4 RAM
Flash: NAND 128MB
Radio: 2T2R@2.4GHz, 2T2R@5GHz
Ethernet: 1 x 1GbE PHY
Reset Button: 1
Power Source: AC, Standard PoE 802.3af/at
LED Indicator: 4 x Single-color LED indicator (GPIO Control)

Signed-off-by: Jesse Wu <Jesse.Wu@emplustech.com>
2025-06-10 10:46:38 +02:00
cpchangemplu
2b26a4e68a mediatek: Add thermal protection for EMPLUS WAP588M model
Signed-off-by: cpchangemplu <cp.chang@emplustech.com>
2025-06-10 10:43:53 +02:00
cpchangemplu
fa96b2b24d mediatek: Fix image upgrade fail for EMPLUS WAP588M
Signed-off-by: cpchangemplu <cp.chang@emplustech.com>
2025-06-10 08:55:54 +02:00
John Crispin
36f00adc7a ucentral-schema: update to latest HEAD
827ccc2 setting probe_request_rssi incorrectly turned the SSID into a hidden one

Fixes: WIFI-14678
Signed-off-by: John Crispin <john@phrozen.org>
2025-06-10 08:52:16 +02:00
Tanya Singh
5314a752bd mediatek: Enable dualboot for EAP111 and EAP112 by default
Fixes: WIFI-14579
Signed-off-by: Tanya Singh <tanya_singh@accton.com>
2025-06-10 07:39:11 +02:00
Marek Kwaczynski
0f6683f31e iwinfo.uc: Fix access to undefined htmode object
iwinfo command failed due to undefined htmode object

Fixes: WIFI-14666
Signed-off-by: Marek Kwaczynski <marek@shasta.cloud>
2025-06-10 07:10:57 +02:00
Paul White
8ee96c36c9 ipq807x: fix silent reboot caused by broken printk
A printk() was previously introduced that is passing the log level as the first argument
instead of prefixing the format with the level.  Given this code path, this is causing a
kernel fault and CPU reboot without any kernel panic/stack trace, since it's crashing
inside of printk().

CPU:0 ts:206871944795 ffffffc008dcf828  ffffffc008dfe914  cleanup_module [batman_adv] <- cfg80211_vendor_cmd_reply+0x7ff4/0xa064 [cfg80211]
CPU:0 ts:206871944800 ffffffc0108e69d0  ffffffc008dcf80c  printk <- cleanup_module+0xb22c/0xa20 [batman_adv]
CPU:0 ts:206871944802 ffffffc0101173c0  ffffffc0108e6a08  vprintk_func <- printk+0x60/0x6c
CPU:0 ts:206871944806 ffffffc010115e44  ffffffc0101160ec  vprintk_emit <- vprintk_default+0x4c/0x60
CPU:0 ts:206871944809 ffffffc0101172d0  ffffffc010115e88  __printk_safe_enter <- vprintk_emit+0x84/0x29c
CPU:0 ts:206871944812 ffffffc010115c20  ffffffc010115ec4  vprintk_store <- vprintk_emit+0xc0/0x29c
CPU:0 ts:206871944816 ffffffc0100a53a4  ffffffc010080fb4  do_translation_fault <- do_mem_abort+0x54/0xb0
CPU:0 ts:206871944819 ffffffc0100a4eb4  ffffffc0100a5448  do_page_fault <- do_translation_fault+0xc8/0xe0
CPU:0 ts:206871944821 ffffffc0100a4d08  ffffffc0100a5038  __do_kernel_fault <- do_page_fault+0x1a8/0x4f0
CPU:0 ts:206871944837 ffffffc0100a4c88  ffffffc0100a4df0  die_kernel_fault <- __do_kernel_fault+0x110/0x1b0

After applying the fix, we can see this code path is being hit:
    [26799.175166] cfg80211_calculate_bitrate_he: invalid rate->nss: 0

This still doesn't fix the original issue triggering this code path, which is why a nss value
of 0 is being reported.

Fixes: eb9cbaec7 ("ipq807x: Shorten the kernel backtrace warning msg for ieee80211_bss_get_elem")
Fixes: WIFI-14677
Signed-off-by: Paul White <paul@shasta.cloud>
2025-06-10 06:53:50 +02:00
Arif Alam
89789900f5 ath11k: fix roaming firmware crash
Fix the case where firmware crashes when STA sends AUTH with same
MAC address to multiple SSIDs on the same radio.

Fixes: WIFI-13276
Signed-off-by: Arif Alam <arif.alam@netexperience.com>
2025-06-10 06:46:41 +02:00
Ken
6add44ae27 qca-wifi-7: fix invalid port mapping due to syntax error in 02_network
issue was introduced by edfd2883f5

Fixes: WIFI-14650
Signed-off-by: Ken <xshi@actiontec.com>
2025-05-30 07:24:33 +02:00
John Crispin
14a0c2d272 qca-wifi-7: add missing Kbuild symbols
Signed-off-by: John Crispin <john@phrozen.org>
2025-05-27 13:48:08 +02:00
John Crispin
9e769c85cb .github/workflows/: add more boards
Signed-off-by: John Crispin <john@phrozen.org>
2025-05-27 10:39:57 +02:00
mike_ding
d6e1008c7a Support dual image and fix reset button does not work issue
Signed-off-by: mike_ding <mike_ding@sdc.sercomm.com>
2025-05-27 10:39:57 +02:00
John Crispin
0a4c10d6cc ucentral-schema: update to latest HEAD
b4cfdc6 cmd_upgrade: implement secure download

Signed-off-by: John Crispin <john@phrozen.org>
2025-05-26 16:23:17 +02:00
jackcybertan
edfd2883f5 qca-wifi-7: Support for CyberTAN RAP750E-S AP
Signed-off-by: jackcybertan <jack.tsai@cybertan.com.tw>
2025-05-26 16:23:17 +02:00
Tanya Singh
f6ac6f791e mediatek: Fix typo in the name of the /etc/init.d/bootcount script
Fixes: WIFI-14579
Signed-off-by: Tanya Singh <tanya_singh@accton.com>
2025-05-26 16:23:17 +02:00
Tanya Singh
88fe15a985 mediatek: include patched hostapd for EAP112
Fixes: WIFI-14645
Signed-off-by: Tanya Singh <tanya_singh@accton.com>
2025-05-26 16:23:17 +02:00
Justin.Guo
a9f47c9e1e qca-wifi-7: CIG WiFi7 WF-672A bring up
* bring up wf672a
* add drivers lsm303agr rtl8221d ilps22qs
* add cig-wifi-mode-sw for switching radio to 2 bands or 3 bands

Fixes: WIFI-14509
Signed-off-by: Justin.Guo <guoxijun@actiontec.com>
2025-05-26 16:23:17 +02:00
Marek Kwaczynski
f17314a2d3 qca-wifi-7: hostapd: fix missing PSK assignment for EMPSK
When using psk2-radius in combination with enhanced MPSK,
the passphrase was not properly propagated to user scripts
via the ucode interface, because the PSK field was not set
in the connected station context.

This patch fixes that by copying the passphrase into the
psk field.

Signed-off-by: Marek Kwaczynski <marek@shasta.cloud>
2025-05-26 16:23:17 +02:00
Marek Kwaczynski
29739ebd13 qca-wifi-7: EAP-105: Derive WLAN MAC addresses from WAN MAC
For the Edgecore EAP-105 platform, configure the 2.4GHz, 5GHz,
and 6GHz WLAN interfaces to use MAC addresses derived
from the base WAN MAC address.

Fixes: WIFI-14624

Signed-off-by: Marek Kwaczynski <marek@shasta.cloud>
2025-05-26 16:23:17 +02:00
Sundareswar
3caba52dba EAP105: Roaming failed, if MPSK (AAA server) is configured (#515)
* While Roaming the AP couldn't find the wildcard R0KH and R1KH ids,
which are required by Fast transistion.
* Issue caused by the placement of conf parser in the invalid location.

Fixes: WIFI-14544

Signed-off-by: Marek Kwaczynski <marek@shasta.cloud>
2025-05-26 16:23:17 +02:00
Ken
44bcc50815 qcom-wifi-7: Default TC fq_codel queue on GRE cause low GRE RX throughput
Fixes: WIFI-14603
Signed-off-by: Ken <xshi@actiontec.com>
2025-05-26 16:23:17 +02:00
Ken
942d7c15b4 ipq807x: WF188n/WF196 lost the certificates files after upgrade
Fixes: WIFI-14623
Signed-off-by: Ken <xshi@actiontec.com>
2025-05-26 16:23:17 +02:00
John Crispin
25be7aef1a ucentral-schema: update to latest HEAD
b4635dc add 138 to default requested DHCP options

Signed-off-by: John Crispin <john@phrozen.org>
2025-05-26 16:23:17 +02:00
800246@emplustech.com
a2e1ffe089 mediatek: Swiitch LAN and WAN port for EMPLUS WAP588M
Signed-off-by: 800246@emplustech.com <cp.chang@emplustech.com>
2025-05-19 06:11:46 +02:00
polun
911f8eaa4c qca-wifi-7: Add Zyxel NWA130BE model
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
2025-05-19 06:11:20 +02:00
Tanya Singh
590ee6d514 mediatek: Update ethernet driver to support PHY AN8801 on Edgecore EAP111
Fixes: WIFI-14576
Signed-off-by: Tanya Singh <tanya_singh@accton.com>
2025-05-19 06:10:35 +02:00
Ken
5054a71062 qca-wifi-7: WF189 Save crash log into pstore
Fixes: WIFI-14582
Signed-off-by: Ken <xshi@actiontec.com>
2025-05-19 06:09:53 +02:00
John Crispin
d69c1c3176 ucentral-schema: update to latest HEAD
9710867 (HEAD -> main, origin/main, origin/HEAD) make the MTU configurable on GRE tunnels
4dd0904 SSH IdleTimeout can be configured from JSON config
6faaa1f HaLow: Extend ucentral schema & state for HaLow

Signed-off-by: John Crispin <john@phrozen.org>
2025-05-19 06:09:01 +02:00
186 changed files with 32186 additions and 18294 deletions

View File

@@ -21,7 +21,7 @@ jobs:
strategy:
fail-fast: false
matrix:
target: [ 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf189', 'cig_wf196', 'cig_wf196', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'sonicfi_rap630w-312g', 'sonicfi_rap63xc-211g', 'sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'sonicfi_rap650c', 'sonicfi_rap7110c-341x', 'sonicfi_rap750e-h', 'sonicfi_rap750w-311a', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'edgecore_oap103', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'senao_iap4300m', 'senao_iap2300m', 'senao_jeap6500', 'udaya_a6-id2', 'udaya_a6-od2', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655', 'emplus_wap588m' ]
target: [ 'cig_wf189h', 'cig_wf189w', 'cig_wf660a', 'cig_wf672', 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf189', 'cig_wf196', 'cig_wf196', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'sonicfi_rap630w-312g', 'sonicfi_rap63xc-211g', 'sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'sonicfi_rap650c', 'sonicfi_rap7110c-341x', 'sonicfi_rap750e-h', 'sonicfi_rap750e-s', 'sonicfi_rap750w-311a', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'edgecore_oap103', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'senao_iap4300m', 'senao_iap2300m', 'senao_jeap6500', 'udaya_a6-id2', 'udaya_a6-od2', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655', 'emplus_wap588m', 'zyxel_nwa130be', 'sercomm_ap72tip-v4' ]
steps:
- uses: actions/checkout@v3

View File

@@ -117,8 +117,6 @@ hostapd_common_add_device_config() {
config_add_boolean legacy_rates
config_add_int cell_density
config_add_int rts_threshold
config_add_int rssi_reject_assoc_rssi
config_add_int rssi_ignore_probe_request
config_add_int maxassoc
config_add_boolean maxassoc_ignore_probe
@@ -162,7 +160,7 @@ hostapd_prepare_device_config() {
json_get_vars country country3 country_ie beacon_int:100 dtim_period:2 doth require_mode legacy_rates \
acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc \
rts_threshold beacon_rate maxassoc \
multiple_bssid he_co_locate rnr_beacon ema acs_exclude_dfs \
maxassoc_ignore_probe band
@@ -261,8 +259,6 @@ hostapd_prepare_device_config() {
hostapd_add_rate brlist "$br"
done
[ -n "$rssi_reject_assoc_rssi" ] && append base_cfg "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
[ -n "$rssi_ignore_probe_request" ] && append base_cfg "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"
[ -n "$brlist" ] && append base_cfg "basic_rates=$brlist" "$N"
@@ -471,6 +467,9 @@ hostapd_common_add_bss_config() {
config_add_string uci_section
config_add_boolean dynamic_probe_resp
config_add_int rssi_reject_assoc_rssi
config_add_int rssi_ignore_probe_request
}
hostapd_set_vlan_file() {
@@ -724,7 +723,8 @@ hostapd_set_bss_options() {
airtime_bss_weight airtime_bss_limit airtime_sta_weight \
multicast_to_unicast_all proxy_arp per_sta_vif \
eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \
vendor_elements fils uci_section dynamic_probe_resp
vendor_elements fils uci_section dynamic_probe_resp \
rssi_reject_assoc_rssi rssi_ignore_probe_request
set_default fils 0
set_default isolate 0
@@ -778,6 +778,8 @@ hostapd_set_bss_options() {
append bss_conf "uapsd_advertisement_enabled=$uapsd" "$N"
append bss_conf "utf8_ssid=$utf8_ssid" "$N"
append bss_conf "multi_ap=$multi_ap" "$N"
[ -n "$rssi_reject_assoc_rssi" ] && append bss_conf "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
[ -n "$rssi_ignore_probe_request" ] && append bss_conf "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
[ -n "$vendor_elements" ] && append bss_conf "vendor_elements=$vendor_elements" "$N"
[ "$tdls_prohibit" -gt 0 ] && append bss_conf "tdls_prohibit=$tdls_prohibit" "$N"

View File

@@ -0,0 +1,14 @@
--- a/src/ap/beacon.c
+++ b/src/ap/beacon.c
@@ -934,8 +934,10 @@ void handle_probe_req(struct hostapd_dat
int ubus_response;
if (hapd->iconf->rssi_ignore_probe_request && ssi_signal &&
- ssi_signal < hapd->iconf->rssi_ignore_probe_request)
+ ssi_signal < hapd->iconf->rssi_ignore_probe_request) {
+ hostapd_ubus_notify_rssi(hapd, "rssi-ignore-probe", mgmt->sa, ssi_signal);
return;
+ }
if (len < IEEE80211_HDRLEN)
return;

View File

@@ -1944,6 +1944,21 @@ void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *
ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
}
void hostapd_ubus_notify_rssi(struct hostapd_data *hapd, const char *type, const u8 *addr, int rssi)
{
if (!hapd->ubus.obj.has_subscribers)
return;
if (!addr)
return;
blob_buf_init(&b, 0);
blobmsg_add_macaddr(&b, "address", addr);
blobmsg_add_u32(&b, "rssi", rssi);
ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
}
void hostapd_ubus_notify_csa(struct hostapd_data *hapd, int freq)
{
if (!hapd->ubus.obj.has_subscribers)

View File

@@ -56,6 +56,7 @@ void hostapd_ubus_notify_beacon_report(struct hostapd_data *hapd,
size_t len);
void hostapd_ubus_notify_radar_detected(struct hostapd_iface *iface, int frequency,
int chan_width, int cf1, int cf2);
void hostapd_ubus_notify_rssi(struct hostapd_data *hapd, const char *type, const u8 *addr, int rssi);
void hostapd_ubus_notify_bss_transition_response(
struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 status_code,

View File

@@ -41,6 +41,10 @@ ALLWIFIBOARDS:= \
edgecore-oap102 \
edgecore-oap103 \
edgecore-eap104 \
emplus-wap380c \
emplus-wap385c \
emplus-wap386v2 \
emplus-wap581 \
liteon-wpx8324 \
indio-um-310ax-v1 \
indio-um-510axp-v1 \
@@ -54,6 +58,7 @@ ALLWIFIBOARDS:= \
sonicfi-rap630w-311g \
sonicfi-rap630w-312g \
sonicfi-rap650c \
sonicfi-rap630e \
tplink-ex227 \
tplink-ex447 \
yuncore-ax840 \
@@ -404,6 +409,10 @@ $(eval $(call generate-ath11k-wifi-package,edgecore-eap102,Edgecore EAP102))
$(eval $(call generate-ath11k-wifi-package,edgecore-oap102,Edgecore OAP102))
$(eval $(call generate-ath11k-wifi-package,edgecore-oap103,Edgecore OAP103))
$(eval $(call generate-ath11k-wifi-package,edgecore-eap104,Edgecore EAP104))
$(eval $(call generate-ath11k-wifi-package,emplus-wap380c,Emplus WAP380C))
$(eval $(call generate-ath11k-wifi-package,emplus-wap385c,Emplus WAP385C))
$(eval $(call generate-ath11k-wifi-package,emplus-wap386v2,Emplus WAP386 V2))
$(eval $(call generate-ath11k-wifi-package,emplus-wap581,Emplus WAP581))
$(eval $(call generate-ath11k-wifi-package,liteon-wpx8324,Liteon WPX8324))
$(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
@@ -412,6 +421,7 @@ $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-312g,Sonicfi RAP630W 312G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap650c,SonicFi RAP650C))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630e,SonicFi RAP630E))
$(eval $(call generate-ath11k-wifi-package,tplink-ex227,TP-Link EX227))
$(eval $(call generate-ath11k-wifi-package,tplink-ex447,TP-Link EX447))
$(eval $(call generate-ath11k-wifi-package,yuncore-ax840,YunCore AX840))

View File

@@ -18,9 +18,11 @@ start() {
[ "$enabled" -gt 0 ] || return 1
case "$board" in
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g)
service_start /usr/sbin/cooling
sonicfi,rap630c-311g)
service_start /usr/sbin/cooling -c /etc/cooling/sonicfi-rap630c-311g-cooling.conf
;;
sonicfi,rap630w-311g)
service_start /usr/sbin/cooling -c /etc/cooling/sonicfi-rap630w-311g-cooling.conf
;;
esac

View File

@@ -28,143 +28,270 @@
#define CUR_STATE_PATH "/sys/devices/virtual/thermal/cooling_device%i/cur_state"
#define TEMPER_PATH "/sys/devices/virtual/thermal/thermal_zone%i/temp"
#define CPU_FREQ_PATH "/sys/devices/system/cpu/cpu0/cpufreq/%s"
#define PATH_MAX 256
#define BUF_MAX 8
#define THERSHOLD_MAX 20
#define BUF_MAX 32
#define PHY0 0
#define PHY1 1
#define NUM_VALUES 4
int load_config_file=0;
//#define ULOG_INFO(fmt, ...) ulog(LOG_INFO, fmt, ## __VA_ARGS__)
typedef unsigned char u8;
typedef unsigned long u32;
u8 w2g_threshold_level=0;
u8 w5g_threshold_level=0;
u8 w2g_cur_temper=0;
u8 w5g_cur_temper=0;
u32 level_cpu_freq=1008000;
/* default value of wifi thresholds*/
#ifdef PLATFORM_RAP630C_311G
u8 level_2g_lo[4]={0, 105, 110, 115};
u8 level_2g_hi[4]={105, 110, 115, 120};
u8 level_2g_limit[4]={0, 35, 50, 70};
u8 level_5g_lo[4]={0, 105, 110, 115};
u8 level_5g_hi[4]={105, 110, 115, 120};
u8 level_5g_limit[4]={0, 20, 30, 50};
u8 level_2g_high[4]={105, 110, 115, 120};
u8 level_2g_low[4]={0, 105, 110, 115};
u8 level_2g_mitigation[4]={0, 35, 50, 70};
u8 level_5g_high[4]={105, 110, 115, 120};
u8 level_5g_low[4]={0, 105, 110, 115};
u8 level_5g_mitigation[4]={0, 20, 30, 50};
u32 level_cpu_frequency[4]={1008000, 800000, 800000, 800000};
#endif
#ifdef PLATFORM_RAP630W_311G
u8 level_2g_lo[4]={0, 105, 110, 115};
u8 level_2g_hi[4]={105, 110, 115, 120};
u8 level_2g_limit[4]={0, 20, 50, 70};
u8 level_5g_lo[4]={0, 105, 110, 115};
u8 level_5g_hi[4]={105, 110, 115, 120};
u8 level_5g_limit[4]={0, 20, 50, 70};
u8 level_2g_high[4]={105, 110, 115, 120};
u8 level_2g_low[4]={0, 105, 110, 115};
u8 level_2g_mitigation[4]={0, 20, 50, 70};
u8 level_5g_high[4]={105, 110, 115, 120};
u8 level_5g_low[4]={0, 105, 110, 115};
u8 level_5g_mitigation[4]={0, 20, 50, 70};
u32 level_cpu_frequency[4]={1008000, 800000, 800000, 800000};
#endif
static char *config_file = NULL;
char temp[4][BUF_MAX];
#define ULOG_DBG(fmt, ...) ulog(LOG_DEBUG, fmt, ## __VA_ARGS__)
typedef struct {
int thresholds_high[NUM_VALUES];
int thresholds_low[NUM_VALUES];
int mitigation[NUM_VALUES];
int cpu_freq[NUM_VALUES];
} WifiConfig;
static void write_cur_state (char *filename, int state) {
WifiConfig wifi2g = {0}, wifi5g = {0};
static void set_cpu_freq (int freq) {
FILE * fp;
char filename[PATH_MAX];
snprintf(filename, PATH_MAX, CPU_FREQ_PATH, "scaling_governor");
fp = fopen(filename, "w");
if (!fp) {
ULOG_ERR("open scaling_governor error\n");
}
fprintf(fp, "%s", "userspace");
fclose(fp);
snprintf(filename, PATH_MAX, CPU_FREQ_PATH, "scaling_setspeed");
fp = fopen(filename, "w");
if (!fp) {
ULOG_ERR("open scaling_setspeed error\n");
}
fprintf(fp, "%d", freq);
fclose(fp);
}
void parse_line(const char* line, const char* key, int* array) {
char label[64];
int values[NUM_VALUES];
int i;
if (sscanf(line, "%s %d %d %d %d %d", label, &values[0], &values[1], &values[2], &values[3], &values[4]) == 5) {
for (i = 0; i < NUM_VALUES; ++i) {
array[i] = values[i];
}
}
}
int load_config() {
FILE * fp = fopen(config_file, "r");
if (!fp) {
ULOG_ERR("open config file error\n");
return 1;
}
WifiConfig* current_config = NULL;
char line[256];
while (fgets(line, sizeof(line), fp)) {
if (strstr(line, "[wifi2g]")) {
current_config = &wifi2g;
} else if (strstr(line, "[wifi5g]")) {
current_config = &wifi5g;
} else if (current_config) {
if (strstr(line, "thresholds_high")) {
parse_line(line, "thresholds_high", current_config->thresholds_high);
} else if (strstr(line, "thresholds_low")) {
parse_line(line, "thresholds_low", current_config->thresholds_low);
} else if (strstr(line, "mitigation")) {
parse_line(line, "mitigation", current_config->mitigation);
} else if (strstr(line, "CPU_freq")) {
parse_line(line, "CPU_freq", current_config->cpu_freq);
}
}
}
fclose(fp);
set_cpu_freq(wifi5g.cpu_freq[0]);
return 0;
}
int load_default_config(){
int i=0;
set_cpu_freq(1008000);
for (i = 0; i < NUM_VALUES; i++) {
wifi2g.thresholds_high[i]=level_2g_high[i];
wifi2g.thresholds_low[i]=level_2g_low[i];
wifi2g.mitigation[i]=level_2g_mitigation[i];
wifi2g.cpu_freq[i]=level_cpu_frequency[i];
wifi5g.thresholds_high[i]=level_5g_high[i];
wifi5g.thresholds_low[i]=level_5g_low[i];
wifi5g.mitigation[i]=level_5g_mitigation[i];
wifi5g.cpu_freq[i]=level_cpu_frequency[i];
}
return 0;
}
static void write_cur_state (const char *filename, int state) {
FILE * fp;
ULOG_DBG("write_cur_state filename=[%s] [%d]\n", filename, state);
fp = fopen(filename, "w");
if (!fp){
ULOG_ERR("some kind of error write cur_state\n");
ULOG_ERR("open %s file error\n",filename);
}
fprintf(fp, "%d", state);
fclose(fp);
}
static void read_cur_state (char *filename, char *buffer) {
FILE * fp;
int read_cur_state(const char *filename, char *buf, size_t buffer) {
FILE *fp;
fp = fopen(filename, "r");
if (!fp){
ULOG_ERR("some kind of error write cur_state\n");
if (!fp) {
ULOG_ERR("open %s file error\n",filename);
return -1;
}
if (0 == fread(buffer, sizeof(char), 3, fp)) {
ULOG_ERR("some kind of error read value\n");
if (!fgets(buf, buffer, fp)) {
ULOG_ERR("Failed to read %s file\n", filename);
fclose(fp);
return -1;
}
fclose(fp);
return 0;
}
static void wifi_get_temperature() {
char filename[PATH_MAX];
FILE * fp;
int i = 0;
char buffer[BUF_MAX];
int i = 0;
// ULOG_INFO("=================================\n");
/* read cpuinfo_cur_freq*/
snprintf(filename, PATH_MAX, CPU_FREQ_PATH, "cpuinfo_cur_freq");
memset(buffer, 0, BUF_MAX);
read_cur_state(filename, buffer, sizeof(buffer));
// ULOG_INFO("CPU current frequency: %s\n", buffer);
/* get current phy cooling state*/
for (i=0 ; i <= 1; i++ ) {
for (i=0; i <= 1; i++) {
memset(buffer, 0, BUF_MAX);
snprintf(filename, PATH_MAX, CUR_STATE_PATH, i);
read_cur_state(filename, buffer);
ULOG_DBG("read from Phy%i cur_state is %s\n", i, buffer);
read_cur_state(filename, buffer, sizeof(buffer));
// ULOG_INFO("Phy%i cur_state is: %s\n", i, buffer);
}
for (i=0 ; i <= 3; i++ ) {
for (i=0; i <= 3; i++) {
memset(buffer, 0, BUF_MAX);
snprintf(filename, PATH_MAX, TEMPER_PATH, i);
fp = fopen(filename, "r");
if (!fp) {
ULOG_ERR("some kind of error open value\n");
}
memset(temp[i], 0, BUF_MAX);
if (0 == fread(temp[i], sizeof(char), 3, fp)) {
ULOG_ERR("some kind of error read value\n");
}
fclose(fp);
ULOG_DBG("thermal_zone%i cur_temp is %s\n", i, temp[i]);
read_cur_state(filename, buffer, sizeof(buffer));
// ULOG_INFO("thermal_zone%i cur_temp is: %s\n", i, buffer);
if (i == 0)
w2g_cur_temper=atoi(buffer);
else if (i == 3)
w5g_cur_temper=atoi(buffer);
}
w2g_cur_temper=atoi(temp[0]);
w5g_cur_temper=atoi(temp[3]);
if (w5g_cur_temper >= 120)
{
ULOG_ERR("!! Temperature is over %d degree, system will reboot\n", w5g_cur_temper);
sync();
if ( -1 != system("reboot &") ){
printf("sysyem reboot...\n");
}
}
}
static void wifi_set_cooling() {
char filename[PATH_MAX];
int level;
for (level=0 ; level<=3 ; level++) {
if (w2g_cur_temper >= level_2g_lo[level] && w2g_cur_temper < level_2g_hi[level]) {
ULOG_DBG("2G at level %d , %d degree\n" ,level, w2g_cur_temper);
for (level = 0; level <= 3; level++) {
if (w2g_cur_temper >= wifi2g.thresholds_low[level] && w2g_cur_temper < wifi2g.thresholds_high[level]) {
// ULOG_INFO("2G at level %d , %d degree\n" ,level, w2g_cur_temper);
if (w2g_threshold_level != level) {
ULOG_DBG("setting 2G reduce %d percent\n" ,level_2g_limit[level]);
// ULOG_INFO("setting 2G reduce %d percent\n" ,wifi2g.mitigation[level]);
snprintf(filename, PATH_MAX, CUR_STATE_PATH, PHY0);
write_cur_state(filename, level_2g_limit[level]);
write_cur_state(filename, wifi2g.mitigation[level]);
w2g_threshold_level = level;
}
}
if (w5g_cur_temper >= level_5g_lo[level] && w5g_cur_temper < level_5g_hi[level]) {
ULOG_DBG("5G at level %d , %d degree\n" ,level, w5g_cur_temper);
if (w5g_cur_temper >= wifi5g.thresholds_low[level] && w5g_cur_temper < wifi5g.thresholds_high[level]) {
// ULOG_INFO("5G at level %d , %d degree\n" ,level, w5g_cur_temper);
if (w5g_threshold_level != level) {
ULOG_DBG("setting 5G reduce %d percent\n" ,level_5g_limit[level]);
// ULOG_INFO("setting 5G reduce %d percent\n" ,wifi5g.mitigation[level]);
snprintf(filename, PATH_MAX, CUR_STATE_PATH, PHY1);
write_cur_state(filename, level_5g_limit[level]);
write_cur_state(filename, wifi5g.mitigation[level]);
w5g_threshold_level = level;
set_cpu_freq(wifi5g.cpu_freq[level]);
}
}
}
}
static void cooling_init() {
char filename[256];
int i;
char filename[PATH_MAX];
int i,result=0;
for (i=0 ; i <= 1; i++) {
snprintf(filename, PATH_MAX, CUR_STATE_PATH, i);
write_cur_state(filename, 0);
}
if(load_config_file)
result = load_config();
if (result == 1 || load_config_file == 0)
load_default_config();
}
void print_usage(void)
{
printf("\nWifi-cooling daemon usage\n");
printf("Optional arguments:\n");
printf(" -c <file> config file\n");
printf(" -d debug output\n");
printf(" -c <file> setting with config file\n");
printf(" -d default setting\n");
printf(" -h this usage screen\n");
}
@@ -185,17 +312,18 @@ int main(int argc, char *argv[])
setpriority(PRIO_PROCESS, getpid(), -20);
ulog_open(ULOG_STDIO | ULOG_SYSLOG, LOG_DAEMON, "cooling");
ulog_threshold(LOG_INFO);
ulog_threshold(LOG_ERR);
// ulog_threshold(LOG_INFO);
while ((ch = getopt(argc, argv, "c:dh")) != -1) {
while ((ch = getopt(argc, argv, "c:dh")) != -1) {
switch (ch) {
case 'c':
printf("wifi-cooling load configuration file %s\n", optarg);
config_file = optarg;
load_config_file=1;
break;
case 'd':
printf("wifi-cooling ulog_threshold set to debug level\n");
ulog_threshold(LOG_DEBUG);
printf("wifi-cooling set to default value\n");
break;
case 'h':
default:
@@ -212,4 +340,4 @@ int main(int argc, char *argv[])
uloop_done();
return 0;
}
}

View File

@@ -1,15 +1,11 @@
sampling 5000
[wifi2g]
thresholds_high 105 110 115 120
thresholds_low 0 105 110 115
mitigation 0 35 50 70
CPU_freq 1008000 800000 800000 800000
[tsens_tz_sensor1]
sampling 5000
thresholds 105 110 115 119 120
thresholds_clr 0 100 105 110 115
actions cooling cooling cooling cooling shutdown
action_info 0 35 50 70 800000
[tsens_tz_sensor4]
sampling 5000
thresholds 105 110 115 119 120
thresholds_clr 0 100 105 110 115
actions cooling cooling cooling cooling shutdown
action_info 0 20 30 50 800000
[wifi5g]
thresholds_high 105 110 115 120
thresholds_low 0 105 110 115
mitigation 0 20 30 50
CPU_freq 1008000 800000 800000 800000

View File

@@ -1,15 +1,11 @@
sampling 5000
[wifi2g]
thresholds_high 105 110 115 120
thresholds_low 0 105 110 115
mitigation 0 20 50 70
CPU_freq 1008000 800000 800000 800000
[tsens_tz_sensor1]
sampling 5000
thresholds 105 115 119 125
thresholds_clr 0 105 110 120
actions cooling cooling cooling cooling
action_info 0 20 50 70
[tsens_tz_sensor4]
sampling 5000
thresholds 105 115 119 125
thresholds_clr 0 105 110 120
actions cooling cooling cooling cooling
action_info 0 20 50 70
[wifi5g]
thresholds_high 105 110 115 120
thresholds_low 0 105 110 115
mitigation 0 20 50 70
CPU_freq 1008000 800000 800000 800000

View File

@@ -117,8 +117,6 @@ hostapd_common_add_device_config() {
config_add_boolean legacy_rates
config_add_int cell_density
config_add_int rts_threshold
config_add_int rssi_reject_assoc_rssi
config_add_int rssi_ignore_probe_request
config_add_int maxassoc
config_add_boolean maxassoc_ignore_probe
@@ -162,7 +160,7 @@ hostapd_prepare_device_config() {
json_get_vars country country3 country_ie beacon_int:100 dtim_period:2 doth require_mode legacy_rates \
acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc \
rts_threshold beacon_rate maxassoc \
multiple_bssid he_co_locate rnr_beacon ema acs_exclude_dfs \
maxassoc_ignore_probe band
@@ -261,8 +259,6 @@ hostapd_prepare_device_config() {
hostapd_add_rate brlist "$br"
done
[ -n "$rssi_reject_assoc_rssi" ] && append base_cfg "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
[ -n "$rssi_ignore_probe_request" ] && append base_cfg "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"
[ -n "$brlist" ] && append base_cfg "basic_rates=$brlist" "$N"
@@ -472,6 +468,9 @@ hostapd_common_add_bss_config() {
config_add_string uci_section
config_add_boolean dynamic_probe_resp
config_add_int rssi_reject_assoc_rssi
config_add_int rssi_ignore_probe_request
}
hostapd_set_vlan_file() {
@@ -725,7 +724,8 @@ hostapd_set_bss_options() {
airtime_bss_weight airtime_bss_limit airtime_sta_weight \
multicast_to_unicast_all proxy_arp per_sta_vif \
eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \
vendor_elements fils uci_section dynamic_probe_resp multi_psk
vendor_elements fils uci_section dynamic_probe_resp multi_psk \
rssi_reject_assoc_rssi rssi_ignore_probe_request
set_default fils 0
set_default isolate 0
@@ -780,6 +780,8 @@ hostapd_set_bss_options() {
append bss_conf "uapsd_advertisement_enabled=$uapsd" "$N"
append bss_conf "utf8_ssid=$utf8_ssid" "$N"
append bss_conf "multi_ap=$multi_ap" "$N"
[ -n "$rssi_reject_assoc_rssi" ] && append bss_conf "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
[ -n "$rssi_ignore_probe_request" ] && append bss_conf "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
[ -n "$vendor_elements" ] && append bss_conf "vendor_elements=$vendor_elements" "$N"
[ "$tdls_prohibit" -gt 0 ] && append bss_conf "tdls_prohibit=$tdls_prohibit" "$N"

View File

@@ -144,7 +144,7 @@ function netifd_reload() {
push(ssid.interfaces, iface.ifname);
ssid.bands[band] = iface.ifname;
ssid.mpsk = config.multi_psk;
ssid.mpsk = ssid?.mpsk ? true : config.multi_psk;
for (let sta in iface.stations) {
let stacfg = sta.config;
@@ -308,18 +308,18 @@ function sta_auth_cache(ifname, addr, idx, phrase) {
function auth_cb(msg) {
let data = msg.data;
if (!is_ssid_mpsk(data.iface))
return;
printf(`Event ${msg.type}: ${msg.data}\n`);
switch (msg.type) {
case 'sta_auth':
if (!is_ssid_mpsk(data.iface))
return;
return {
psk: sta_auth_psk(data.iface, data.sta),
force_psk: true,
};
case 'sta_connected':
if (data.psk_idx == null)
if (data.psk_idx == null || !is_ssid_mpsk(data.iface))
return;
return sta_auth_cache(data.iface, data.sta, data.psk_idx, data.psk);
case 'reload':

View File

@@ -0,0 +1,14 @@
--- a/src/ap/beacon.c
+++ b/src/ap/beacon.c
@@ -934,8 +934,10 @@ void handle_probe_req(struct hostapd_dat
int ubus_response;
if (hapd->iconf->rssi_ignore_probe_request && ssi_signal &&
- ssi_signal < hapd->iconf->rssi_ignore_probe_request)
+ ssi_signal < hapd->iconf->rssi_ignore_probe_request) {
+ hostapd_ubus_notify_rssi(hapd, "rssi-ignore-probe", mgmt->sa, ssi_signal);
return;
+ }
if (len < IEEE80211_HDRLEN)
return;

View File

@@ -1944,6 +1944,21 @@ void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *
ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
}
void hostapd_ubus_notify_rssi(struct hostapd_data *hapd, const char *type, const u8 *addr, int rssi)
{
if (!hapd->ubus.obj.has_subscribers)
return;
if (!addr)
return;
blob_buf_init(&b, 0);
blobmsg_add_macaddr(&b, "address", addr);
blobmsg_add_u32(&b, "rssi", rssi);
ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
}
void hostapd_ubus_notify_csa(struct hostapd_data *hapd, int freq)
{
if (!hapd->ubus.obj.has_subscribers)

View File

@@ -56,6 +56,7 @@ void hostapd_ubus_notify_beacon_report(struct hostapd_data *hapd,
size_t len);
void hostapd_ubus_notify_radar_detected(struct hostapd_iface *iface, int frequency,
int chan_width, int cf1, int cf2);
void hostapd_ubus_notify_rssi(struct hostapd_data *hapd, const char *type, const u8 *addr, int rssi);
void hostapd_ubus_notify_bss_transition_response(
struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 status_code,

View File

@@ -33,6 +33,11 @@ sonicfi,rap630c-311g|\
sonicfi,rap630w-311g)
ucidef_set_led_default "power" "POWER" "pwm:blue" "on"
;;
sonicfi,rap630e)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy1tpt"
ucidef_set_led_default "power" "POWER" "green:power" "on"
;;
edgecore,oap101|\
edgecore,oap101-6e|\
edgecore,oap101e|\
@@ -40,6 +45,11 @@ edgecore,oap101e-6e)
ucidef_set_led_netdev "wan" "wan" "red:ethernet" "eth1"
ucidef_set_led_default "power" "POWER" "blue:management" "on"
;;
emplus,wap385c)
ucidef_set_led_default "ledr" "LEDR" "sys:red" "on"
ucidef_set_led_default "ledg" "LEDG" "sys:green" "on"
ucidef_set_led_default "ledb" "LEDB" "sys:blue" "on"
;;
hfcl,ion4x_w|\
hfcl,ion4xi_w)
ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wifi5" "phy0tpt"

View File

@@ -48,6 +48,7 @@ qcom_setup_interfaces()
ucidef_add_switch "switch1" \
"6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
emplus,wap385c|\
hfcl,ion4x_w|\
hfcl,ion4xi_w)
ucidef_set_interface_wan "eth0"
@@ -67,6 +68,12 @@ qcom_setup_interfaces()
glinet,b3000)
ucidef_add_switch "switch1" "6u@eth1" "1:wan" "2:lan" "3:lan"
;;
sonicfi,rap630e)
ucidef_set_interface_wan "eth1"
ucidef_set_interface_lan "eth0"
emplus,wap581)
ucidef_set_interface_wan "eth0 eth1"
;;
esac
}
@@ -103,6 +110,16 @@ qcom_setup_macs()
wan_mac=$(cat /sys/class/net/eth1/address)
lan_mac=$(macaddr_add "$wan_mac" 2)
;;
sonicfi,rap630e)
mac=$(fw_printenv -n BaseMacAddress)
[ -z "$mac" ] && return;
lan_mac=$(macaddr_canonicalize $mac)
wan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_network_device_mac eth1 $wan_mac
ucidef_set_network_device_mac eth0 $lan_mac
ip link set eth1 address $wan_mac
ip link set eth0 address $lan_mac
;;
*)
wan_mac=$(cat /sys/class/net/eth0/address)
lan_mac=$(macaddr_add "$wan_mac" 1)

View File

@@ -94,6 +94,15 @@ ath11k_generate_macs_gl_b3000() {
}
}
ath11k_generate_macs_rap630e() {
touch /lib/firmware/ath11k-macs
eth=$(cat /sys/class/net/eth0/address)
mac1=$(macaddr_add $eth 2)
mac2=$(macaddr_add $eth 3)
echo -ne \\x${mac1//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs
}
caldata_die() {
echo "caldata: " "$*"
exit 1
@@ -122,6 +131,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,eap104|\
@@ -129,6 +139,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
edgecore,oap101-6e|\
edgecore,oap101e|\
edgecore,oap101e-6e|\
emplus,wap385c|\
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
optimcloud,d60|\
@@ -139,6 +150,7 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
udaya,a6-od2|\
wallys,dr5018|\
yuncore,fap655|\
emplus,wap581|\
glinet,b3000)
caldata_extract "0:ART" 0x1000 0x20000
;;
@@ -151,16 +163,19 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,oap101|\
edgecore,oap101-6e|\
edgecore,oap101e|\
edgecore,oap101e-6e|\
emplus,wap385c|\
udaya,a6-id2|\
udaya,a6-od2|\
hfcl,ion4xi_w|\
wallys,dr5018|\
emplus,wap581|\
yuncore,fap655)
caldata_extract "0:ART" 0x26800 0x20000
;;
@@ -176,6 +191,7 @@ ath11k/qcn6122/hw1.0/caldata_2.bin)
;;
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
glinet,b3000)
@@ -211,6 +227,9 @@ ath11k-macs)
cybertan,eww631-b1)
ath11k_generate_macs_eww631_b1
;;
sonicfi,rap630e)
ath11k_generate_macs_rap630e
;;
edgecore,eap104|\
edgecore,oap101|\
edgecore,oap101-6e|\

View File

@@ -73,9 +73,11 @@ platform_check_image() {
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g|\
sonicfi,rap630e|\
cybertan,eww631-a1|\
cybertan,eww631-b1|\
edgecore,eap104|\
emplus,wap385c|\
wallys,dr5018|\
hfcl,ion4x_w|\
hfcl,ion4xi_w|\
@@ -90,6 +92,7 @@ platform_check_image() {
edgecore,oap101|\
edgecore,oap101-6e|\
edgecore,oap101e|\
emplus,wap581|\
edgecore,oap101e-6e)
[ "$magic_long" = "73797375" ] && return 0
;;
@@ -129,6 +132,7 @@ platform_do_upgrade() {
;;
cig,wf186w|\
cig,wf186h|\
emplus,wap385c|\
udaya,a6-id2|\
udaya,a6-od2|\
wallys,dr5018|\
@@ -136,6 +140,7 @@ platform_do_upgrade() {
optimcloud,d60-5g|\
optimcloud,d50|\
optimcloud,d50-5g|\
emplus,wap581|\
yuncore,fap655)
[ -f /proc/boot_info/rootfs/upgradepartition ] && {
CI_UBIPART="$(cat /proc/boot_info/rootfs/upgradepartition)"
@@ -147,7 +152,8 @@ platform_do_upgrade() {
cybertan,eww631-b1|\
sonicfi,rap630c-311g|\
sonicfi,rap630w-311g|\
sonicfi,rap630w-312g)
sonicfi,rap630w-312g|\
sonicfi,rap630e)
boot_part=$(fw_printenv bootfrom | cut -d = -f2)
echo "Current bootfrom is $boot_part"
if [[ $boot_part == 1 ]]; then

View File

@@ -450,6 +450,8 @@ CONFIG_GPIO_DEVRES=y
# CONFIG_GPIO_SAMA5D2_PIOBU is not set
CONFIG_GPIO_SYSFS=y
# CONFIG_GPIO_USB_DETECT is not set
CONFIG_GPIO_WATCHDOG=y
CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
# CONFIG_GSI is not set
# CONFIG_HABANA_AI is not set
CONFIG_HANDLE_DOMAIN_IRQ=y

View File

@@ -0,0 +1,760 @@
/dts-v1/;
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Emplus WAP385C";
compatible = "emplus,wap385c", "qcom,ipq5018-mp03.3", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet1 = "/soc/dp1";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E000000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E100000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E200000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4EF00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F000000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4100000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
no-map;
reg = <0x0 0x4E100000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
no-map;
reg = <0x0 0x4EF00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
no-map;
reg = <0x0 0x4F000000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D300000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D500000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E400000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E900000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4F800000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4D00000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
no-map;
reg = <0x0 0x4D500000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 23 0>;
ethernet-phy@0 {
reg = <24>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x18>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
wifi0: wifi@c000000 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x18>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
qcom,test@0 {
status = "ok";
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
poe_dc_pins: poe_dc_pins {
T2P_DET {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
12V_DET {
pins = "gpio32";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds_pinmux {
linux,phandle = <0x4d>;
phandle = <0x4d>;
led_G {
pins = "gpio24";
function = "gpio";
bias-pull-down;
drive-strength = <0x08>;
};
led_B {
pins = "gpio28";
function = "gpio";
bias-pull-down;
drive-strength = <0x08>;
};
led_R {
pins = "gpio38";
function = "gpio";
bias-pull-down;
drive-strength = <0x08>;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@24 {
label = "sys:green";
gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@28 {
label = "sys:blue";
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_power: led@38 {
label = "sys:red";
gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "wap385c:sys:red";
default-state = "on";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D500000 0x4D500000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E400000 0x4E400000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "ok";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};

View File

@@ -0,0 +1,831 @@
/dts-v1/;
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Emplus WAP581";
compatible = "emplus,wap581", "qcom,ipq5018-mp03.3", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart1;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E000000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E100000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E200000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4EF00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F000000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4100000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
no-map;
reg = <0x0 0x4E100000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
no-map;
reg = <0x0 0x4EF00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
no-map;
reg = <0x0 0x4F000000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D300000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D500000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E400000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E900000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4F800000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4D00000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
no-map;
reg = <0x0 0x4D500000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
ethernet-phy@4 {
reg = <4>;
};
};
ess-instance {
num_devices = <0x2>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <&tlmm 0x27 0>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x3e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <4>;
};
};
};
};
wifi0: wifi@c000000 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@28 {
label = "led_blue";
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@38 {
label = "led_red";
gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@46 {
label = "led_green";
gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
};
qcom,test@0 {
status = "ok";
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds_pins {
led_blue {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red { /* POWER_LED */
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green { /* 2G_LED */
pins = "gpio46";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,rproc = <&q6_wcss_pd1>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x23>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x50>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D500000 0x4D500000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E400000 0x4E400000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "ok";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
status = "disabled";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};

View File

@@ -0,0 +1,893 @@
/dts-v1/;
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Sonicfi RAP630E";
compatible = "sonicfi,rap630e", "qcom,ipq5018-mp03.5", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E000000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E100000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E200000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4EF00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F000000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4100000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
no-map;
reg = <0x0 0x4E000000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
no-map;
reg = <0x0 0x4E100000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
no-map;
reg = <0x0 0x4EF00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
no-map;
reg = <0x0 0x4F000000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D300000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D500000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E400000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E900000 | 13MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4F800000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4D00000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
no-map;
reg = <0x0 0x4D500000 0x0 0xD00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4E900000 0x0 0xD00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F600000 {
no-map;
reg = <0x0 0x4F600000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F700000 {
no-map;
reg = <0x0 0x4F700000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4F800000 {
no-map;
reg = <0x0 0x4F800000 0x0 0x500000>;
};
ramoops: ramoops@50400000 {
compatible = "ramoops";
reg = <0x0 0x50400000 0x0 0x80000>; // 512KB
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
no-map;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,rx-page-mode = <0>;
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
};
};
qcom,test@0 {
status = "ok";
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_5g {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led34 {
label = "green:wifi5";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
default-state = "on";
};
led33 {
label = "green:wifi2";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
default-state = "on";
};
led_power: led26 {
label = "green:power";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
default-state = "on";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
start-at-boot;
always-running;
status = "okay";
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
nss-radio-priority = <0>;
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,rproc = <&q6_wcss_pd3>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4E900000 0x4E900000 0x4E200000 0x0 0x0>;
qcom,caldb-addr = <0x4F800000 0x4F800000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data2>;
#else
memory-region = <&q6_qcn6122_data2>;
#endif
nss-radio-priority = <1>;
status = "ok";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
#ifdef __CNSS2__
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
#else
qcom,caldb-addr = <0x4FF00000>;
m3-dump-addr = <0x4FD00000>;
nss-radio-priority = <1>;
#endif
mem-region = <&q6_qcn6122_data2>;
qcom,caldb-size = <0x500000>;
status = "disabled";
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "disabled";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};

View File

@@ -73,6 +73,17 @@ define Device/sonicfi_rap630w_311g
endef
TARGET_DEVICES += sonicfi_rap630w_311g
define Device/sonicfi_rap630e
DEVICE_TITLE := Sonicfi RAP630E
DEVICE_DTS := qcom-ipq5018-rap630e
SUPPORTED_DEVICES := sonicfi,rap630e
DEVICE_PACKAGES := ath11k-wifi-sonicfi-rap630e ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
IMAGE/nand-factory.ubi := append-ubi
endef
TARGET_DEVICES += sonicfi_rap630e
define Device/edgecore_eap104
DEVICE_TITLE := EdgeCore EAP104
DEVICE_DTS := qcom-ipq5018-eap104
@@ -154,6 +165,15 @@ define Device/edgecore_oap101e_6e
endef
TARGET_DEVICES += edgecore_oap101e_6e
define Device/emplus_wap385c
DEVICE_TITLE := Emplus WAP385C
DEVICE_DTS := qcom-ipq5018-emplus-wap385c
SUPPORTED_DEVICES := emplus,wap385c
DEVICE_PACKAGES := ath11k-wifi-emplus-wap385c ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
endef
TARGET_DEVICES += emplus_wap385c
define Device/hfcl_ion4x_w
DEVICE_TITLE := HFCL ION4x_w
DEVICE_DTS := qcom-ipq5018-hfcl-ion4x_w
@@ -219,3 +239,16 @@ define Device/glinet_b3000
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += glinet_b3000
define Device/emplus_wap581
DEVICE_TITLE := Emplus WAP581
DEVICE_DTS := qcom-ipq5018-emplus-wap581
SUPPORTED_DEVICES := emplus,wap581
DEVICE_PACKAGES := ath11k-wifi-emplus-wap581 ath11k-firmware-ipq50xx-map-spruce
DEVICE_DTS_CONFIG := config@mp03.3
IMAGES := sysupgrade.tar nand-factory.bin
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += emplus_wap581

View File

@@ -26,6 +26,12 @@ edgecore,eap101)
ucidef_set_led_netdev "poe" "poe" "green:wan" "eth0"
ucidef_set_led_default "power" "POWER" "green:led_pwr" "on"
;;
emplus,wap386v2)
ucidef_set_led_default "power" "POWER" "red:power" "on"
ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth0" "tx rx link"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wifi2" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wifi5" "phy0tpt"
;;
hfcl,ion4xi|\
hfcl,ion4x|\
hfcl,ion4x_2|\

View File

@@ -34,10 +34,10 @@ qcom_setup_interfaces()
ucidef_set_interface_lan "eth1"
ucidef_set_interface_wan "eth0"
;;
cig,wf660a)
cig,wf660a|\
emplus,wap386v2)
ucidef_set_interface_wan "eth0"
;;
yuncore,fap650)
ucidef_set_interface_lan "eth3 eth2 eth1 eth0"
ucidef_set_interface_wan "eth4"
@@ -76,6 +76,9 @@ qcom_setup_macs()
ucidef_set_network_device_mac eth0 $wan_mac
ip link set eth0 address $wan_mac
;;
emplus,wap386v2)
wan_mac=$(cat /sys/class/net/eth0/address)
;;
yuncore,ax840)
wan_mac=$(cat /sys/class/net/eth1/address)
lan_mac=$(macaddr_add "$wan_mac" 1)

View File

@@ -76,6 +76,7 @@ case "$FIRMWARE" in
cig,wf188n|\
cig,wf660a|\
edgecore,eap101|\
emplus,wap386v2|\
hfcl,ion4xi|\
hfcl,ion4x|\
hfcl,ion4x_2|\
@@ -109,7 +110,8 @@ ath11k-macs)
edgecore,eap101)
ath11k_generate_macs_eap101
;;
cig,wf188n)
cig,wf188n|\
emplus,wap386v2)
ath11k_generate_macs
;;
cig,wf660a)

View File

@@ -122,6 +122,7 @@ platform_check_image() {
wallys,dr6018|\
wallys,dr6018-v4|\
edgecore,eap101|\
emplus,wap386v2|\
hfcl,ion4xi|\
hfcl,ion4x|\
hfcl,ion4x_2|\
@@ -145,7 +146,8 @@ platform_do_upgrade() {
cig,wf660a)
spi_nor_emmc_do_upgrade_bootconfig $1
;;
cig,wf188n)
cig,wf188n|\
emplus,wap386v2)
[ -f /proc/boot_info/rootfs/upgradepartition ] && {
CI_UBIPART="$(cat /proc/boot_info/rootfs/upgradepartition)"
CI_BOOTCFG=1

View File

@@ -0,0 +1,356 @@
/*
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
#include "ipq6018.dtsi"
#include "ipq6018-cpr-regulator.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Emplus WAP386 v2";
compatible = "emplus,wap386v2", "qcom,ipq6018-cp03", "qcom,ipq6018";
aliases {
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
ethernet0 = "/soc/dp1";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " swiotlb=1 coherent_pool=2M";
};
/*
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | 139MB |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | TZ App | 0x49B00000 | 6MB |
* +--------+--------------+-------------------------+
*
* From the available 145 MB for Linux in the first 256 MB,
* we are reserving 6 MB for TZAPP.
*
* Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi
* for memory layout.
*/
/* TZAPP is enabled only in default memory profile */
#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__)
reserved-memory {
tzapp:tzapp@49B00000 { /* TZAPPS */
no-map;
reg = <0x0 0x49B00000 0x0 0x00600000>;
};
};
#endif
};
&tlmm {
gpio-reserved-ranges = <20 1>;
uart_pins: uart_pins {
mux {
pins = "gpio44", "gpio45";
function = "blsp2_uart";
drive-strength = <8>;
bias-pull-down;
};
};
spi_0_pins: spi_0_pins {
mux {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
bias-pull-down;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio9";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio64";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio65";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio75";
function = "gpio";
bias-pull-up;
};
};
leds_pins: leds_pins {
led_5g {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio30";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
mdio@90000 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 75 0>;
status = "ok";
phy0: ethernet-phy@0 {
reg = <3>;
};
phy1: ethernet-phy@1 {
reg = <4>;
};
};
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x08>; /* lan port bitmap */
switch_wan_bmp = <0x10>; /* wan port bitmap */
switch_inner_bmp = <0xc0>; /*inner port bitmap*/
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <2>;
phy_address = <3>;
};
port@1 {
port_id = <3>;
phy_address = <4>;
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <4>;
phy-mode = "sgmii";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@9 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_power: led@28 {
label = "red:power";
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "wap386v2:red:power";
default-state = "on";
};
led@29 {
label = "blue:wan";
gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "wap386v2:blue:eth";
default-state = "on";
};
led@30 {
label = "blue:wifi2";
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "wap386v2:blue:2g";
default-state = "on";
};
led@31 {
label = "blue:wifi5";
gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "wap386v2:blue:5g";
default-state = "on";
};
};
};
&blsp1_uart3 {
pinctrl-0 = <&uart_pins>;
pinctrl-names = "default";
status = "ok";
};
&spi_0 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
&wifi0 {
qcom,board_id = <0x30>;
};
&pcie_phy {
status = "ok";
};
&pcie0 {
#if defined(__CNSS2__)
status = "ok";
#endif
};
&qpic_bam {
status = "ok";
};
&qpic_nand {
status = "ok";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&ssphy_0 {
status = "ok";
};
&nss_crypto {
status = "ok";
};
&CPU0 {
operating-points = <
/* kHz uV (fixed) */
864000 1100000
1056000 1100000
1320000 1100000
1440000 1100000
1608000 1100000
1800000 1100000
>;
clock-latency = <200000>;
};
&CPU1 {
operating-points = <
/* kHz uV (fixed) */
864000 1100000
1056000 1100000
1320000 1100000
1440000 1100000
1608000 1100000
1800000 1100000
>;
clock-latency = <200000>;
};
&CPU2 {
operating-points = <
/* kHz uV (fixed) */
864000 1100000
1056000 1100000
1320000 1100000
1440000 1100000
1608000 1100000
1800000 1100000
>;
clock-latency = <200000>;
};
&CPU3 {
operating-points = <
/* kHz uV (fixed) */
864000 1100000
1056000 1100000
1320000 1100000
1440000 1100000
1608000 1100000
1800000 1100000
>;
clock-latency = <200000>;
};
&rpm_glink {
status = "disabled";
};

View File

@@ -76,6 +76,15 @@ define Device/edgecore_eap101
endef
TARGET_DEVICES += edgecore_eap101
define Device/emplus_wap386v2
DEVICE_TITLE := Emplus WAP386v2
DEVICE_DTS := qcom-ipq6018-emplus-wap386v2
DEVICE_DTS_CONFIG := config@cp03-c1
SUPPORTED_DEVICES := emplus,wap386v2
DEVICE_PACKAGES := ath11k-wifi-qcom-ipq6018 uboot-env
endef
TARGET_DEVICES += emplus_wap386v2
define Device/indio_um-310ax-v1
DEVICE_TITLE := Indio UM-310AX V1
DEVICE_DTS := qcom-ipq6018-indio-um-310ax-v1

View File

@@ -20,6 +20,12 @@ edgecore,oap103)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy1tpt"
ucidef_set_led_wlan "power" "POWER" "green:power" "default-on"
;;
emplus,wap380c)
ucidef_set_led_default "power" "POWER" "ipq::led0" "on"
ucidef_set_led_netdev "wan" "WAN" "ipq::led1" "eth0"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "ipq::led2" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "ipq::led3" "phy0tpt"
;;
sonicfi,rap630w-311g|\
sonicfi,rap650c|\
cybertan,eww631-b1)

View File

@@ -12,6 +12,7 @@ qcom_setup_interfaces()
ucidef_add_switch_attr "switch0" "reset" "false"
case $board in
emplus,wap380c|\
tplink,ex227|\
tplink,ex447)
ucidef_set_interface_wan "eth0"

View File

@@ -16,14 +16,14 @@ ath11k_generate_macs() {
echo -ne \\x${mac3//:/\\x} >> /lib/firmware/ath11k-macs
}
ath11k_generate_macs_sonicfi() {
ath11k_generate_macs_rap650c() {
mac=$(fw_printenv -n BaseMacAddress)
[ -z "$mac" ] && return;
touch /lib/firmware/ath11k-macs
eth=$(macaddr_canonicalize $mac)
mac1=$(macaddr_add $eth 2)
mac2=$(macaddr_add $eth 3)
mac1=$(macaddr_add $eth 3)
mac2=$(macaddr_add $eth 2)
mac3=$(macaddr_add $eth 4)
echo -ne \\x${mac1//:/\\x} >> /lib/firmware/ath11k-macs
echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs
@@ -72,6 +72,7 @@ case "$FIRMWARE" in
edgecore,oap102 |\
edgecore,oap103 |\
edgecore,eap106 |\
emplus,wap380c|\
qcom,ipq807x-hk01|\
qcom,ipq807x-hk14|\
tplink,ex227|\
@@ -112,8 +113,8 @@ ath11k-macs)
cig,wf196)
ath11k_generate_macs_wf196
;;
sonicfi*)
ath11k_generate_macs_sonicfi
sonicfi,rap650c)
ath11k_generate_macs_rap650c
;;
esac
;;

View File

@@ -29,6 +29,7 @@ platform_check_image() {
edgecore,oap102|\
edgecore,oap103|\
edgecore,eap106|\
emplus,wap380c|\
sonicfi,rap650c|\
tplink,ex227|\
tplink,ex447)
@@ -48,7 +49,8 @@ platform_do_upgrade() {
tplink,ex227)
qca_do_upgrade "$1"
;;
cig,wf196)
cig,wf196|\
emplus,wap380c)
[ -f /proc/boot_info/rootfs/upgradepartition ] && {
CI_UBIPART="$(cat /proc/boot_info/rootfs/upgradepartition)"
CI_BOOTCFG=1

View File

@@ -0,0 +1,648 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
/* Copyright (c) 2020 The Linux Foundation. All rights reserved.
*/
#include "ipq8074.dtsi"
#include "ipq8074-ac-cpu.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Emplus WAP380C";
compatible = "emplus,wap380c", "qcom,ipq8074-ap-hk07", "qcom,ipq8074";
qcom,msm-id = <0x143 0x0>;
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
/* Aliases as required by u-boot to patch MAC addresses */
ethernet0 = "/soc/dp6";
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
stdout-path = "serial0";
};
soc {
qti: ledc@191E000 {
compatible = "qti,ledc";
reg = <0x191E000 0x20070>;
reg-names = "ledc_base_addr";
qti,tcsr_ledc_values = <0x0320193 0x00000000 \
0x00000000 0x00000000 \
0x00000000 0xFFFFFFFF \
0xFFFF7FFF 0xFFFFFFFF \
0x007D0820 0x00000000 \
0x10482094 0x03FFFFE1>;
qti,ledc_blink_indices_cnt = <6>;
qti,ledc_blink_indices = <15 14 13 12 11 10>;
qti,ledc_blink_idx_src_pair = <5 20>;
status = "ok";
};
pinctrl@1000000 {
button_pins: button_pins {
reset_button {
pins = "gpio52";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
mdio_pins: mdio_pinmux {
mux_0 {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
mux_2 {
pins = "gpio44";
function = "gpio";
bias-pull-up;
};
};
ledc_pins: ledc_pinmux {
led_clk {
pins = "gpio18";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
led_data {
pins = "gpio19";
function = "led1";
drive-strength = <8>;
bias-pull-down;
};
led_clr {
pins = "gpio20";
function = "led2";
drive-strength = <8>;
bias-pull-up;
};
};
};
serial@78b3000 {
status = "ok";
};
spi@78b5000 {
status = "ok";
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
m25p80@0 {
compatible = "n25q128a11";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <50000000>;
};
};
dma@7984000 {
status = "ok";
};
nand@79b0000 {
status = "ok";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
ssphy@78000 {
status = "ok";
};
ssphy@58000 {
status = "ok";
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
status = "ok";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
mdio: mdio@90000 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 43 1 &tlmm 44 1>;
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
phy5: ethernet-phy@5 {
reg = <28>;
};
};
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x3e>; /* lan port bitmap */
switch_wan_bmp = <0x40>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <4>;
};
port@5 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
};
port_scheduler_resource {
port@0 {
port_id = <0>;
ucast_queue = <0 143>;
mcast_queue = <256 271>;
l0sp = <0 35>;
l0cdrr = <0 47>;
l0edrr = <0 47>;
l1cdrr = <0 7>;
l1edrr = <0 7>;
};
port@1 {
port_id = <1>;
ucast_queue = <144 159>;
mcast_queue = <272 275>;
l0sp = <36 39>;
l0cdrr = <48 63>;
l0edrr = <48 63>;
l1cdrr = <8 11>;
l1edrr = <8 11>;
};
port@2 {
port_id = <2>;
ucast_queue = <160 175>;
mcast_queue = <276 279>;
l0sp = <40 43>;
l0cdrr = <64 79>;
l0edrr = <64 79>;
l1cdrr = <12 15>;
l1edrr = <12 15>;
};
port@3 {
port_id = <3>;
ucast_queue = <176 191>;
mcast_queue = <280 283>;
l0sp = <44 47>;
l0cdrr = <80 95>;
l0edrr = <80 95>;
l1cdrr = <16 19>;
l1edrr = <16 19>;
};
port@4 {
port_id = <4>;
ucast_queue = <192 207>;
mcast_queue = <284 287>;
l0sp = <48 51>;
l0cdrr = <96 111>;
l0edrr = <96 111>;
l1cdrr = <20 23>;
l1edrr = <20 23>;
};
port@5 {
port_id = <5>;
ucast_queue = <208 223>;
mcast_queue = <288 291>;
l0sp = <52 55>;
l0cdrr = <112 127>;
l0edrr = <112 127>;
l1cdrr = <24 27>;
l1edrr = <24 27>;
};
port@6 {
port_id = <6>;
ucast_queue = <224 239>;
mcast_queue = <292 295>;
l0sp = <56 59>;
l0cdrr = <128 143>;
l0edrr = <128 143>;
l1cdrr = <28 31>;
l1edrr = <28 31>;
};
port@7 {
port_id = <7>;
ucast_queue = <240 255>;
mcast_queue = <296 299>;
l0sp = <60 63>;
l0cdrr = <144 159>;
l0edrr = <144 159>;
l1cdrr = <32 35>;
l1edrr = <32 35>;
};
};
port_scheduler_config {
port@0 {
port_id = <0>;
l1scheduler {
group@0 {
sp = <0 1>; /*L0 SPs*/
/*cpri cdrr epri edrr*/
cfg = <0 0 0 0>;
};
};
l0scheduler {
group@0 {
/*unicast queues*/
ucast_queue = <0 4 8>;
/*multicast queues*/
mcast_queue = <256 260>;
/*sp cpri cdrr epri edrr*/
cfg = <0 0 0 0 0>;
};
group@1 {
ucast_queue = <1 5 9>;
mcast_queue = <257 261>;
cfg = <0 1 1 1 1>;
};
group@2 {
ucast_queue = <2 6 10>;
mcast_queue = <258 262>;
cfg = <0 2 2 2 2>;
};
group@3 {
ucast_queue = <3 7 11>;
mcast_queue = <259 263>;
cfg = <0 3 3 3 3>;
};
};
};
port@1 {
port_id = <1>;
l1scheduler {
group@0 {
sp = <36>;
cfg = <0 8 0 8>;
};
group@1 {
sp = <37>;
cfg = <1 9 1 9>;
};
};
l0scheduler {
group@0 {
ucast_queue = <144>;
ucast_loop_pri = <16>;
mcast_queue = <272>;
mcast_loop_pri = <4>;
cfg = <36 0 48 0 48>;
};
};
};
port@2 {
port_id = <2>;
l1scheduler {
group@0 {
sp = <40>;
cfg = <0 12 0 12>;
};
group@1 {
sp = <41>;
cfg = <1 13 1 13>;
};
};
l0scheduler {
group@0 {
ucast_queue = <160>;
ucast_loop_pri = <16>;
mcast_queue = <276>;
mcast_loop_pri = <4>;
cfg = <40 0 64 0 64>;
};
};
};
port@3 {
port_id = <3>;
l1scheduler {
group@0 {
sp = <44>;
cfg = <0 16 0 16>;
};
group@1 {
sp = <45>;
cfg = <1 17 1 17>;
};
};
l0scheduler {
group@0 {
ucast_queue = <176>;
ucast_loop_pri = <16>;
mcast_queue = <280>;
mcast_loop_pri = <4>;
cfg = <44 0 80 0 80>;
};
};
};
port@4 {
port_id = <4>;
l1scheduler {
group@0 {
sp = <48>;
cfg = <0 20 0 20>;
};
group@1 {
sp = <49>;
cfg = <1 21 1 21>;
};
};
l0scheduler {
group@0 {
ucast_queue = <192>;
ucast_loop_pri = <16>;
mcast_queue = <284>;
mcast_loop_pri = <4>;
cfg = <48 0 96 0 96>;
};
};
};
port@5 {
port_id = <5>;
l1scheduler {
group@0 {
sp = <52>;
cfg = <0 24 0 24>;
};
group@1 {
sp = <53>;
cfg = <1 25 1 25>;
};
};
l0scheduler {
group@0 {
ucast_queue = <208>;
ucast_loop_pri = <16>;
mcast_queue = <288>;
mcast_loop_pri = <4>;
cfg = <52 0 112 0 112>;
};
};
};
port@6 {
port_id = <6>;
l1scheduler {
group@0 {
sp = <56>;
cfg = <0 28 0 28>;
};
group@1 {
sp = <57>;
cfg = <1 29 1 29>;
};
};
l0scheduler {
group@0 {
ucast_queue = <224>;
ucast_loop_pri = <16>;
mcast_queue = <292>;
mcast_loop_pri = <4>;
cfg = <56 0 128 0 128>;
};
};
};
port@7 {
port_id = <7>;
l1scheduler {
group@0 {
sp = <60>;
cfg = <0 32 0 32>;
};
group@1 {
sp = <61>;
cfg = <1 33 1 33>;
};
};
l0scheduler {
group@0 {
ucast_queue = <240>;
ucast_loop_pri = <16>;
mcast_queue = <296>;
cfg = <60 0 144 0 144>;
};
};
};
};
};
dp6 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <6>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
phy-mode = "sgmii";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio>;
};
};
};
&apc_cpr {
/* Same CPR configuration as OAK */
compatible = "qcom,cpr4-ipq817x-apss-regulator";
thread@0 {
apc_vreg: regulator {
regulator-min-microvolt = <1>;
regulator-max-microvolt = <2>;
qcom,cpr-fuse-corners = <2>;
qcom,cpr-corners = <3>;
qcom,cpr-speed-bin-corners = <3>;
qcom,cpr-corner-fmax-map = <1 3>;
qcom,cpr-voltage-ceiling =
<840000 904000 944000>;
qcom,cpr-voltage-floor =
<592000 648000 712000>;
qcom,corner-frequencies =
<1017600000 1382400000 1382400000>;
qcom,cpr-open-loop-voltage-fuse-adjustment-0 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-open-loop-voltage-fuse-adjustment-1 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 0>,
< 0 0>,
< 20000 26000>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-open-loop-voltage-fuse-adjustment-v2-0 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-open-loop-voltage-fuse-adjustment-v2-1 =
/* Speed bin 0; CPR rev 0..7 */
< 0 0>,
< 0 7000>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>,
< 0 0>;
qcom,cpr-floor-to-ceiling-max-range =
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>,
< 40000 40000 40000>;
};
};
};
&npu_cpr {
status = "disabled";
};
&nss0 {
qcom,low-frequency = <187200000>;
qcom,mid-frequency = <748800000>;
qcom,max-frequency = <1497600000>;
};
&nss0 {
npu-supply = <&dummy_reg>;
mx-supply = <&dummy_reg>;
};
&wifi0 {
qcom,board_id = <0x92>;
};
&wifi1 {
qcom,board_id = <0x290>;
};
&ledc {
pinctrl-0 = <&ledc_pins>;
pinctrl-names = "default";
status = "ok";
led_power: led0 {
label = "ipq::led0";
linux,default-trigger = "default-on";
};
wan: led1 {
label = "ipq::led1";
linux,default-trigger = "netdev";
};
wifi2g: led2 {
label = "ipq::led2";
linux,default-trigger = "phy1tpt";
};
wifi5g: led3 {
label = "ipq::led3";
linux,default-trigger = "phy0tpt";
};
led4 {
label = "ipq::led4";
linux,default-trigger = "none";
};
led5 {
label = "ipq::led5";
linux,default-trigger = "none";
};
};

View File

@@ -57,6 +57,15 @@ define Device/edgecore_eap106
endef
#TARGET_DEVICES += edgecore_eap106
define Device/emplus_wap380c
DEVICE_TITLE := Emplus WAP380C
DEVICE_DTS := qcom-ipq807x-wap380c
DEVICE_DTS_CONFIG=config@hk07
SUPPORTED_DEVICES := emplus,wap380c
DEVICE_PACKAGES := ath11k-wifi-emplus-wap380c uboot-envtools
endef
TARGET_DEVICES += emplus_wap380c
define Device/sonicfi_rap650c
DEVICE_TITLE := SonicFi RAP650C
DEVICE_DTS := qcom-ipq807x-rap650c

View File

@@ -6,7 +6,7 @@
return 0;
- if (WARN_ON_ONCE(rate->nss < 1 || rate->nss > 8))
+ if (rate->nss < 1 || rate->nss > 8) {
+ printk_once(1, "invalid rate->nss: %d\n", rate->nss);
+ printk_once(KERN_WARNING "cfg80211_calculate_bitrate_he: invalid rate->nss: %d\n", rate->nss);
return 0;
-
+ }

View File

@@ -0,0 +1,119 @@
--- a/drivers/net/wireless/ath/ath11k/peer.c
+++ b/drivers/net/wireless/ath/ath11k/peer.c
@@ -819,10 +819,7 @@ int ath11k_peer_delete(struct ath11k *ar
#ifdef CPTCFG_ATH11K_NSS_SUPPORT
mutex_unlock(&ar->ab->base_ast_lock);
#endif
- ath11k_warn(ar->ab,
- "failed to find peer vdev_id %d addr %pM in delete\n",
- vdev_id, addr);
- return -EINVAL;
+ return 0;
}
#ifdef CPTCFG_ATH11K_NSS_SUPPORT
@@ -883,6 +880,7 @@ int ath11k_peer_create(struct ath11k *ar
struct ieee80211_vif *vif = arvif->vif;
struct ath11k_sta *arsta;
int ret, fbret;
+ u8 vdev_id = 0;
lockdep_assert_held(&ar->conf_mutex);
@@ -891,20 +889,21 @@ int ath11k_peer_create(struct ath11k *ar
"failed to create peer due to insufficient peer entry resource in firmware\n");
return -ENOBUFS;
}
+
mutex_lock(&ar->ab->tbl_mtx_lock);
spin_lock_bh(&ar->ab->base_lock);
peer = ath11k_peer_find_by_addr(ar->ab, param->peer_addr);
+ if (peer)
+ vdev_id = peer->vdev_id;
+ spin_unlock_bh(&ar->ab->base_lock);
+ mutex_unlock(&ar->ab->tbl_mtx_lock);
+
if (peer) {
- if (peer->vdev_id == param->vdev_id) {
- spin_unlock_bh(&ar->ab->base_lock);
- mutex_unlock(&ar->ab->tbl_mtx_lock);
+ if (vdev_id == param->vdev_id)
return -EINVAL;
- }
- ath11k_peer_rhash_delete(ar->ab, peer);
- }
- spin_unlock_bh(&ar->ab->base_lock);
- mutex_unlock(&ar->ab->tbl_mtx_lock);
+ ath11k_peer_delete(ar, vdev_id, param->peer_addr);
+ }
ret = ath11k_wmi_send_peer_create_cmd(ar, param);
if (ret) {
--- a/drivers/net/wireless/ath/ath11k/dp.c
+++ b/drivers/net/wireless/ath/ath11k/dp.c
@@ -28,7 +28,7 @@ void ath11k_dp_peer_cleanup(struct ath11
spin_lock_bh(&ab->base_lock);
peer = ath11k_peer_find(ab, vdev_id, addr);
if (!peer) {
- ath11k_warn(ab, "failed to lookup peer %pM on vdev %d\n",
+ ath11k_dbg(ab, ATH11K_DBG_MAC, "failed to lookup peer %pM on vdev %d\n",
addr, vdev_id);
spin_unlock_bh(&ab->base_lock);
return;
--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
@@ -1204,9 +1204,9 @@ int ath11k_dp_rx_ampdu_stop(struct ath11
peer = ath11k_peer_find(ab, vdev_id, params->sta->addr);
if (!peer) {
- ath11k_warn(ab, "failed to find the peer to stop rx aggregation\n");
+ ath11k_dbg(ab, ATH11K_DBG_MAC, "failed to find the peer to stop rx aggregation\n");
spin_unlock_bh(&ab->base_lock);
- return -ENOENT;
+ return 0;
}
paddr = peer->rx_tid[params->tid].paddr;
--- a/drivers/net/wireless/ath/ath11k/mac.c
+++ b/drivers/net/wireless/ath/ath11k/mac.c
@@ -4075,7 +4075,7 @@ static int ath11k_clear_peer_keys(struct
peer = ath11k_peer_find(ab, arvif->vdev_id, addr);
if (!peer) {
spin_unlock_bh(&ab->base_lock);
- return -ENOENT;
+ return 0;
}
for (i = 0; i < ARRAY_SIZE(keys); i++) {
keys[i]= peer->keys[i];
@@ -4325,6 +4325,10 @@ static int ath11k_mac_op_set_key(struct
spin_lock_bh(&ab->base_lock);
peer = ath11k_peer_find(ab, arvif->vdev_id, peer_addr);
+ if (!peer && cmd == DISABLE_KEY) {
+ ret = 0;
+ goto unlock;
+ }
/* TODO: Check if vdev specific security cfg is mandatory */
ret = ath11k_nss_vdev_set_cmd(arvif, ATH11K_NSS_WIFI_VDEV_SECURITY_TYPE_CMD, key->cipher);
@@ -5961,7 +5965,7 @@ static void ath11k_mac_op_sta_rc_update(
peer = ath11k_peer_find(ar->ab, arvif->vdev_id, sta->addr);
if (!peer) {
spin_unlock_bh(&ar->ab->base_lock);
- ath11k_warn(ar->ab, "mac sta rc update failed to find peer %pM on vdev %i\n",
+ ath11k_dbg(ar->ab, ATH11K_DBG_MAC, "mac sta rc update failed to find peer %pM on vdev %i\n",
sta->addr, arvif->vdev_id);
return;
}
--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++ b/drivers/net/wireless/ath/ath11k/wmi.c
@@ -8425,7 +8425,7 @@ static void ath11k_peer_sta_kickout_even
peer = ath11k_peer_find_by_addr(ab, arg.mac_addr);
if (!peer) {
spin_unlock_bh(&ab->base_lock);
- ath11k_warn(ab, "peer not found %pM\n",
+ ath11k_dbg(ab, ATH11K_DBG_WMI, "peer not found %pM\n",
arg.mac_addr);
goto exit;
}

View File

@@ -169,7 +169,8 @@
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "sgmii";
phy-handle = <&phy1>; // add phy handler
phy-handle = <&phy30>;
phy-handle2 = <&phy1>;
mtd-mac-address = <&factory 0x24>;
};
@@ -181,9 +182,9 @@
mtd-mac-address = <&factory 0x2a>;
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9461";
@@ -193,6 +194,16 @@
nvmem-cell-names = "phy-cal-data";
};
phy30: ethernet-phy@30 { // AN8801SB
compatible = "ethernet-phy-idc0ff.0421";
reg = <30>; //0x1e
phy-mode = "sgmii";
full-duplex;
pause;
airoha,surge = <1>;
airoha,polarity = <2>;
};
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9471";
reg = <24>; // set phy address to 0x18
@@ -200,9 +211,8 @@
reset-assert-us = <600>;
reset-deassert-us = <20000>;
phy-mode = "sgmii";
};
};
};
};
};
&hnat {

View File

@@ -113,7 +113,6 @@ static const struct AIR_LED_CFG_T led_cfg_dlt[MAX_LED_SIZE] = {
/* LED2 */
{LED_ENABLE, AIR_LED_GPIO9, AIR_ACTIVE_LOW, AIR_LED2_ON, AIR_LED2_BLK},
};
static const u16 led_blink_cfg_dlt = AIR_LED_BLK_DUR_64M;
/* RGMII delay */
static const u8 rxdelay_force = FALSE;
@@ -140,7 +139,6 @@ static int __air_buckpbus_reg_write(struct phy_device *phydev, u32 addr,
err |= mbus->write(mbus, phy_addr, 0x13, (u16)(data >> 16));
err |= mbus->write(mbus, phy_addr, 0x14, (u16)(data & 0xffff));
err |= mbus->write(mbus, phy_addr, 0x1F, 0);
return err;
}
@@ -167,6 +165,41 @@ static u32 __air_buckpbus_reg_read(struct phy_device *phydev, u32 addr)
return data;
}
static u32 __air_buckpbus_reg_modify(struct phy_device *phydev, u32 addr,
u32 mask, u32 set)
{
int err = 0;
u32 data_h, data_l, data_old, data_new;
int phy_addr = phydev_phy_addr(phydev);
struct mii_bus *mbus = phydev_mdiobus(phydev);
err = mbus->write(mbus, phy_addr, 0x1F, 4);
err |= mbus->write(mbus, phy_addr, 0x10, 0);
err |= mbus->write(mbus, phy_addr, 0x15, (u16)(addr >> 16));
err |= mbus->write(mbus, phy_addr, 0x16, (u16)(addr & 0xffff));
data_h = mbus->read(mbus, phy_addr, 0x17);
data_l = mbus->read(mbus, phy_addr, 0x18);
if (err < 0) {
mbus->write(mbus, phy_addr, 0x1F, 0);
return INVALID_DATA;
}
data_old = ((data_h & 0xffff) << 16) | (data_l & 0xffff);
data_new = (data_old & ~mask) | set;
if (data_new == data_old) {
mbus->write(mbus, phy_addr, 0x1F, 0);
return 0;
}
err |= mbus->write(mbus, phy_addr, 0x11, (u16)(addr >> 16));
err |= mbus->write(mbus, phy_addr, 0x12, (u16)(addr & 0xffff));
err |= mbus->write(mbus, phy_addr, 0x13, (u16)(data_new >> 16));
err |= mbus->write(mbus, phy_addr, 0x14, (u16)(data_new & 0xffff));
err |= mbus->write(mbus, phy_addr, 0x1F, 0);
return err;
}
static int air_buckpbus_reg_write(struct phy_device *phydev, u32 addr, u32 data)
{
int err = 0;
@@ -189,82 +222,18 @@ static u32 air_buckpbus_reg_read(struct phy_device *phydev, u32 addr)
return data;
}
static int __an8801_cl45_write(struct phy_device *phydev, int devad, u16 reg,
u16 val)
{
u32 addr = (AN8801_EPHY_ADDR | AN8801_CL22 | (devad << 18) |
(reg << 2));
return __air_buckpbus_reg_write(phydev, addr, val);
}
static int __an8801_cl45_read(struct phy_device *phydev, int devad, u16 reg)
{
u32 addr = (AN8801_EPHY_ADDR | AN8801_CL22 | (devad << 18) |
(reg << 2));
return __air_buckpbus_reg_read(phydev, addr);
}
int __an8801_modify_cl45_changed(struct phy_device *phydev, int devad, u32 regnum,
u16 mask, u16 set)
{
int new, ret;
ret = __an8801_cl45_read(phydev, devad, regnum);
if (ret < 0)
return ret;
new = (ret & ~mask) | set;
if (new == ret)
return 0;
ret = __an8801_cl45_write(phydev, devad, regnum, new);
return ret < 0 ? ret : 1;
}
static int an8801_modify_cl45_changed(struct phy_device *phydev, int devad,
u32 regnum, u16 mask, u16 set)
static int air_buckpbus_reg_modify(struct phy_device *phydev, u32 addr,
u32 mask, u32 set)
{
int err = 0;
mdiobus_lock(phydev);
err = __an8801_modify_cl45_changed(phydev, devad, regnum, mask, set);
err = __air_buckpbus_reg_modify(phydev, addr, mask, set);
mdiobus_unlock(phydev);
return err;
}
static int an8801_cl45_write(struct phy_device *phydev, int devad, u16 reg,
u16 val)
{
int err = 0;
mdiobus_lock(phydev);
err = __an8801_cl45_write(phydev, devad, reg, val);
mdiobus_unlock(phydev);
return err;
}
static int an8801_cl45_read(struct phy_device *phydev, int devad, u16 reg,
u16 *read_data)
{
int data = 0;
mdiobus_lock(phydev);
data = __an8801_cl45_read(phydev, devad, reg);
mdiobus_unlock(phydev);
if (data == INVALID_DATA)
return -EINVAL;
*read_data = data;
return 0;
}
static int air_sw_reset(struct phy_device *phydev)
{
u32 reg_value;
@@ -298,50 +267,36 @@ static int an8801_led_set_usr_def(struct phy_device *phydev, u8 entity,
on_evt |= LED_ON_EN;
err = an8801_cl45_write(phydev, 0x1f, LED_ON_CTRL(entity), on_evt);
err = phy_write_mmd(phydev, 0x1f, LED_ON_CTRL(entity), on_evt);
if (err)
return -1;
return an8801_cl45_write(phydev, 0x1f, LED_BLK_CTRL(entity), blk_evt);
return phy_write_mmd(phydev, 0x1f, LED_BLK_CTRL(entity), blk_evt);
}
static int an8801_led_set_mode(struct phy_device *phydev, u8 mode)
{
int err;
u16 data;
err = an8801_cl45_read(phydev, 0x1f, LED_BCR, &data);
if (err)
return -1;
switch (mode) {
case AIR_LED_MODE_DISABLE:
data &= ~LED_BCR_EXT_CTRL;
data &= ~LED_BCR_MODE_MASK;
data |= LED_BCR_MODE_DISABLE;
break;
return phy_modify_mmd(phydev, 0x1f, LED_BCR,
(LED_BCR_EXT_CTRL | LED_BCR_CLK_EN),
0x0);
case AIR_LED_MODE_USER_DEFINE:
data |= (LED_BCR_EXT_CTRL | LED_BCR_CLK_EN);
return phy_modify_mmd(phydev, 0x1f, LED_BCR,
(LED_BCR_EXT_CTRL | LED_BCR_CLK_EN),
(LED_BCR_EXT_CTRL | LED_BCR_CLK_EN));
default:
break;
}
return an8801_cl45_write(phydev, 0x1f, LED_BCR, data);
dev_err(phydev_dev(phydev),
"LED mode %d is not supported\n", mode);
return -EINVAL;
}
static int an8801_led_set_state(struct phy_device *phydev, u8 entity, u8 state)
{
u16 data;
int err;
err = an8801_cl45_read(phydev, 0x1f, LED_ON_CTRL(entity), &data);
if (err)
return err;
if (state)
data |= LED_ON_EN;
else
data &= ~LED_ON_EN;
return an8801_cl45_write(phydev, 0x1f, LED_ON_CTRL(entity), data);
return phy_modify_mmd(phydev, 0x1f, LED_ON_CTRL(entity), LED_ON_EN,
(state) ? LED_ON_EN : 0x0);
}
static int an8801_led_init(struct phy_device *phydev)
@@ -352,12 +307,12 @@ static int an8801_led_init(struct phy_device *phydev)
u32 data;
u16 led_blink_cfg = priv->led_blink_cfg;
ret = an8801_cl45_write(phydev, 0x1f, LED_BLK_DUR,
ret = phy_write_mmd(phydev, 0x1f, LED_BLK_DUR,
LED_BLINK_DURATION(led_blink_cfg));
if (ret < 0)
return ret;
ret = an8801_cl45_write(phydev, 0x1f, LED_ON_DUR,
ret = phy_write_mmd(phydev, 0x1f, LED_ON_DUR,
(LED_BLINK_DURATION(led_blink_cfg) >> 1));
if (ret < 0)
return ret;
@@ -406,6 +361,56 @@ static int an8801_led_init(struct phy_device *phydev)
return 0;
}
static int an8801_ack_interrupt(struct phy_device *phydev)
{
u32 reg_val = 0;
air_buckpbus_reg_write(phydev, 0x10285404, 0x102);
reg_val = air_buckpbus_reg_read(phydev, 0x10285400);
air_buckpbus_reg_write(phydev, 0x10285400, 0x0);
air_buckpbus_reg_write(phydev, 0x10285400, reg_val | 0x10);
air_buckpbus_reg_write(phydev, 0x10285404, 0x12);
air_buckpbus_reg_write(phydev, 0x10285704, 0x1f);
return 0;
}
static int an8801_config_intr(struct phy_device *phydev)
{
if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
air_buckpbus_reg_write(phydev, 0x1000007c, BIT(AIR_INTERRUPT_GPIO) << 16);
air_buckpbus_reg_modify(phydev, 0x10285700, 0x1, 0x1);
} else {
air_buckpbus_reg_write(phydev, 0x1000007c, 0x0);
air_buckpbus_reg_modify(phydev, 0x10285700, 0x1, 0x0);
}
an8801_ack_interrupt(phydev);
return 0;
}
static int an8801_did_interrupt(struct phy_device *phydev)
{
u32 reg_val = 0;
reg_val = air_buckpbus_reg_read(phydev, 0x10285704);
if (reg_val & 0x11)
return 1;
return 0;
}
#if (KERNEL_VERSION(5, 11, 0) < LINUX_VERSION_CODE)
static irqreturn_t an8801_handle_interrupt(struct phy_device *phydev)
{
if (!an8801_did_interrupt(phydev))
return IRQ_NONE;
an8801_ack_interrupt(phydev);
phy_trigger_machine(phydev);
return IRQ_HANDLED;
}
#endif
static int findClosestNumber(const u16 *arr, u16 size, u16 target)
{
int left = 0, right = size - 1;
@@ -431,77 +436,77 @@ static int findClosestNumber(const u16 *arr, u16 size, u16 target)
static int an8801sb_i2mpb_config(struct phy_device *phydev)
{
int ret = 0;
u16 cl45_value = 0, temp_cl45 = 0, set = 0;
u16 cl45_value = 0, temp_cl45 = 0;
u16 mask = 0;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x12, &cl45_value);
cl45_value = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x12);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value);
cl45_value = (cl45_value & GENMASK(15, 10)) + (6 << 10);
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x12, GENMASK(15, 10), cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x12, GENMASK(15, 10), cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x16, &temp_cl45);
temp_cl45 = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x16);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, temp_cl45);
mask = GENMASK(15, 10) | GENMASK(5, 0);
cl45_value = (temp_cl45 & GENMASK(15, 10)) + (9 << 10);
cl45_value = ((temp_cl45 & GENMASK(5, 0)) + 6) | cl45_value;
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x16, mask, cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x16, mask, cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x17, &cl45_value);
cl45_value = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x17);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value);
cl45_value = (cl45_value & GENMASK(13, 8)) + (6 << 8);
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x17, GENMASK(13, 8), cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x17, GENMASK(13, 8), cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x18, &temp_cl45);
temp_cl45 = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x18);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, temp_cl45);
mask = GENMASK(13, 8) | GENMASK(5, 0);
cl45_value = (temp_cl45 & GENMASK(13, 8)) + (9 << 8);
cl45_value = ((temp_cl45 & GENMASK(5, 0)) + 6) | cl45_value;
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x18, mask, cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x18, mask, cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x19, &cl45_value);
cl45_value = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x19);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value);
cl45_value = (cl45_value & GENMASK(13, 8)) + (6 << 8);
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x19, GENMASK(13, 8), cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x19, GENMASK(13, 8), cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x20, &cl45_value);
cl45_value = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x20);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value);
cl45_value = (cl45_value & GENMASK(5, 0)) + 6;
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x20, GENMASK(5, 0), cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x20, GENMASK(5, 0), cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x21, &cl45_value);
cl45_value = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x21);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value);
cl45_value = (cl45_value & GENMASK(13, 8)) + (6 << 8);
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x21, GENMASK(13, 8), cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x21, GENMASK(13, 8), cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x22, &cl45_value);
cl45_value = phy_read_mmd(phydev, MMD_DEV_VSPEC1, 0x22);
dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value);
cl45_value = (cl45_value & GENMASK(5, 0)) + 6;
ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x22, GENMASK(5, 0), cl45_value);
ret = phy_modify_mmd(phydev, MMD_DEV_VSPEC1, 0x22, GENMASK(5, 0), cl45_value);
if (ret < 0)
return ret;
ret = an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x23, 0x883);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x24, 0x883);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x25, 0x883);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x26, 0x883);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x0, 0x100);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x1, 0x1bc);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x2, 0x1d0);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x3, 0x186);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x4, 0x202);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x5, 0x20e);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x6, 0x300);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x7, 0x3c0);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x8, 0x3d0);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x9, 0x317);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0xa, 0x206);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0xb, 0xe);
ret = phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x23, 0x883);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x24, 0x883);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x25, 0x883);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x26, 0x883);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x0, 0x100);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x1, 0x1bc);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x2, 0x1d0);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x3, 0x186);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x4, 0x202);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x5, 0x20e);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x6, 0x300);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x7, 0x3c0);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x8, 0x3d0);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0x9, 0x317);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0xa, 0x206);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC1, 0xb, 0xe);
if (ret < 0)
return ret;
@@ -510,14 +515,14 @@ static int an8801sb_i2mpb_config(struct phy_device *phydev)
}
void update_r50_value(struct phy_device *phydev,
u16 *cl45_value, int pos1, int pos2)
u16 *cl45_value, int pos1, int pos2)
{
*cl45_value &= ~(0x007f << 8);
*cl45_value |= ((r50ohm_table[pos1]) & 0x007f) << 8;
*cl45_value &= ~(0x007f);
*cl45_value |= (r50ohm_table[pos2]) & 0x007f;
dev_dbg(phydev_dev(phydev), "Read: r50ohm_tx_1=%d r50ohm_tx_2=%d\n",
r50ohm_table[pos1], r50ohm_table[pos2]);
r50ohm_table[pos1], r50ohm_table[pos2]);
}
int calculate_position(int pos, int shift, int table_size)
@@ -529,7 +534,7 @@ int calculate_position(int pos, int shift, int table_size)
}
int process_r50(struct phy_device *phydev, int reg,
u16 *cl45_value, u16 *r50ohm_tx_a, u16 *r50ohm_tx_b)
u16 *cl45_value, u16 *r50ohm_tx_a, u16 *r50ohm_tx_b)
{
int pos1 = findClosestNumber(r50ohm_table, r50ohm_table_size, *r50ohm_tx_a);
int pos2 = findClosestNumber(r50ohm_table, r50ohm_table_size, *r50ohm_tx_b);
@@ -539,7 +544,7 @@ int process_r50(struct phy_device *phydev, int reg,
pos2 = calculate_position(pos2, R50_SHIFT, r50ohm_table_size);
update_r50_value(phydev, cl45_value, pos1, pos2);
return an8801_cl45_write(phydev, 0x1e, reg, *cl45_value);
return phy_write_mmd(phydev, 0x1e, reg, *cl45_value);
}
return 0;
}
@@ -558,10 +563,10 @@ static int an8801r_of_init(struct phy_device *phydev)
return -1;
}
if (val < AIR_RGMII_DELAY_NOSTEP ||
val > AIR_RGMII_DELAY_STEP_7) {
val > AIR_RGMII_DELAY_STEP_7) {
dev_err(phydev_dev(phydev),
"airoha,rxclk-delay value %u out of range.",
val);
"airoha,rxclk-delay value %u out of range.",
val);
return -1;
}
priv->rxdelay_force = TRUE;
@@ -574,14 +579,14 @@ static int an8801r_of_init(struct phy_device *phydev)
if (of_property_read_u32(of_node, "airoha,txclk-delay",
&val) != 0) {
dev_err(phydev_dev(phydev),
"airoha,txclk-delay value is invalid.");
"airoha,txclk-delay value is invalid.");
return -1;
}
if (val < AIR_RGMII_DELAY_NOSTEP ||
val > AIR_RGMII_DELAY_STEP_7) {
val > AIR_RGMII_DELAY_STEP_7) {
dev_err(phydev_dev(phydev),
"airoha,txclk-delay value %u out of range.",
val);
"airoha,txclk-delay value %u out of range.",
val);
return -1;
}
priv->txdelay_force = TRUE;
@@ -603,10 +608,10 @@ static int an8801sb_of_init(struct phy_device *phydev)
return -1;
}
if (val < AIR_POL_TX_NOR_RX_REV ||
val > AIR_POL_TX_REV_RX_NOR) {
val > AIR_POL_TX_REV_RX_NOR) {
dev_err(phydev_dev(phydev),
"airoha,polarity value %u out of range.",
val);
"airoha,polarity value %u out of range.",
val);
return -1;
}
priv->pol = val;
@@ -615,15 +620,15 @@ static int an8801sb_of_init(struct phy_device *phydev)
if (of_find_property(of_node, "airoha,surge", NULL)) {
if (of_property_read_u32(of_node, "airoha,surge",
&val) != 0) {
&val) != 0) {
dev_err(phydev_dev(phydev), "airoha,surge value is invalid.");
return -1;
}
if (val < AIR_SURGE_0R ||
val > AIR_SURGE_5R) {
dev_err(phydev_dev(phydev),
"airoha,surge value %u out of range.",
val);
"airoha,surge value %u out of range.",
val);
return -1;
}
priv->surge = val;
@@ -693,23 +698,19 @@ int an8801sb_surge_protect_cfg(struct phy_device *phydev)
u16 cl45_value = 0;
if (priv->surge) {
ret = an8801_cl45_read(phydev, 0x1e, 0x174, &cl45_value);
if (ret < 0)
return ret;
cl45_value = phy_read_mmd(phydev, 0x1e, 0x174);
r50ohm_tx_a = (cl45_value >> 8) & 0x007f;
r50ohm_tx_b = cl45_value & 0x007f;
dev_dbg(phydev_dev(phydev), "Read: (0x174) value=0x%04x r50ohm_tx_a=%d r50ohm_tx_b=%d\n",
cl45_value, r50ohm_tx_a, r50ohm_tx_b);
cl45_value, r50ohm_tx_a, r50ohm_tx_b);
ret = process_r50(phydev, 0x174, &cl45_value, &r50ohm_tx_a, &r50ohm_tx_b);
if (ret < 0)
return ret;
ret = an8801_cl45_read(phydev, 0x1e, 0x175, &cl45_value);
if (ret < 0)
return ret;
cl45_value = phy_read_mmd(phydev, 0x1e, 0x175);
r50ohm_tx_c = (cl45_value >> 8) & 0x007f;
r50ohm_tx_d = cl45_value & 0x007f;
dev_dbg(phydev_dev(phydev), "Read: (0x175) value=0x%04x r50ohm_tx_c=%d r50ohm_tx_d=%d\n",
cl45_value, r50ohm_tx_c, r50ohm_tx_d);
cl45_value, r50ohm_tx_c, r50ohm_tx_d);
ret = process_r50(phydev, 0x175, &cl45_value, &r50ohm_tx_c, &r50ohm_tx_d);
if (ret < 0)
return ret;
@@ -764,10 +765,10 @@ static int an8801sb_config_init(struct phy_device *phydev)
dev_info(phydev_dev(phydev),
"Tx, Rx Polarity : %08x\n", pbus_value);
ret = an8801_cl45_write(phydev, MMD_DEV_VSPEC2, 0x600, 0x1e);
ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC2, 0x601, 0x02);
ret = phy_write_mmd(phydev, MMD_DEV_VSPEC2, 0x600, 0x1e);
ret |= phy_write_mmd(phydev, MMD_DEV_VSPEC2, 0x601, 0x02);
ret |= an8801_cl45_write(phydev, 7, 60, 0x0);
ret |= phy_write_mmd(phydev, 7, 60, 0x0);
if (ret != 0) {
dev_err(phydev_dev(phydev),
"AN8801SB initialize fail, ret %d !\n", ret);
@@ -940,7 +941,7 @@ static ssize_t an8801_polarity_write(struct file *file, const char __user *ptr,
}
static ssize_t an8801_mdio_write(struct file *file, const char __user *ptr,
size_t len, loff_t *off)
size_t len, loff_t *off)
{
struct phy_device *phydev = file->private_data;
char buf[64], param1[32], param2[32];
@@ -955,7 +956,7 @@ static ssize_t an8801_mdio_write(struct file *file, const char __user *ptr,
if (count > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, ptr, len))
return -EFAULT;
return -EFAULT;
ret = sscanf(buf, "%s %s", param1, param2);
if (ret < 0)
@@ -991,16 +992,16 @@ static ssize_t an8801_mdio_write(struct file *file, const char __user *ptr,
pr_notice("\nphy=0x%x, devad=0x%x, reg=0x%x, val=0x%x\n",
phydev_phy_addr(phydev), devad, reg, val);
ret = an8801_cl45_write(phydev, devad, reg, val);
ret = phy_write_mmd(phydev, devad, reg, val);
if (ret < 0)
return ret;
an8801_cl45_read(phydev, devad, reg, &reg_val);
reg_val = phy_read_mmd(phydev, devad, reg);
pr_notice("\nphy=0x%x, devad=0x%x, reg=0x%x, val=0x%x confirm..\n",
phydev_phy_addr(phydev), devad, reg, reg_val);
} else if (!strncmp("r", param2, strlen("r"))) {
if (sscanf(buf, "cl45 r %x %x", &devad, &reg) == -1)
return -EFAULT;
an8801_cl45_read(phydev, devad, reg, &reg_val);
reg_val = phy_read_mmd(phydev, devad, reg);
pr_notice("\nphy=0x%x, devad=0x%x, reg=0x%x, val=0x%x\n",
phydev_phy_addr(phydev), devad, reg, reg_val);
} else {
@@ -1020,7 +1021,6 @@ static int an8801_counter_show(struct seq_file *seq, void *v)
struct phy_device *phydev = seq->private;
int ret = 0;
u32 pkt_cnt = 0;
struct mii_bus *mbus = phydev_mdiobus(phydev);
seq_puts(seq, "==========AIR PHY COUNTER==========\n");
seq_puts(seq, "|\t<<SERDES COUNTER>>\n");
@@ -1143,8 +1143,9 @@ static ssize_t an8801_debugfs_pbus(struct file *file,
if (buf[0] == 'w') {
if (sscanf(buf, "w %x %x", &reg, &val) == -1)
return -EFAULT;
pr_notice("\nphy=0x%x, reg=0x%x, val=0x%x\n",
phydev_phy_addr(phydev), reg, val);
phydev_phy_addr(phydev), reg, val);
ret = air_buckpbus_reg_write(phydev, reg, val);
if (ret < 0)
@@ -1188,10 +1189,9 @@ int an8801_info_show(struct seq_file *seq, void *v)
for (reg = MII_BMCR; reg <= MII_STAT1000; reg++) {
if ((reg <= MII_LPA) || (reg >= MII_CTRL1000))
seq_printf(seq, "| RG_MII 0x%02x : 0x%08x\n",
reg, phy_read(phydev, reg));
reg, phy_read(phydev, reg));
}
seq_puts(seq, "\n");
return 0;
}
@@ -1231,10 +1231,10 @@ static const struct file_operations an8801_polarity_fops = {
};
static const struct file_operations an8801_mdio_fops = {
.owner = THIS_MODULE,
.open = simple_open,
.write = an8801_mdio_write,
.llseek = noop_llseek,
.owner = THIS_MODULE,
.open = simple_open,
.write = an8801_mdio_write,
.llseek = noop_llseek,
};
int an8801_debugfs_init(struct phy_device *phydev)
@@ -1354,13 +1354,22 @@ static int an8801sb_read_status(struct phy_device *phydev)
if (phydev->link == LINK_DOWN) {
prespeed = 0;
phydev->speed = 0;
ret |= an8801_cl45_write(
ret |= phy_write_mmd(
phydev, MMD_DEV_VSPEC2, PHY_PRE_SPEED_REG, prespeed);
mdelay(10); /* delay 10 ms */
reg_value = air_buckpbus_reg_read(phydev, 0x10220010);
reg_value &= 0x7fff;
air_buckpbus_reg_write(phydev, 0x10220010, reg_value);
reg_value = air_buckpbus_reg_read(phydev, 0x10220000);
reg_value |= AN8801SB_SGMII_AN0_ANRESTART;
air_buckpbus_reg_write(phydev, 0x10220000, reg_value);
}
if (prespeed != phydev->speed && phydev->link == LINK_UP) {
prespeed = phydev->speed;
ret |= an8801_cl45_write(
ret |= phy_write_mmd(
phydev, MMD_DEV_VSPEC2, PHY_PRE_SPEED_REG, prespeed);
dev_info(phydev_dev(phydev), "AN8801SB SPEED %d\n", prespeed);
while (an_retry > 0) {
@@ -1374,28 +1383,19 @@ static int an8801sb_read_status(struct phy_device *phydev)
mdelay(10); /* delay 10 ms */
if (phydev->autoneg == AUTONEG_DISABLE) {
dev_info(phydev_dev(phydev),
"AN8801SB force speed = %d\n", prespeed);
if (prespeed == SPEED_1000) {
air_buckpbus_reg_write(
phydev, 0x10220010, 0xd801);
} else if (prespeed == SPEED_100) {
air_buckpbus_reg_write(
phydev, 0x10220010, 0xd401);
} else {
air_buckpbus_reg_write(
phydev, 0x10220010, 0xd001);
}
reg_value = air_buckpbus_reg_read(
phydev, 0x10220000);
reg_value |= AN8801SB_SGMII_AN0_ANRESTART;
if (prespeed == SPEED_1000) {
air_buckpbus_reg_write(
phydev, 0x10220000, reg_value);
phydev, 0x10220010, 0xd801);
} else if (prespeed == SPEED_100) {
air_buckpbus_reg_write(
phydev, 0x10220010, 0xd401);
} else {
air_buckpbus_reg_write(
phydev, 0x10220010, 0xd001);
}
reg_value = air_buckpbus_reg_read(phydev, 0x10220000);
reg_value |= AN8801SB_SGMII_AN0_RESET;
reg_value |= (AN8801SB_SGMII_AN0_RESET | AN8801SB_SGMII_AN0_ANRESTART);
air_buckpbus_reg_write(phydev, 0x10220000, reg_value);
}
return ret;
@@ -1451,9 +1451,12 @@ static struct phy_driver airoha_driver[] = {
.probe = an8801_phy_probe,
.remove = an8801_phy_remove,
.read_status = an8801_read_status,
#if (KERNEL_VERSION(4, 5, 0) < LINUX_VERSION_CODE)
.read_mmd = __an8801_cl45_read,
.write_mmd = __an8801_cl45_write,
.config_intr = an8801_config_intr,
#if (KERNEL_VERSION(5, 11, 0) < LINUX_VERSION_CODE)
.handle_interrupt = an8801_handle_interrupt,
#else
.did_interrupt = an8801_did_interrupt,
.ack_interrupt = an8801_ack_interrupt,
#endif
}
};

View File

@@ -12,10 +12,10 @@
/* NAMING DECLARATIONS
*/
#define AN8801_DRIVER_VERSION "1.1.4"
#define AN8801_DRIVER_VERSION "1.1.6"
#define DEBUGFS_COUNTER "counter"
#define DEBUGFS_INFO "driver_info"
#define DEBUGFS_INFO "driver_info"
#define DEBUGFS_PBUS_OP "pbus_op"
#define DEBUGFS_POLARITY "polarity"
#define DEBUGFS_MDIO "mdio"
@@ -88,7 +88,7 @@
#define LED_BLK_EVT_1000M_RX BIT(1)
#define LED_BLK_EVT_1000M_TX BIT(0)
#define UNIT_LED_BLINK_DURATION 1024
#define UNIT_LED_BLINK_DURATION 780
/* Serdes auto negotation restart */
#define AN8801SB_SGMII_AN0_ANRESTART (0x0200)
@@ -135,6 +135,9 @@ For reference only
#define LED_BLINK_DURATION(f) (UNIT_LED_BLINK_DURATION << (f))
#define LED_GPIO_SEL(led, gpio) ((led) << ((gpio) * 3))
/* Interrupt GPIO number, should not conflict with LED */
#define AIR_INTERRUPT_GPIO 3
/* DATA TYPE DECLARATIONS
*/
enum AIR_LED_GPIO_PIN_T {

View File

@@ -587,7 +587,7 @@ static int en8801s_phase1_init(struct phy_device *phydev)
phydev->dev_flags = PHY_STATE_INIT;
dev_info(dev, "Phase1 initialize OK ! (%s)\n", EN8801S_DRIVER_VERSION);
dev_info(dev, "Phase1 initialize OK ! (%s) 10Te TP_IDL fixed.\n", EN8801S_DRIVER_VERSION);
if (priv->pro_version == 4) {
ret = en8801s_phase2_init(phydev);
if (ret != 0) {
@@ -811,14 +811,7 @@ static int en8801s_phase2_init(struct phy_device *phydev)
retry--;
}
pbus_data = airoha_pbus_read(mbus, pbus_addr, 0x1C38); /* RAW#2 */
ret = airoha_cl45_read(mbus, phy_addr, 0x1E, 0x12, &cl45_value);
if (ret < 0)
return ret;
GPHY_RG_1E_012.DATA = cl45_value;
GPHY_RG_1E_012.DataBitField.da_tx_i2mpb_a_tbt =
(u16)(pbus_data & 0x03f);
ret = airoha_cl45_write(mbus, phy_addr, 0x1E, 0x12,
GPHY_RG_1E_012.DATA);
ret = airoha_cl45_write(mbus, phy_addr, 0x1E, 0x12, 0xA018);
if (ret < 0)
return ret;
ret = airoha_cl45_read(mbus, phy_addr, 0x1E, 0x17, &cl45_value);
@@ -893,6 +886,17 @@ static int en8801s_phase2_init(struct phy_device *phydev)
}
}
//Fix 10Te TP_IDL
ret = airoha_cl45_read(mbus, phy_addr, 0x1E,
0x1A3, &cl45_value);
if (ret < 0)
return ret;
cl45_value &= ~0xf0;
ret = airoha_cl45_write(mbus, phy_addr, 0x1E,
0x1A3, cl45_value);
if (ret < 0)
return ret;
priv->first_init = false;
dev_info(phydev_dev(phydev), "Phase2 initialize OK !\n");
return 0;

View File

@@ -31,7 +31,10 @@ mediatek_setup_interfaces()
;;
sonicfi,rap630w-211g)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
;;
;;
emplus,wap588m)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
*)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;

View File

@@ -8,6 +8,9 @@ boot() {
edgecore,eap112)
bootcount=$(fw_printenv -n bootcount)
[ "$bootcount" != 0 ] && fw_setenv bootcount 0
# enable dualboot
avail=$(fw_printenv -n upgrade_available)
[ ${avail} -eq 0 ] && fw_setenv upgrade_available 1
;;
esac
}

View File

@@ -1,6 +1,6 @@
REQUIRE_IMAGE_METADATA=1
senao_swap_active_fw() {
swap_wap588m_active_fw() {
echo "Doing swap active_fw" > /dev/console
tmp_active_fw=$(fw_printenv | grep active_fw | awk -F= {'print $2'})
if [ $tmp_active_fw == "0" ]; then
@@ -12,6 +12,18 @@ senao_swap_active_fw() {
fi
}
senao_swap_active_fw() {
echo "Doing swap active_fw" > /dev/console
tmp_active_fw=$(fw_printenv -n active_fw)
if [ $tmp_active_fw == "0" ]; then
fw_setenv active_fw 1
fw_setenv mtdparts nmbm0:1024k\(bl2\),512k\(u-boot-env\),2048k\(factory\),2048k\(fip\),112640k\(ubi_1\),112640k\(ubi\),384k\(cert\),640k\(userconfig\),384k\(crashdump\)
else
fw_setenv active_fw 0
fw_setenv mtdparts nmbm0:1024k\(bl2\),512k\(u-boot-env\),2048k\(factory\),2048k\(fip\),112640k\(ubi\),112640k\(ubi_1\),384k\(cert\),640k\(userconfig\),384k\(crashdump\)
fi
}
platform_do_upgrade() {
local board=$(board_name)
@@ -94,5 +106,8 @@ platform_post_upgrade_success() {
senao,jeap6500)
senao_swap_active_fw
;;
emplus,wap588m)
swap_wap588m_active_fw
;;
esac
}

View File

@@ -2,7 +2,6 @@ CONFIG_64BIT=y
CONFIG_AHCI_MTK=y
CONFIG_AIROHA_EN8801SC_PHY=y
# CONFIG_AIROHA_EN8811H_PHY is not set
# CONFIG_AIROHA_AN8801_PHY is not set
CONFIG_AN8855_GSW=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y

View File

@@ -1,15 +1,3 @@
From 535fdc6dfce7def996a5188819ffc96231c36f98 Mon Sep 17 00:00:00 2001
From: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Date: Tue, 2 Jan 2024 18:13:43 +0800
Subject: [PATCH] [networking][999-2738-an8801sb-gphy-support.patch]
---
drivers/net/phy/Kconfig | 5 +
drivers/net/phy/Makefile | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index ccd3f3f..5dbfb17 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -345,6 +345,11 @@ config SFP
@@ -24,8 +12,6 @@ index ccd3f3f..5dbfb17 100644
config AIROHA_EN8801SC_PHY
tristate "Drivers for Airoha EN8801S Gigabit PHYs for MediaTek SoC."
---help---
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 1e8d67b..d39e54b 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -74,6 +74,7 @@ endif
@@ -36,6 +22,64 @@ index 1e8d67b..d39e54b 100644
obj-$(CONFIG_AIROHA_EN8801SC_PHY) += en8801sc.o
air_en8811h-y := air_en8811h_main.o air_en8811h_api.o
obj-$(CONFIG_AIROHA_EN8811H_PHY) += air_en8811h.o
--
2.18.0
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -870,12 +870,17 @@
of_node_put(phy_node);
if (!phy_dev)
- return -ENODEV;
-
+ {
+ phylink_info(pl, "[phylink] reload phy-handle2. %s %d\n",__func__, __LINE__);
+ phy_node = of_parse_phandle(dn, "phy-handle2", 0);
+ phy_dev = of_phy_attach(pl->netdev, phy_node, flags, pl->link_interface);
+ if (!phy_dev)
+ return -ENODEV;
+ }
+
ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
if (ret)
phy_detach(phy_dev);
-
return ret;
}
EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
--- a/drivers/of/of_mdio.c
+++ b/drivers/of/of_mdio.c
@@ -226,7 +226,9 @@
return rc;
/* Loop over the child nodes and register a phy_device for each phy */
+ int an8801=0;
for_each_available_child_of_node(np, child) {
+ if(an8801==1)break;
addr = of_mdio_parse_addr(&mdio->dev, child);
if (addr < 0) {
scanphys = true;
@@ -234,7 +236,25 @@
}
if (of_mdiobus_child_is_phy(child))
+ {
+ if(addr==30)
+ {
+ int phy_id ;
+
+ phy_id = mdiobus_read(mdio, addr, MII_PHYSID1) << 16 ;
+ phy_id = phy_id + mdiobus_read(mdio, addr, MII_PHYSID2);
+ dev_info(&mdio->dev, "[of_mdio] %s %d addr:%d phy_id:0x%x \n",__func__, __LINE__, addr, phy_id);
+
+ if (phy_id==0 || phy_id==0x1a750000)
+ {
+ dev_info(&mdio->dev, "[of_mdio] %s %d continue \n",__func__, __LINE__);
+ continue;
+ }
+ else
+ an8801=1;
+ }
rc = of_mdiobus_register_phy(mdio, child, addr);
+ }
else
rc = of_mdiobus_register_device(mdio, child, addr);

View File

@@ -493,10 +493,22 @@ define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR)/tools
endef
define Build/Install
:
endef
ifdef CONFIG_TARGET_PROFILE
TARGET_PROFILE=$(subst ",,$(CONFIG_TARGET_PROFILE))
PATCH_PROFILE_NAME=patches-$(subst DEVICE_,,$(TARGET_PROFILE))
endif
define Build/Patch
$(Build/Patch/Default)
$(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_PROFILE_NAME)/,profile/)
endef
define Package/kmod-mt76/install
true
endef

View File

@@ -0,0 +1,26 @@
Index: mt76-2024-04-03-1e336a85/mt7915/mt7915.h
===================================================================
--- mt76-2024-04-03-1e336a85.orig/mt7915/mt7915.h
+++ mt76-2024-04-03-1e336a85/mt7915/mt7915.h
@@ -71,8 +71,8 @@
#define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
#define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
-#define MT7915_THERMAL_THROTTLE_MAX 100
-#define MT7915_CDEV_THROTTLE_MAX 99
+#define MT7915_THERMAL_THROTTLE_MAX 80
+#define MT7915_CDEV_THROTTLE_MAX 79
#define MT7915_SKU_RATE_NUM 161
#define MT7915_SKU_PATH_NUM 185
@@ -86,8 +86,8 @@
#define MT7915_CRIT_TEMP_IDX 0
#define MT7915_MAX_TEMP_IDX 1
-#define MT7915_CRIT_TEMP 110
-#define MT7915_MAX_TEMP 120
+#define MT7915_CRIT_TEMP 103
+#define MT7915_MAX_TEMP 118
struct mt7915_vif;
struct mt7915_sta;

View File

@@ -832,6 +832,13 @@ morse_hostapd_add_bss(){
morse_override_hostapd_set_bss_options hostapd_cfg "$_phy" "$vif" || return 1
json_get_vars wds wds_bridge sae_pwe dtim_period max_listen_int start_disabled
local network_config network_values
json_get_values network_values network
network_config=$(echo "$network_values" | cut -d' ' -f1)
if [ "$wds" -gt 0 ] && [ -z "$wds_bridge" ]; then
wds_bridge="${network_config%%[0-9]*}"
fi
raw_block=
json_for_each_item morse_hostapd_add_raw raws

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -53,6 +53,11 @@ $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for RAP750e_h
endef
define Package/ath12k-wifi-sonicfi-rap750e-s
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for RAP750E-S
endef
define Package/ath12k-wifi-sonicfi-rap750w-311a
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for RAP750W_311a
@@ -78,6 +83,15 @@ $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for AP72TIP-v4
endef
define Package/ath12k-wifi-zyxel-nwa130be
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for NWA130BE
endef
define Package/ath12k-wifi-cig-wf672
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for WF672
endef
define Package/ath12k-wifi-cig-wf189/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
@@ -109,6 +123,15 @@ define Package/ath12k-wifi-sonicfi-rap750e-h/install
$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
endef
define Package/ath12k-wifi-sonicfi-rap750e-s/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/
$(INSTALL_DATA) ./board-2.bin.rap750e_s.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.rap750e_s.QCN6432 $(1)/lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin
# $(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/regdb.bin
$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
endef
define Package/ath12k-wifi-sonicfi-rap750w-311a/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/
@@ -149,12 +172,29 @@ define Package/ath12k-wifi-sercomm-ap72tip-v4/install
$(INSTALL_DATA) ./board-2.bin.ap72tip-v4.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef
define Package/ath12k-wifi-zyxel-nwa130be/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.nwa130be.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.nwa130be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef
define Package/ath12k-wifi-cig-wf672/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.wf672.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.wf672.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189))
$(eval $(call BuildPackage,ath12k-wifi-edgecore-eap105))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap7110c-341x))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750e-h))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750e-s))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750w-311a))
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189w))
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189h))
$(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip))
$(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip-v4))
$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa130be))
$(eval $(call BuildPackage,ath12k-wifi-cig-wf672))

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View File

@@ -0,0 +1,29 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=cig-device-boot
PKG_RELEASE:=1
PKG_LICENSE:=GPL-2.0
include $(INCLUDE_DIR)/package.mk
define Package/cig-device-boot
SECTION:=utils
CATEGORY:=Utilities
DEPENDS:=+kmod-usb-serial-xr
TITLE:=CIG device init
endef
define Package/cig-device-boot/description
Initialize particular functions of the CIG device
endef
define Build/Compile
endef
define Package/cig-device-boot/install
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/cig-device.init $(1)/etc/init.d/cig-device-boot
endef
$(eval $(call BuildPackage,cig-device-boot))

View File

@@ -0,0 +1,7 @@
#!/bin/sh /etc/rc.common
START=99
boot(){
[ -e /dev/ttyUSB0 ] && stty -F /dev/ttyUSB0 115200 cs8 -cstopb -parenb -icrnl -onlcr
}

View File

@@ -0,0 +1,25 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=cig-poe-judgment
PKG_RELEASE:=1
PKG_LICENSE:=GPL-2.0
include $(INCLUDE_DIR)/package.mk
define KernelPackage/cig-poe-judgment
SUBMENU:=Other modules
TITLE:=CIG POE judgment
FILES:=$(PKG_BUILD_DIR)/cig_poe_judgment.ko
AUTOLOAD:=$(call AutoLoad,99,cig_poe_judgment)
endef
define KernelPackage/cig-poe-judgment/description
Find POE type
endef
define Build/Compile
$(KERNEL_MAKE) M="$(PKG_BUILD_DIR)" modules
endef
$(eval $(call KernelPackage,cig-poe-judgment))

View File

@@ -0,0 +1 @@
obj-m += cig_poe_judgment.o

View File

@@ -0,0 +1,252 @@
#include <linux/module.h>
#include <linux/device.h>
#include <linux/proc_fs.h>
#include <linux/kthread.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/irqreturn.h>
#include <linux/of_gpio.h>
#include <linux/err.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <asm/uaccess.h>
#define GPIO_MAX 8
#define INT_MODE_MASK 0xf0
#define DETECT_MODE1 0x3
#define DETECT_MODE2 0x4
enum POE_TYPE {
POE_TYPE_AT = 1,
POE_TYPE_AF,
POE_TYPE_BT,
POE_TYPE_DC,
POE_TYPE_MAX
};
struct poe_irq_data
{
struct device *dev;
int irq;
struct tasklet_struct tasklet;
int poe_type;
};
static void *poe_gpio_base;
static void *pse_gpio_base;
struct poe_irq_data *data = NULL;
u32 mode;
static const struct of_device_id my_of_ids[] = {
{.compatible = "poe-judge"},
{},
};
MODULE_DEVICE_TABLE(of,my_of_ids);
static int poe_info_proc_show(struct seq_file *m, void *v)
{
const char *type_str = "invalid";
switch (data->poe_type) {
case POE_TYPE_AT:
type_str = "AT";
break;
case POE_TYPE_AF:
type_str = "AF";
break;
case POE_TYPE_BT:
type_str = "BT";
break;
case POE_TYPE_DC:
type_str = "DC";
break;
}
seq_printf(m, "%s\n", type_str);
return 0;
}
static void poe_tasklet_func(unsigned long data)
{
struct poe_irq_data *irq_data = (struct poe_irq_data *)data;
writel(0x3, pse_gpio_base+4);
irq_data->poe_type = POE_TYPE_BT;
return;
}
static irqreturn_t gpio_key1_irq_handler(int irq, void *dev_id)
{
struct poe_irq_data *data = (struct poe_irq_data *)dev_id;
disable_irq_nosync(data->irq);
tasklet_schedule(&data->tasklet);
return IRQ_HANDLED;
}
static int poe_info_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, poe_info_proc_show, NULL);
}
static const struct proc_ops poe_info_proc_fops = {
.proc_open = poe_info_proc_open,
.proc_read = seq_read,
.proc_lseek = seq_lseek,
.proc_release = single_release,
};
static int gpio_key_probe(struct platform_device *dev)
{
int ret = 0;
int irq = (-1);
int val = 0;
int gpio_id = 0;
int gpio[GPIO_MAX] = {0}, gpio_val[GPIO_MAX] = {0};
int num;
char name[16];
struct device_node *np = dev->dev.of_node;
if (of_property_read_u32(np, "detect-mode", &mode)) {
pr_err("Failed to read detect mode\n");
return -EINVAL;
}
data = devm_kzalloc(&dev->dev, sizeof(struct poe_irq_data), GFP_KERNEL);
if (!data)
{
return -ENOMEM;
}
if (mode & INT_MODE_MASK) {
poe_gpio_base = ioremap(0x1017004, 8);
pse_gpio_base = ioremap(0x1026000, 8);
writel(0x2c1, pse_gpio_base);
writel(0x0, pse_gpio_base+4);
data->dev = &dev->dev;
dev_set_drvdata(&dev->dev, data);
gpio_id = of_get_named_gpio(dev->dev.of_node, "detect_gpio", 0);
if (gpio_id < 0)
{
return -EINVAL;
}
tasklet_init(&data->tasklet, poe_tasklet_func, (unsigned long)data);
ret = devm_gpio_request_one(&dev->dev, gpio_id, GPIOF_IN, "poe_judge");
if(ret)
{
pr_err("GPIO23 request failed, ret:%d\n", ret);
return ret;
}
val = readl(poe_gpio_base);
if(val == 1)
{
pr_info("poe type is af or bt,close pse first\n");
data->poe_type = POE_TYPE_AF;
}
else
{
data->poe_type = POE_TYPE_AT;
}
irq = gpio_to_irq(gpio_id);
data->irq = irq;
ret = devm_request_any_context_irq(&dev->dev, data->irq,
gpio_key1_irq_handler,
IRQF_TRIGGER_FALLING,
"poe_judge", data);
if (ret)
{
pr_err("Request irq fail %d\n", ret);
return ret;
}
} else {
if (mode == DETECT_MODE1 || mode == DETECT_MODE2) {
num = 3;
} else {
pr_err("Wrong poe detect mode\n");
return -ENOMEM;
}
for (int i = 0; i < num; i++) {
sprintf(name, "detect-gpio%d", i+1);
gpio[i] = of_get_named_gpio(np, name, 0);
ret = gpio_request(gpio[i], name);
if (ret) {
pr_err("Can not request gpio %d\n", i+1);
return ret;
}
gpio_direction_input(gpio[i]);
gpio_val[i] = gpio_get_value_cansleep(gpio[i]);
}
if (mode == DETECT_MODE1){
if (gpio_val[0] > 0) {
data->poe_type = POE_TYPE_DC;
} else if (gpio_val[1] > 0){
if (gpio_val[2] == 0) {
data->poe_type = POE_TYPE_AT;
} else {
data->poe_type = POE_TYPE_AF;
}
}
}else if (mode == DETECT_MODE2){
switch (gpio_val[0] | (gpio_val[1] << 1) | (gpio_val[2] << 2)) {
case 3:
data->poe_type = POE_TYPE_AT;
break;
case 4:
data->poe_type = POE_TYPE_BT;
break;
case 7:
data->poe_type = POE_TYPE_AF;
break;
}
}
}
if (!proc_create("poe_info", 0444, NULL, &poe_info_proc_fops)) {
pr_err("Failed to create proc entry for poe_info\n");
return -ENOMEM;
}
return ret;
}
static int gpio_key_remove(struct platform_device *dev)
{
remove_proc_entry("poe_info", NULL);
return 0;
}
static struct platform_driver poe_judge_driver =
{
.driver = {
.name = "poe_judge",
.of_match_table = my_of_ids,
.owner = THIS_MODULE,
},
.probe = gpio_key_probe,
.remove = gpio_key_remove,
};
module_platform_driver(poe_judge_driver);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Poe type judgment driver");
MODULE_AUTHOR("huangyunxiang<huangyunxiang@cigtech.com>");

View File

@@ -0,0 +1,30 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=cig-wifi-mode-switch
PKG_RELEASE:=1
PKG_LICENSE:=GPL-2.0
include $(INCLUDE_DIR)/package.mk
define KernelPackage/cig-wifi-mode-sw
SUBMENU:=Other modules
TITLE:=CIG wifi mode switch tool
FILES:=$(PKG_BUILD_DIR)/cig_rf_switch.ko
AUTOLOAD:=$(call AutoLoad,60,cig_rf_switch)
endef
define KernelPackage/cig-wifi-mode-sw/description
CIG wifi mode switch tool for configure wifi mode 2 bands or 3 bands
endef
define Build/Compile
$(KERNEL_MAKE) M="$(PKG_BUILD_DIR)" modules
endef
define KernelPackage/cig-wifi-mode-sw/install
$(INSTALL_DIR) $(1)/usr/sbin/
$(INSTALL_BIN) ./files/cig_wifi_mode_sw $(1)/usr/sbin/cig_wms
endef
$(eval $(call KernelPackage,cig-wifi-mode-sw))

View File

@@ -0,0 +1,11 @@
#!/bin/sh
band=$1
if [ $band -eq 2 ] || [ $band -eq 3 ]; then
echo $band > /proc/rf_switch
echo "firstboot for switch wifi mode 2/3 bands"
sleep 1
firstboot -y -r
else
echo "error band param"
fi

View File

@@ -0,0 +1 @@
obj-m += cig_rf_switch.o

View File

@@ -0,0 +1,276 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/mmc/core.h>
#include <linux/mmc/host.h>
#include <linux/major.h>
#include <linux/mmc/mmc.h>
#include <linux/mmc/card.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/uaccess.h>
#include <linux/list.h>
#include <linux/pagemap.h>
#define PROC_NAME "rf_switch"
#define PARTITION_NAME "RF_SWITCH"
#define MAX_DATA_SIZE 2
#define MAX_MMC_DEVICE 2
struct block_device *target_bdev = NULL;
static char current_value[MAX_DATA_SIZE] = "3";
static unsigned int __blkdev_sectors_to_bio_pages(sector_t nr_sects)
{
sector_t pages = DIV_ROUND_UP_SECTOR_T(nr_sects, PAGE_SIZE / 512);
return min(pages, (sector_t)BIO_MAX_VECS);
}
struct block_device *find_mmc_partition(void)
{
struct gendisk *disk = NULL;
unsigned long idx;
struct block_device *bdev = NULL;
unsigned int i;
for (i = 0; i < MAX_MMC_DEVICE; i++) {
bdev = blkdev_get_by_dev(MKDEV(MMC_BLOCK_MAJOR, i * CONFIG_MMC_BLOCK_MINORS), FMODE_READ | FMODE_WRITE, NULL);
if (IS_ERR(bdev)) {
pr_err("Failed to open MMC device %u: %ld\n", i, PTR_ERR(bdev));
continue;
}
disk = bdev->bd_disk;
if (!disk) {
blkdev_put(bdev, FMODE_READ | FMODE_WRITE);
continue;
}
xa_for_each_start(&disk->part_tbl, idx, bdev, 1) {
if (bdev->bd_meta_info && strcmp(bdev->bd_meta_info->volname, PARTITION_NAME) == 0) {
pr_info("Found RF_SWITCH partition at device %u\n", i);
return bdev;
}
}
blkdev_put(bdev, FMODE_READ | FMODE_WRITE);
}
return NULL;
}
int read_string_from_emmc(struct block_device *bdev, size_t max_length, char *buffer)
{
struct bio *bio;
struct page *page;
int err = 0;
void *data;
page = alloc_page(GFP_KERNEL);
if (!page) {
return -ENOMEM;
}
bio = bio_alloc(bdev, __blkdev_sectors_to_bio_pages(1), REQ_OP_READ, GFP_KERNEL);
bio_set_dev(bio, bdev);
bio->bi_iter.bi_sector = 0;
bio_add_page(bio, page, PAGE_SIZE, 0);
submit_bio_wait(bio);
if (bio->bi_status) {
err = -EIO;
goto out_bio;
}
data = kmap(page);
kunmap(page);
memcpy(buffer, data, max_length - 1);
buffer[max_length - 1] = '\0';
out_bio:
bio_put(bio);
__free_page(page);
return err;
}
static int rf_switch_proc_show(struct seq_file *m, void *v)
{
char buffer[MAX_DATA_SIZE] = {0};
int ret;
ret = read_string_from_emmc(target_bdev, MAX_DATA_SIZE, buffer);
if (ret) {
seq_printf(m, "%s\n", current_value);
return 0;
}
if (strcmp(buffer, "2") == 0 || strcmp(buffer, "3") == 0) {
strncpy(current_value, buffer, MAX_DATA_SIZE);
seq_printf(m, "%s\n", current_value);
} else {
seq_printf(m, "%s\n", current_value);
}
return 0;
}
static int blkdev_issue_write(struct block_device *bdev, sector_t sector, sector_t nr_sects, gfp_t gfp_mask, struct page *page)
{
int ret = 0;
sector_t bs_mask;
struct bio *bio;
int bi_size = 0;
unsigned int sz;
if (bdev_read_only(bdev))
return -EPERM;
bs_mask = (bdev_logical_block_size(bdev) >> 9) - 1;
if ((sector | nr_sects) & bs_mask)
return -EINVAL;
bio = bio_alloc(bdev, __blkdev_sectors_to_bio_pages(nr_sects),
REQ_OP_WRITE, gfp_mask);
if (!bio) {
pr_err("Couldn't alloc bio");
return -1;
}
bio->bi_iter.bi_sector = sector;
bio_set_dev(bio, bdev);
bio_set_op_attrs(bio, REQ_OP_WRITE, 0);
sz = bdev_logical_block_size(bdev);
bi_size = bio_add_page(bio, page, sz, 0);
if(bi_size != sz) {
pr_err("Couldn't add page to the log block");
goto error;
}
if (bio)
{
ret = submit_bio_wait(bio);
bio_put(bio);
}
return ret;
error:
bio_put(bio);
return -1;
}
static int write_data_to_emmc(struct block_device *bdev, const unsigned char *data, unsigned char fill_byte)
{
struct page *page;
void *ptr;
sector_t sector_offset = 0;
int ret = 0;
if (!bdev || !data)
return -EINVAL;
page = alloc_page(GFP_KERNEL);
if (!page) {
pr_err("Failed to allocate page\n");
return -ENOMEM;
}
ptr = kmap_atomic(page);
memcpy(ptr, data, MAX_DATA_SIZE);
memset(ptr + MAX_DATA_SIZE, fill_byte, 512-MAX_DATA_SIZE);
kunmap_atomic(ptr);
ret = blkdev_issue_write(bdev, sector_offset , 1 ,GFP_ATOMIC, page);
if (ret) {
pr_err("Failed to write to eMMC at offset 0: %d\n", ret);
__free_page(page);
return ret;
}
sync_blockdev(bdev);
__free_page(page);
return ret;
}
static ssize_t rf_switch_proc_write(struct file *file, const char __user *user_buffer, size_t count, loff_t *ppos)
{
unsigned char buffer[MAX_DATA_SIZE] = {0};
int ret;
if (count != MAX_DATA_SIZE)
return -EINVAL;
if (copy_from_user(buffer, user_buffer, count))
return -EFAULT;
buffer[count -1] = '\0';
if (strcmp(buffer, "2") != 0 && strcmp(buffer, "3") != 0) {
pr_err("Invalid value: %s. Only '2' or '3' are allowed.\n", buffer);
return -EINVAL;
}
ret = write_data_to_emmc(target_bdev, buffer, 0xFF);
if (ret) {
pr_err("Failed to write to RF_SWITCH\n");
return ret;
}
strncpy(current_value, buffer, MAX_DATA_SIZE);
return count;
}
static int rf_switch_proc_open(struct inode *inode, struct file *file)
{
return single_open(file, rf_switch_proc_show, NULL);
}
static const struct proc_ops rf_switch_proc_fops = {
.proc_open = rf_switch_proc_open,
.proc_read = seq_read,
.proc_write = rf_switch_proc_write,
.proc_lseek = seq_lseek,
.proc_release = single_release,
};
static int __init rf_switch_init(void)
{
target_bdev = find_mmc_partition();
if (!target_bdev) {
pr_err("Failed to find eMMC card or RF_SWITCH partition\n");
return -ENOMEM;
}
if (!proc_create(PROC_NAME, 0666, NULL, &rf_switch_proc_fops)) {
pr_err("Failed to create proc entry\n");
return -ENOMEM;
}
pr_info("RF_SWITCH partition proc interface created\n");
return 0;
}
static void __exit rf_switch_exit(void)
{
if (target_bdev) {
blkdev_put(target_bdev, FMODE_READ | FMODE_WRITE);
target_bdev = NULL;
}
remove_proc_entry(PROC_NAME, NULL);
pr_info("RF_SWITCH partition proc interface removed\n");
}
module_init(rf_switch_init);
module_exit(rf_switch_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Yunxiang Huang");
MODULE_DESCRIPTION("RF_SWITCH partition read/write driver");

View File

@@ -121,8 +121,6 @@ hostapd_common_add_device_config() {
config_add_boolean legacy_rates
config_add_int cell_density
config_add_int rts_threshold
config_add_int rssi_reject_assoc_rssi
config_add_int rssi_ignore_probe_request
config_add_int maxassoc
config_add_int reg_power_type
config_add_boolean stationary_ap
@@ -147,7 +145,7 @@ hostapd_prepare_device_config() {
json_get_vars country country3 country_ie beacon_int:100 dtim_period:2 doth require_mode legacy_rates \
acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc \
rts_threshold beacon_rate maxassoc \
rnr_beacon mbssid:0 band reg_power_type stationary_ap acs_exclude_dfs\
maxassoc_ignore_probe band
@@ -244,8 +242,6 @@ hostapd_prepare_device_config() {
hostapd_add_rate brlist "$br"
done
[ -n "$rssi_reject_assoc_rssi" ] && append base_cfg "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
[ -n "$rssi_ignore_probe_request" ] && append base_cfg "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"
[ -n "$brlist" ] && append base_cfg "basic_rates=$brlist" "$N"
@@ -427,6 +423,9 @@ hostapd_common_add_bss_config() {
config_add_boolean apup
config_add_string apup_peer_ifname_prefix
config_add_int rssi_reject_assoc_rssi
config_add_int rssi_ignore_probe_request
}
hostapd_set_vlan_file() {
@@ -680,7 +679,8 @@ hostapd_set_bss_options() {
ppsk airtime_bss_weight airtime_bss_limit airtime_sta_weight \
multicast_to_unicast_all proxy_arp per_sta_vif \
eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id radius_server_clients radius_server_auth_port \
vendor_elements fils ocv apup uci_section dynamic_probe_resp multi_psk
vendor_elements fils ocv apup uci_section dynamic_probe_resp multi_psk \
rssi_reject_assoc_rssi rssi_ignore_probe_request
set_default fils 0
set_default isolate 0
@@ -737,6 +737,8 @@ hostapd_set_bss_options() {
append bss_conf "uapsd_advertisement_enabled=$uapsd" "$N"
append bss_conf "utf8_ssid=$utf8_ssid" "$N"
append bss_conf "multi_ap=$multi_ap" "$N"
[ -n "$rssi_reject_assoc_rssi" ] && append bss_conf "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
[ -n "$rssi_ignore_probe_request" ] && append bss_conf "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
[ -n "$vendor_elements" ] && append bss_conf "vendor_elements=$vendor_elements" "$N"
[ "$tdls_prohibit" -gt 0 ] && append bss_conf "tdls_prohibit=$tdls_prohibit" "$N"
@@ -775,11 +777,16 @@ hostapd_set_bss_options() {
set_default sae_require_mfp 1
[ "$ppsk" -eq 0 ] && set_default sae_pwe 2
;;
psk-sae|psk2-radius|eap-eap2)
psk-sae|eap-eap2)
set_default ieee80211w 1
set_default sae_require_mfp 1
[ "$ppsk" -eq 0 ] && set_default sae_pwe 2
;;
psk2-radius)
set_default ieee80211w 1
set_default sae_require_mfp 0
[ "$ppsk" -eq 0 ] && set_default sae_pwe 4
;;
esac
[ -n "$sae_require_mfp" ] && append bss_conf "sae_require_mfp=$sae_require_mfp" "$N"
[ -n "$sae_pwe" ] && append bss_conf "sae_pwe=$sae_pwe" "$N"

View File

@@ -144,7 +144,7 @@ function netifd_reload() {
push(ssid.interfaces, iface.ifname);
ssid.bands[band] = iface.ifname;
ssid.mpsk = config.multi_psk;
ssid.mpsk = ssid?.mpsk ? true : config.multi_psk;
for (let sta in iface.stations) {
let stacfg = sta.config;
@@ -308,18 +308,18 @@ function sta_auth_cache(ifname, addr, idx, phrase) {
function auth_cb(msg) {
let data = msg.data;
if (!is_ssid_mpsk(data.iface))
return;
printf(`Event ${msg.type}: ${msg.data}\n`);
switch (msg.type) {
case 'sta_auth':
if (!is_ssid_mpsk(data.iface))
return;
return {
psk: sta_auth_psk(data.iface, data.sta),
force_psk: true,
};
case 'sta_connected':
if (data.psk_idx == null)
if (data.psk_idx == null || !is_ssid_mpsk(data.iface))
return;
return sta_auth_cache(data.iface, data.sta, data.psk_idx, data.psk);
case 'reload':

View File

@@ -0,0 +1,14 @@
--- a/src/ap/beacon.c
+++ b/src/ap/beacon.c
@@ -934,8 +934,10 @@ void handle_probe_req(struct hostapd_dat
int ubus_response;
if (hapd->iconf->rssi_ignore_probe_request && ssi_signal &&
- ssi_signal < hapd->iconf->rssi_ignore_probe_request)
+ ssi_signal < hapd->iconf->rssi_ignore_probe_request) {
+ hostapd_ubus_notify_rssi(hapd, "rssi-ignore-probe", mgmt->sa, ssi_signal);
return;
+ }
if (len < IEEE80211_HDRLEN)
return;

View File

@@ -1,3 +1,4 @@
unchanged:
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -3003,6 +3003,8 @@ static int hostapd_config_fill(struct ho
@@ -9,12 +10,10 @@
#endif /* CONFIG_IEEE80211R_AP */
#ifndef CONFIG_NO_CTRL_IFACE
} else if (os_strcmp(buf, "ctrl_interface") == 0) {
@@ -4958,8 +4960,22 @@ int hostapd_set_iface(struct hostapd_con
return -1;
}
@@ -4982,6 +4982,19 @@ struct hostapd_config * hostapd_config_r
fclose(f);
- for (i = 0; i < conf->num_bss; i++)
+ for (i = 0; i < conf->num_bss; i++) {
for (i = 0; i < conf->num_bss; i++) {
+ if (*conf->bss[i]->ft_key) {
+ u8 buffer[128];
+ sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X %02X%02X%02X%02X%02X%02X %s", MAC2STR(conf->bss[i]->bssid), MAC2STR(conf->bss[i]->bssid), conf->bss[i]->ft_key);
@@ -25,14 +24,12 @@
+ add_r0kh(conf->bss[i], buffer);
+ sprintf(buffer, "00:00:00:00:00:00 00:00:00:00:00:00 %s", conf->bss[i]->ft_key);
+ add_r1kh(conf->bss[i], buffer);
+ hexstr2bin(conf->bss[i]->bssid, conf->bss[i]->r1_key_holder, FT_R1KH_ID_LEN);
+ hexstr2bin(conf->bss[i]->bssid, conf->bss[i]->r1_key_holder, FT_R1KH_ID_LEN);
+ conf->bss[i]->r0_key_holder_bssid = 1;
+ }
hostapd_set_security_params(conf->bss[i], 0);
+ }
if (hostapd_config_check(conf, 0)) {
wpa_printf(MSG_ERROR, "Configuration check failed");
hostapd_set_security_params(conf->bss[i], 1);
#ifdef CONFIG_IEEE80211BE
if (conf->ieee80211be && conf->bss[i]->ieee80211w > 0
--- a/src/ap/ap_config.h
+++ b/src/ap/ap_config.h
@@ -398,6 +398,7 @@ struct hostapd_bss_config {

View File

@@ -0,0 +1,11 @@
--- a/src/drivers/driver_nl80211.c
+++ b/src/drivers/driver_nl80211.c
@@ -127,7 +127,7 @@ static void nl80211_register_eloop_read(
*/
int err;
- err = nl_socket_set_buffer_size(*handle, 262144, 0);
+ err = nl_socket_set_buffer_size(*handle, 1048576, 0);
if (err < 0) {
wpa_printf(MSG_DEBUG,
"nl80211: Could not set nl_socket RX buffer size: %s",

View File

@@ -1923,6 +1923,21 @@ void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *
ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
}
void hostapd_ubus_notify_rssi(struct hostapd_data *hapd, const char *type, const u8 *addr, int rssi)
{
if (!hapd->ubus.obj.has_subscribers)
return;
if (!addr)
return;
blob_buf_init(&b, 0);
blobmsg_add_macaddr(&b, "address", addr);
blobmsg_add_u32(&b, "rssi", rssi);
ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1);
}
void hostapd_ubus_notify_csa(struct hostapd_data *hapd, int freq)
{
if (!hapd->ubus.obj.has_subscribers)

View File

@@ -56,6 +56,7 @@ void hostapd_ubus_notify_beacon_report(struct hostapd_data *hapd,
size_t len);
void hostapd_ubus_notify_radar_detected(struct hostapd_iface *iface, int frequency,
int chan_width, int cf1, int cf2);
void hostapd_ubus_notify_rssi(struct hostapd_data *hapd, const char *type, const u8 *addr, int rssi);
void hostapd_ubus_notify_bss_transition_response(
struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 status_code,

View File

@@ -785,6 +785,7 @@ int hostapd_ucode_sta_auth(struct hostapd_data *hapd, struct sta_info *sta)
void hostapd_ucode_sta_connected(struct hostapd_data *hapd, struct sta_info *sta)
{
struct hostapd_sta_wpa_psk_short *psk = sta->psk;
char addr[sizeof(MACSTR)];
uc_value_t *val, *cur;
int ret = 0;
@@ -801,6 +802,8 @@ void hostapd_ucode_sta_connected(struct hostapd_data *hapd, struct sta_info *sta
val = ucv_object_new(vm);
if (sta->psk_idx)
ucv_object_add(val, "psk_idx", ucv_int64_new(sta->psk_idx - 1));
if (sta->psk)
ucv_object_add(val, "psk", ucv_string_new(sta->psk->passphrase));
uc_value_push(ucv_get(val));
val = wpa_ucode_call(3);

View File

@@ -15,6 +15,7 @@ sercomm,ap72tip)
;;
sonicfi,rap7110c-341x|\
sonicfi,rap750e-h|\
sonicfi,rap750e-s|\
sonicfi,rap750w-311a)
ucidef_set_led_default "power" "POWER" "pwm:blue" "on"
;;

View File

@@ -13,13 +13,15 @@ ipq53xx_setup_interfaces()
ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5" "eth0"
;;
cig,wf189|\
cig,wf672|\
edgecore,eap105|\
sercomm,ap72tip|\
sonicfi,rap750w-311a)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
sonicfi,rap7110c-341x|\
sonicfi,rap750e-h)
sonicfi,rap750e-h|\
sonicfi,rap750e-s)
ucidef_set_interfaces_lan_wan "" "eth0"
;;
cig,wf189w)
@@ -33,6 +35,9 @@ ipq53xx_setup_interfaces()
sercomm,ap72tip-v4)
ucidef_set_interface_wan "eth0"
;;
zyxel,nwa130be)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
esac
}
@@ -40,21 +45,35 @@ qcom_setup_macs()
{
local board="$1"
case $board in
cig,wf189w|\
cig,wf189h|\
cig,wf189w|\
cig,wf189h|\
cig,wf189)
mtd=$(find_mtd_chardev "0:APPSBLENV")
[ -z "$mtd" ] && return;
mac=$(grep eth1addr= $mtd | cut -d= -f2)
mtd=$(find_mtd_chardev "0:APPSBLENV")
[ -z "$mtd" ] && return;
mac=$(grep eth1addr= $mtd | cut -d= -f2)
[ -z "$mac" ] && return;
wan_mac=$(macaddr_canonicalize $mac)
lan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_network_device_mac eth0 $wan_mac
ucidef_set_network_device_mac eth1 $lan_mac
ucidef_set_label_macaddr $wan_mac
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
;;
cig,wf672)
mmc=$(find_mmc_part "0:APPSBLENV")
[ -z "$mmc" ] && return;
mac=$(grep eth1addr= $mmc | cut -d= -f2)
[ -z "$mac" ] && return;
wan_mac=$(macaddr_canonicalize $mac)
lan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_network_device_mac eth0 $wan_mac
ucidef_set_network_device_mac eth1 $lan_mac
ucidef_set_label_macaddr $wan_mac
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
;;
sercomm,ap72tip)
wan_mac=$(cat /sys/class/net/eth0/address)
@@ -66,13 +85,17 @@ qcom_setup_macs()
edgecore,eap105)
wan_mac=$(cat /sys/class/net/eth0/address)
lan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
;;
sonicfi,rap7110c-341x|\
sonicfi,rap750e-h)
sonicfi,rap750e-h|\
sonicfi,rap750e-s)
wan_mac=$(cat /sys/class/net/eth0/address)
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 1)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 2)
[ "$board" = "sonicfi,rap7110c-34x" ] &&
[ "$board" = "sonicfi,rap7110c-341x" ] &&
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 3)
;;
sonicfi,rap750w-311a)
@@ -87,6 +110,19 @@ qcom_setup_macs()
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 3)
;;
zyxel,nwa130be)
wan_mac=$(cat /proc/cmdline)
wan_mac="${wan_mac##*hwaddr=}"
wan_mac="${wan_mac%% *}"
wan_mac="$(echo ${wan_mac} | sed 's/\(..\)/\1:/g;s/:$//')"
lan_mac=$(macaddr_add "$wan_mac" 1)
ucidef_set_network_device_mac eth0 $wan_mac
ucidef_set_network_device_mac eth1 $lan_mac
ucidef_set_label_macaddr $wan_mac
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
;;
*)
wan_mac=$(cat /sys/class/net/eth1/address)
lan_mac=$(macaddr_add "$wan_mac" 1)

View File

@@ -23,6 +23,39 @@ caldata_extract() {
caldata_die "failed to extract calibration data from $mtd"
}
cig_ipq5322_cal() {
local ext_ant=0
[ -f /sys/firmware/devicetree/base/soc@0/wifi@c0000000/ext_antenna ] && ext_ant=1
if [ "$ext_ant" = "0" ]; then
caldata_extract_mmc "0:ART" 0x1000 0x20000
else
caldata_extract_mmc "0:ART" 0xbd800 0x20000
fi
}
cig_qcn92xx_cal() {
local bands=$(cat /proc/rf_switch)
local ext_ant=0
[ -f /sys/firmware/devicetree/base/soc@0/wifi@c0000000/ext_antenna ] && ext_ant=1
if [ "$bands" = "2" ]; then
if [ "$ext_ant" = "0" ]; then
caldata_extract_mmc "0:ART" 0x8b800 0x2d000
else
caldata_extract_mmc "0:ART" 0xe3000 0x2d000
fi
else
if [ "$ext_ant" = "0" ]; then
caldata_extract_mmc "0:ART" 0x58800 0x2d000
else
caldata_extract_mmc "0:ART" 0x115000 0x2d000
fi
fi
}
board=$(board_name)
case "$FIRMWARE" in
ath12k/IPQ5332/hw1.0/caldata.bin)
@@ -32,13 +65,18 @@ ath12k/IPQ5332/hw1.0/caldata.bin)
cig,wf189|\
edgecore,eap105|\
sercomm,ap72tip-v4|\
sercomm,ap72tip)
sercomm,ap72tip|\
zyxel,nwa130be)
caldata_extract "0:ART" 0x1000 0x20000
;;
cig,wf672)
cig_ipq5322_cal
;;
sonicfi,rap7110c-341x)
caldata_extract_mmc "0:ART" 0x1000 0xF800
;;
sonicfi,rap750e-h|\
sonicfi,rap750e-s|\
sonicfi,rap750w-311a)
caldata_extract "0:ART" 0x1000 0xf800
;;
@@ -49,9 +87,13 @@ ath12k/QCN92XX/hw1.0/cal-pci-0001:01:00.0.bin)
cig,wf189|\
edgecore,eap105|\
sercomm,ap72tip-v4|\
sercomm,ap72tip)
sercomm,ap72tip|\
zyxel,nwa130be)
caldata_extract "0:ART" 0x58800 0x2d000
;;
cig,wf672)
cig_qcn92xx_cal
;;
sonicfi,rap7110c-341x)
caldata_extract_mmc "0:ART" 0x58800 0x2d000
;;
@@ -60,6 +102,7 @@ ath12k/QCN92XX/hw1.0/cal-pci-0001:01:00.0.bin)
ath12k/QCN6432/hw1.0/caldata_1.bin)
case "$board" in
sonicfi,rap750e-h|\
sonicfi,rap750e-s|\
sonicfi,rap750w-311a)
caldata_extract "0:ART" 0x12800 0x18800
;;

View File

@@ -0,0 +1,20 @@
# /etc/hotplug.d/iface/85-greqos
[ "$ACTION" == "ifup" ] || exit 0
. /lib/functions.sh
case "$(board_name)" in
cig,wf189|\
cig,wf189w|\
cig,wf189h|\
cig,wf672)
case "$INTERFACE" in
gre*)
dev=$(ubus call network.interface.$INTERFACE status | jsonfilter -e '@.l3_device')
[ -n "$dev" ] && {
tc qdisc del dev $dev root 2>/dev/null
tc qdisc add dev $dev root noqueue
}
;;
esac
esac

View File

@@ -0,0 +1,22 @@
#!/bin/sh /etc/rc.common
START=99
boot() {
. /lib/functions.sh
case "$(board_name)" in
edgecore,eap105)
ssdk_sh debug phy set 0x1 0x601FD032 0xff
;;
zyxel,nwa130be)
#eth0: APPE: phyaddr 4 green:2.5G orange:others
ssdk_sh debug phy set 4 0x40078074 0x670
ssdk_sh debug phy set 4 0x40078078 0x8600
#eth1: MHT: phyaddr 3 green:2.5G orange:others
ssdk_sh debug phy set 3 0x40078074 0x670
ssdk_sh debug phy set 3 0x40078078 0x8600
;;
esac
}

View File

@@ -57,6 +57,52 @@ sonicfi_dualimage_check() {
fi
}
spi_nor_emmc_do_upgrade_bootconfig() {
local tar_file="$1"
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
board_dir=${board_dir%/}
[ -f /proc/boot_info/bootconfig0/getbinary_bootconfig ] || {
echo "bootconfig does not exist"
exit
}
CI_ROOTPART="$(cat /proc/boot_info/bootconfig0/rootfs/upgradepartition)"
CI_KERNPART="$(cat /proc/boot_info/bootconfig0/0:HLOS/upgradepartition)"
[ -n "$CI_KERNPART" -a -n "$CI_ROOTPART" ] || {
echo "kernel or rootfs partition is unknown"
exit
}
local primary="0"
[ "$(cat /proc/boot_info/bootconfig0/rootfs/primaryboot)" = "0" ] && primary="1"
echo "$primary" > /proc/boot_info/bootconfig0/rootfs/primaryboot 2>/dev/null
echo "$primary" > /proc/boot_info/bootconfig0/0:HLOS/primaryboot 2>/dev/null
cp /proc/boot_info/bootconfig0/getbinary_bootconfig /tmp/bootconfig
do_flash_emmc $tar_file $CI_KERNPART $board_dir kernel
do_flash_emmc $tar_file $CI_ROOTPART $board_dir root
local emmcblock="$(find_mmc_part "rootfs_data")"
if [ -e "$emmcblock" ]; then
mkfs.ext4 -F "$emmcblock"
fi
for part in "0:BOOTCONFIG" "0:BOOTCONFIG1"; do
local mtdchar=$(echo $(find_mtd_chardev $part) | sed 's/^.\{5\}//')
if [ -n "$mtdchar" ]; then
echo start to update $mtdchar
mtd -qq write /proc/boot_info/bootconfig0/getbinary_bootconfig "/dev/${mtdchar}" 2>/dev/null && echo update mtd $mtdchar
else
emmcblock=$(find_mmc_part $part)
echo erase ${emmcblock}
dd if=/dev/zero of=${emmcblock} 2> /dev/null
echo update $emmcblock
dd if=/tmp/bootconfig of=${emmcblock} 2> /dev/null
fi
done
}
emmc_do_upgrade() {
local tar_file="$1"
local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
@@ -86,6 +132,8 @@ platform_do_upgrade() {
board=$(board_name)
case $board in
sercomm,ap72tip-v4|\
sercomm,ap72tip|\
cig,wf189w|\
cig,wf189h|\
cig,wf189)
@@ -98,6 +146,9 @@ platform_do_upgrade() {
fi
nand_upgrade_tar "$1"
;;
cig,wf672)
spi_nor_emmc_do_upgrade_bootconfig $1
;;
edgecore,eap105)
if [ "$(find_mtd_chardev rootfs)" ]; then
CI_UBIPART="rootfs"
@@ -117,12 +168,12 @@ platform_do_upgrade() {
emmc_do_upgrade "$1"
;;
sonicfi,rap750e-h|\
sonicfi,rap750e-s|\
sonicfi,rap750w-311a)
sonicfi_dualimage_check
nand_upgrade_tar "$1"
;;
sercomm,ap72tip-v4|\
sercomm,ap72tip)
zyxel,nwa130be)
nand_upgrade_tar "$1"
;;
esac

View File

@@ -1223,3 +1223,6 @@ CONFIG_PSTORE=y
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_PMSG=y
CONFIG_PSTORE_RAM=y
# CONFIG_RTL8221D_PHY is not set
# CONFIG_INPUT_LSM303AGR is not set
# CONFIG_USB_SERIAL_XR is not set

View File

@@ -18,6 +18,21 @@
model = "CIG WF189";
compatible = "cig,wf189", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332-rdp468", "qcom,ipq5332";
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ramoops@49c00000 {
compatible = "ramoops";
no-map;
reg = <0x0 0x49c00000 0x0 0x50000>;
record-size = <0x20000>;
console-size = <0x8000>;
pmsg-size = <0x8000>;
};
};
aliases {
serial0 = &blsp1_uart0;
serial1 = &blsp1_uart1;
@@ -221,6 +236,15 @@
};
};
poe {
compatible = "poe-judge";
detect-mode = <0x3>;
detect-gpio1 = <&tlmm 25 GPIO_ACTIVE_HIGH>;
detect-gpio2 = <&tlmm 43 GPIO_ACTIVE_HIGH>;
detect-gpio3 = <&tlmm 29 GPIO_ACTIVE_HIGH>;
status = "ok";
};
wsi: wsi {
id = <0>;
num_chip = <2>;

View File

@@ -85,6 +85,15 @@
/delete-node/ wcnss@4a900000;
/delete-node/ q6_caldb_region@4ce00000;
ramoops@49c00000 {
compatible = "ramoops";
no-map;
reg = <0x0 0x49c00000 0x0 0x50000>;
record-size = <0x20000>;
console-size = <0x8000>;
pmsg-size = <0x8000>;
};
q6_mem_regions: q6_mem_regions@4A900000 {
reg = <0x0 0x4a900000 0x0 0x6D00000>;
no-map;
@@ -298,6 +307,13 @@
};
};
poe {
compatible = "poe-judge";
detect-mode = <0x11>;
detect_gpio = <&tlmm 0x17 0>;
status = "ok";
};
ess-instance {
num_devices = <0x2>;

View File

@@ -85,6 +85,15 @@
/delete-node/ wcnss@4a900000;
/delete-node/ q6_caldb_region@4ce00000;
ramoops@49c00000 {
compatible = "ramoops";
no-map;
reg = <0x0 0x49c00000 0x0 0x50000>;
record-size = <0x20000>;
console-size = <0x8000>;
pmsg-size = <0x8000>;
};
q6_mem_regions: q6_mem_regions@4A900000 {
reg = <0x0 0x4a900000 0x0 0x6D00000>;
no-map;
@@ -298,6 +307,13 @@
};
};
poe {
compatible = "poe-judge";
detect-mode = <0x11>;
detect_gpio = <&tlmm 0x17 0>;
status = "ok";
};
ess-instance {
num_devices = <0x2>;

View File

@@ -0,0 +1,580 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ5332 RDP468 board device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "ipq5332.dtsi"
#include "ipq5332-default-memory.dtsi"
/ {
model = "CIG WF672";
compatible = "cig,wf672", "qcom,ipq5332-rdp468", "qcom,ipq5332";
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ramoops@49c00000 {
compatible = "ramoops";
no-map;
reg = <0x0 0x49c00000 0x0 0x50000>;
record-size = <0x20000>;
console-size = <0x8000>;
pmsg-size = <0x8000>;
};
};
aliases {
serial0 = &blsp1_uart0;
serial1 = &blsp1_uart1;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
chosen {
stdout-path = "serial0";
};
soc@0 {
mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
/*gpio51 for manhattan reset*/
phy-reset-gpio = <&tlmm 21 GPIO_ACTIVE_LOW>;
phyaddr_fixup = <0xC90F018>;
uniphyaddr_fixup = <0xC90F014>;
mdio_clk_fixup; /* MDIO clock sequence fix up flag */
status = "okay";
phy0: ethernet-phy@0 {
reg = <1>;
compatible ="ethernet-phy-ieee802.3-c45";
fixup;
};
phy1: ethernet-phy@1 {
reg = <30>;
fixup;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@3a000000 {
pinctrl-0 = <&sfp_pins>;
pinctrl-names = "default";
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x2>; /* lan port bitmap */
switch_wan_bmp = <0x4>; /* wan port bitmap */
switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <1>;
ethernet-phy-ieee802.3-c45;
forced-speed = <2500>;
forced-duplex = <1>;
mdiobus = <&mdio>;
};
port@1 {
port_id = <2>;
phy_address = <30>;
phy_i2c_address =<30>;
phy-i2c-mode;
sfp_rx_los_pin = <&tlmm 43 0>;
sfp_mod_present_pin = <&tlmm 45 0>;
sfp_tx_dis_pin = <&extgpio 11 0>;
media-type = "sfp"; /* fiber mode */
};
};
};
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <1>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
gmac2:dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a504000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,phy-mdio-addr = <30>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
x5-cpe {
compatible = "x55-poweron";
pwykey = <&extgpio2 13 0>;
status = "ok";
};
/* EDMA host driver configuration for the board */
edma@3ab00000 {
qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
qcom,rx-queue-start = <0>; /* Rx queue start */
qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
<0 164 4>, /* Tx complete ring id #5 IRQ info */
<0 165 4>, /* Tx complete ring id #6 IRQ info */
<0 166 4>, /* Tx complete ring id #7 IRQ info */
<0 167 4>, /* Tx complete ring id #8 IRQ info */
<0 168 4>, /* Tx complete ring id #9 IRQ info */
<0 169 4>, /* Tx complete ring id #10 IRQ info */
<0 170 4>, /* Tx complete ring id #11 IRQ info */
<0 171 4>, /* Tx complete ring id #12 IRQ info */
<0 172 4>, /* Tx complete ring id #13 IRQ info */
<0 173 4>, /* Tx complete ring id #14 IRQ info */
<0 174 4>, /* Tx complete ring id #15 IRQ info */
<0 139 4>, /* Rx desc ring id #12 IRQ info */
<0 140 4>, /* Rx desc ring id #13 IRQ info */
<0 141 4>, /* Rx desc ring id #14 IRQ info */
<0 142 4>, /* Rx desc ring id #15 IRQ info */
<0 191 4>, /* Misc error IRQ info */
<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
};
pwmleds {
compatible = "pwm-leds";
led_power_red:red {
label = "pwm:red";
pwms = <&pwm 3 1250000>;
max-brightness = <160>;
linux,default-trigger = "none";
default-state = "off";
};
led_power_green:green {
label = "pwm:green";
pwms = <&pwm 2 1250000>;
max-brightness = <160>;
linux,default-trigger = "none";
default-state = "off";
};
led_power_blue: blue {
label = "pwm:blue";
pwms = <&pwm 1 1250000>;
max-brightness = <160>;
linux,default-trigger = "none";
default-state = "off";
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
status = "okay";
button@1 {
label = "rst";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
poe {
compatible = "poe-judge";
detect-mode = <0x4>;
detect-gpio1 = <&extgpio 0 0>;
detect-gpio2 = <&extgpio 1 0>;
detect-gpio3 = <&extgpio 2 0>;
status = "ok";
};
wsi: wsi {
id = <0>;
num_chip = <2>;
status = "okay";
chip_info = <0 1 1>,
<1 1 0>;
};
};
};
&wifi0 {
led-gpio = <&tlmm 36 GPIO_ACTIVE_HIGH>;
qcom,rproc = <&q6_wcss_pd1>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
memory-region = <&q6_region>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <0>;
qcom,board_id = <0x12>;
status = "okay";
};
&qcn9224_pcie1 {
status = "okay";
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_1_pins &pta_slic>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_i2c1 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
extgpio:pca9555@20{
compatible = "nxp,pca9555";
reg = <0x20>;
pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
status = "okay";
};
extgpio2:pca9555@21{
compatible = "nxp,pca9555";
reg = <0x21>;
pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
status = "okay";
};
lsm303_acc@19{
compatible = "st,lsm303agr_acc";
reg = <0x19>;
};
lsm303_mag@1e{
compatible = "st,lsm303agr_mag";
reg = <0x1e>;
};
ilps22qs@5c{
compatible = "st,ilps22qs";
reg = <0x5c>;
};
temp-sense@70 {
compatible = "ti,tmp103";
reg = <0x70>;
};
};
&blsp1_spi0 {
pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "n25q128a11", "micron,n25q128a11", "jedec,spi-nor";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
};
};
&blsp1_spi2 {
pinctrl-0 = <&spi_2_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "disabled";
};
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
pinctrl-0 = <&sdc_default_state>;
reset = <&tlmm 20 0>;
pinctrl-names = "default";
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo {
clock-frequency = <24000000>;
};
&qpic_bam {
status = "okay";
};
&pcie1_phy_x2 {
status = "okay";
};
&pcie0_phy {
status = "okay";
};
&pcie0 {
pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pcie1 {
pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
status = "okay";
pcie1_rp {
reg = <0 0 0 0 0>;
qcom,mhi@1 {
reg = <0 0 0 0 0>;
boot-args = <0x2 0x4 0x34 0x3 0x0 0x0 /* MX Rail, GPIO52, Drive strength 0x3 */
0x4 0x4 0x18 0x3 0x0 0x0 /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
memory-region = <&qcn9224_pcie1>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <1>;
qcom,board_id = <0x1015>;
};
};
};
/* PINCTRL */
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";
function = "blsp1_i2c0";
drive-strength = <8>;
bias-pull-up;
};
spi_2_pins: spi-2-pins {
pins = "gpio33", "gpio34", "gpio35", "gpio36";
function = "blsp2_spi0";
drive-strength = <8>;
bias-pull-down;
};
pta_slic: pta_slic {
pta1_0 {
pins = "gpio49";
function = "pta1_0";
drive-strength = <8>;
bias-disable;
};
pta1_1 {
pins = "gpio50";
function = "pta1_1";
drive-strength = <8>;
bias-disable;
};
pta1_2 {
pins = "gpio51";
function = "pta1_2";
drive-strength = <8>;
bias-disable;
};
};
sfp_pins: sfp-state {
pins = "gpio43";
function = "gpio";
bias-pull-up;
input-enable;
};
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-down;
};
spi_0_cs_pins: spi-0-cs-state {
pins = "gpio17";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-up;
};
serial_1_pins: serial1-pinmux {
pins = "gpio33", "gpio34", "gpio35", "gpio36";
function = "blsp1_uart2";
drive-strength = <8>;
bias-pull-up;
};
button_pins: button-state {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
pwm_pins: pwm-state {
mux_1 {
pins = "gpio25";
function = "pwm2";
drive-strength = <8>;
};
mux_2 {
pins = "gpio26";
function = "pwm2";
drive-strength = <8>;
};
mux_3 {
pins = "gpio31";
function = "pwm1";
drive-strength = <8>;
};
};
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio13";
function = "sdc_clk";
drive-strength = <8>;
bias-disable;
};
cmd-pins {
pins = "gpio12";
function = "sdc_cmd";
drive-strength = <8>;
bias-pull-up;
};
data-pins {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "sdc_data";
drive-strength = <8>;
bias-pull-up;
};
};
pcie0_default_state: pcie0-default-state {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-low;
};
pcie1_default_state: pcie1-default-state {
pins = "gpio47";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-low;
};
};
&license_manager {
status = "okay";
};
&usb3 {
qcom,select-utmi-as-pipe-clk;
status = "okay";
dwc3@8a00000 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
};
&pwm {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
dft-pwm-status = <0>, <0>, <1>, <0>;
status = "okay";
};
&hs_m31phy_0 {
status = "okay";
};

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