charge_manager may request a charge current limit less than the
capability of the supply in certain cases (eg. during PD voltage
transition, to make an effort to comply with reduced load spec).
Depending on the battery / system state, setting a reduced charge
current limit may result in brownout.
Pass the uncapped / max negotiated current to board_set_charge_limit()
so that boards may use it instead of the requested limit in such
circumstances.
BUG=chrome-os-partner:56139
BRANCH=gru
TEST=Manual on kevin with subsequent commit, boot system with zinger +
low-charge battery, verify devices powers up to OS without brownout.
Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/383732
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Not everything with a temperature sensor uses thermal throttling. This
change modifies the conditional build to enable building temp sensor
source without thermal throttling.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I8c0753f12899e9f203c04477ae520bcda40d5fd8
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356484
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Added console commands for the debugging purpose
psys - Can be used to measure the system power
amonbmon - Can be used to measure AMON/BMON voltage diff, current
BUG=chrome-os-partner:54273
BRANCH=none
TEST=Manually tested on Amenia
psys - Ran fish task and observed psys value changes.
amonbmon - AMON & BMON voltage & current are same as measured
across sense resistors.
Change-Id: I6653e814d9b00efe7dae9ce1fbd7ddbc2356f8e0
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/353043
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent:
- When operating as a TCPC, it indicated that the VBUS level should be
tracked (through GPIO inputs) and sent to the external TCPM when
appropriate.
- When operating as a TCPM, it indicated that the VBUS level should be
obtained by querying the TCPC.
These two independent uses have been split into
CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which
sould be more clear.
In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for
other means of VBUS detection.
BUG=chromium:616580
BRANCH=None
TEST=Verify kevin continues to boot + charge.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923
Reviewed-on: https://chromium-review.googlesource.com/348950
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Previously the maximum number of deferred routines was specified by the
the default maximum number of deferred routines you had to override
this, and if you wanted fewer, you still payed the price of having the
defer_until array statically allocated to be the maximum size.
This change removes that define and instead creates the RAM state of
the deferred routine (the time to wait until to call the deferred) when
the deferred is declared.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
manually test on discovery-stm32f072
Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc
Reviewed-on: https://chromium-review.googlesource.com/335597
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Previously calls to hook_call_deferred were passed the function to call,
which was then looked up in the .rodata.deferred section with a linear
search. This linear search can be replaced with a subtract by passing
the pointer to the deferred_data object created when DECLARE_DEFERRED
was invoked.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
CQ-DEPEND=CL:*255812
TEST=make buildall -j
Change-Id: I951dd1541302875b102dd086154cf05591694440
Reviewed-on: https://chromium-review.googlesource.com/334315
Commit-Ready: Bill Richardson <wfrichar@chromium.org>
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Use LARGER_TASK_STACK_SIZE to increase stack size to 640 bytes.
Check HOSTCMD stack usage with "taskinfo" command while running
the suspend/resume stress test.
8 R HOSTCMD 00000001 21.133553 496/640
It exceeds 488 bytes of TASK_STACK_SIZE.
BUG=chrome-os-partner:51773
BRANCH=none
TEST=enter "suspend_stress_test -i spi32766.0" in AP to do
suspend test. System won't do cold reboot which is cause by
"Stack overflow in HOSTCMD task!".
Change-Id: Ic5edebc6b77637ca2c648798398e3f24bc87ca27
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/336593
Reviewed-by: Rong Chang <rongchang@chromium.org>
After a charger is attached, we may set a charge limit based upon BC1.2
or USB-C Rp before PD negotiation completes. Therefore, allow 2 seconds
for all negotiation to complete. Previously this behavior was implicit
when using SW charge ramp.
BUG=chrome-os-partner:51280
BRANCH=glados
TEST=Manual on chell. Insert stock charger, verify that it is detected
as TYPE_UNKNOWN until timeout.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I52f02de46fa92b66a9fbaddb94a062310688f028
Reviewed-on: https://chromium-review.googlesource.com/334312
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
On oak battery, when the battery is dead it reports 0 for desired
voltage, current, and state of charge. In this case we should allow
charging.
Added a CONFIG option for this that should be removed as soon as
the battery side is fixed.
With this CL, when a dead oak battery is used and a charger is
connected, we attempt to charge it.
BUG=chrome-os-partner:51454
BRANCH=none
TEST=test on an oak with a dead battery. w/o this CL, the battery
never charges because the charging not allowed flag is set. With this
CL, the battery charges.
Change-Id: If9f1250cd41aec265838e1d109f53c1bcd58c111
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/334471
Reviewed-by: Rong Chang <rongchang@chromium.org>
CONFIG_PMIC_FW_LONG_PRESS_TIMER was ported long time ago from
Tegra, but the codes are actually not used and erroneous.
It might wrongly trigger set_pmic_pwron(0), and turn off
PMIC power accidentally. This causes POWER_GOOD lost and
power state will go back to S5 during boot up.
Clean up the codes by referencing check_for_power_off_event()
of Rockchip.
BRANCH=none
BUG=none
TEST=bootup and press power button quickly right after we are in S0.
Bootup should still complete normally.
Change-Id: Ie034efa3575dbebae4debb1afc206fddd9116350
Signed-off-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/332724
Reviewed-by: Rong Chang <rongchang@chromium.org>
Increase LED blink cycle time to reduce power consumption on Oak rev5
with GlaDOS ID.
BUG=chrome-os-partner:50317
TEST=`make EXTRA_CFLAGS=-DBOARD_REV=5 BOARD=oak -j`
Change-Id: Ic00512434965471a82b94ef431e0ec88c9e4c0c3
Reviewed-on: https://chromium-review.googlesource.com/332346
Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org>
Tested-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
rev5 battery LED control was misplaced in wrong function.
Move it back to oak_led_set_battery().
BRANCH=none
BUG=chrome-os-partner:49375
TEST=ectool led battery [green red off] are correct
Change-Id: I83bc24c7ea7695be2a638e97b7db6e0c38840a16
Signed-off-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/330509
Reviewed-by: Rong Chang <rongchang@chromium.org>
The base accelerometer on oak rev5 needs to be rotated 180 degrees
along the z-axis to match the standard reference frame.
BUG=chrome-os-partner:50312
BRANCH=none
TEST=manually rotate my oak rev5 and verify that `ectool motionsense`
reports correct accelerometer readings
Change-Id: I05a377b5f0827e2aad47d388dc3264d451580989
Signed-off-by: Ricky Liang <jcliang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/330484
Reviewed-by: Rong Chang <rongchang@chromium.org>
The default target hardware is rev5. This is a maintainess change for
old and deprecated HW.
BRANCH=none
BUG=chrome-os-partner:49114
BUG=chrome-os-partner:50720
TEST=manual
for N=1,5 do
make BOARD=oak clean && make BOARD=oak EXTRA_CFLAGS="-DBOARD_REV=$N" -j
Signed-off-by: Rong chang <rongchang@chromium.org>
Change-Id: Ibb4ebf9fab429964ace7c3e548598f0fb08e7dea
Reviewed-on: https://chromium-review.googlesource.com/330065
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
This change enables lid angle update that turns off keyboard scan in
tablet mode.
BRANCH=none
BUG=chrome-os-partner:49114
TEST=make BOARD=oak runtests
make BOARD=oak -j && make BOARD=oak_pd -j
load on oak and boot to vt2 console.
flip lid to disable range, type keyboard and check.
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: Ibd2f0d6ae33a95380c9fc52a7568166a04c119e9
Reviewed-on: https://chromium-review.googlesource.com/328884
Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
1. Muxer of USB C1 port changes to Parade PS8740.
2. Add control of DP switch TS3USB3000RSER, using for switch DP to port 0/1
(same as rev2).
3. LED control logic is same as rev2.
4. Updates GPIO setting for rev5 pinouts.
BUG=chrome-os-partner:49375
BRANCH=none
TEST=build -j buildall tests
Change-Id: Ifc45ac30be8d46caa1cdb032ccce7569e5a14b99
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/321024
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
refer to commit d341615383,
adds the base accelerometer as well as the gyroscope to the list of
motion sensors on the board, connect with SPI bus. They are currently
wrapped behind an ifdef for HAS_TASK_MOTIONSENSE and OAK_REV5.
BUG=chrome-os-partner:50312
BRANCH=none
TEST=Build Oak EC with driver enabled and verify that we can calcuate
a valid lid angle.
TEST=Verify that signs of accelerometer conform to those shown in the
Chrome/Android/HTML5 doc/spec. See description in accelerometer_types.h
TEST=Verify that signs of gyroscope conform to those shown in the
"Sysfs interface to EC accelerometers" document.
TEST=make buildall tests
Change-Id: I4d900bc6bd7329db6ea53660fae86e5e2bbe9028
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/319295
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
refer to commit 574c806571,
adds the lid accelerometer to the list of motion sensors on the rev5.
Since commit bc404c94b4,
math_util.c is no longer to include "math.h" header file.
BUG=chrome-os-partner:50312
BRANCH=none
TEST=Build Oak EC with driver enabled and verify that valid
accelerometer data is read, and that range, resolution, and odr can all
be modified.
TEST=Verified that signs of accelerometer data conform to those shown in
the doc.
TEST=make buildall tests
Change-Id: I8df1b2331a1fbea82015b97985541e2ebc393d10
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/319332
Commit-Ready: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
With commit e9883124ff, a GPIO_INT macro was added. That change
also required that all instances of GPIO_INT in a board's
gpio.inc file come before any GPIO macros, or the interrupt
handler wouldn't work properly.
This CL just adds a warning comment about requirement to all
gpio.inc files.
BUG=chromium:471331
BRANCH=none
TEST=make buildall, test image on Cr50
This is a change to comments only. There is no new behavior to
verify, although I did run try out one new image just to be sure
nothing stupid happened.
Change-Id: I83f7819929a53bce3a8bae04d15b3ee3bda11738
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329334
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Previously these were often done in board.c files, which made it
impossible to include the gpio.inc anywhere else. As part of
refactoring the GPIO code we now need to be able to include gpio.inc
from common/gpio.c. Moving these defines into gpio.inc makes them
available wherever gpio.inc is included.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I28e7b5a1d40b113ae824b18f020b2d1e51e0c08a
Reviewed-on: https://chromium-review.googlesource.com/328822
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
if CONFIG_USB_PD_TCPM_VBUS is enabled, a race condition may happen:
In function pd_set_input_current_limit() and typec_set_input_current_limit(),
EC may notify AP power change event before PD send the up-to-date
POWER_STATUS TCPC alert to EC. It will cause the AP get the stale power
status. Move the power change event notification to board_set_charge_limit(),
it will be called after EC receives POWER_STATUS TCPC alert, and sending
power change event notification only if the "charge limit" or "charge port"
or supplier is changed.
BUG=chrome-os-partner:48801
BRANCH=none
TEST=make buildall -j; Tested on Oak by plug/unplug AC adapter to
type-C ports and verify the UI battery icon shows the correct status
instantly.
Change-Id: I52f0e268fdebc45e609d843847540ae48cd0a9eb
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/320066
Reviewed-by: Rong Chang <rongchang@chromium.org>
For TCPMs with an off chip TCPC, PD MCU host event status can be handled
in a common way. When a status flag is updated (ex. from
charge_manager), notify the AP through the host event, and save the
status flag for later retrieval.
BUG=chrome-os-partner:49124
BRANCH=None
TEST=Verify `cat /sys/class/power_supply/CROS_USB_PD_CHARGER1/online` on
chell reflects the actual online status of the charger. Also verify UI
charge icon tracks the online status correctly.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I63bc70205627474590e38ffd282faedaea3bcc66
Reviewed-on: https://chromium-review.googlesource.com/320796
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Stack of PDCMD task may be overflow during plug/unplug stree test
with Apple's AV Multiport Adapter. Enlarge the stack size to avoid
system reboot.
BUG=chrome-os-partner:47728
BRANCH=none
TEST=Manual
1.Connect DUT to sink monitor via HDMI dongle.
2.Unplug HDMI USB from DUT side.
3.Plug HDMI USB cable to DUT USB socket.
4.Repeat (Plug and unplug) USB from DUT for 10 times.
Change-Id: Ib6a1fbd0a552b2c6d4656c12554e1306c21adb8a
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/315020
Reviewed-by: Alec Berg <alecaberg@chromium.org>
refer to commit 75f740fa, enabling the option on oak too.
BUG=none
BRANCH=none
TEST=plug in CDP, SDP, DCP, type-C, and PD charger. Make sure
we ramp to a reasonable value for the correct suppliers.
Make sure we don't ramp for type-C and PD chargers.
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Change-Id: I9c6a0726e9cb23af59d5841c63a81897ae624998
Reviewed-on: https://chromium-review.googlesource.com/314436
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Send power change event to AP whenever input power is changed,
ensure that AP gets the latest power charging info.
BUG=chrome-os-partner:47677
BRANCH=none
TEST=tested on Oak by plug/unplug AC adapter to type-C ports and
verifying the UI battery icon shows the correct status instantly.
Change-Id: I7465afcd8bc9b1c56ecf70fc74446866a8ab1b9a
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/313926
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add a new configuration struct tcpc_config_t that initially defines the
i2c host port and i2c slave address of all TCPCs present on the board.
This will allow us to create boards with multiple TCPCs on different i2c
ports, with arbitrary i2c slave addresses.
BUG=chromium:551078
TEST=Manual on glados. Verify PD communication / charging is still
functional on both PD ports.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I9b2bde85d7f1642e8727c052e064371be7967619
Reviewed-on: https://chromium-review.googlesource.com/311000
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Under NVDC, BGATE natively has a body diode. Hence there's a discharging
path if VSYS is lower than VBAT. This change keeps VSYS voltage when
turning off charging.
BRANCH=none
BUG=chrome-os-partner:46698
TEST=manual
make buildall -j
load on boards with isl9237 charger.
charge the battery to full, and check charging voltage and current.
Change-Id: I8a6046444dd40a3b57f034be124b9e8fe281de40
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/309289
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Before Oak rev4, it defines 2 wakeup source EC_WAKE(PA0), EC_PWR_BTN_L(PB5).
Due to the wakeup source limitation of STM32F0 (http://goo.gl/VQk9GV),
Oak can only use one wakeup source, because EC_PWR_BTN_L is low-active and
it is kept high always. The HW & SW should be changed after rev4:
Using PA0 as wakeup source only, instead of both (PA0 & PB5).
BRANCH=none
BUG=chrome-os-partner:46670
TEST=Manual on oak rev4 with HW rework.
Detach PD power adapter, run 'hibernate' on EC console, make sure that both
EC and PD go to hibernate, verify the following cases individually:
1. Press power button and verify that both EC and PD wake.
2. Plug PD power adapter and verfy that both EC and PD wake.
Change-Id: Ief37aa1f11a84dd358875f22fa35c484b10bc388
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/309246
Reviewed-by: Rong Chang <rongchang@chromium.org>
Some chips previously defined CONFIG_I2C and others didn't. Standardize
the usage by removing CONFIG_I2C from all config_chip files and force it
to be defined at the board level. Also, make boards define
CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces
they will use - this will assist with some later cleanup.
BUG=chromium:550206
TEST=`make buildall -j`
BRANCH=None
Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310070
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Warm reset key from servo board lets the POWER_GOOD signal
deasserted temporarily (about 1~2 seconds) since Oak rev4.
In order to detect this case, check the AP_RESET_L status,
ignore the transient state if reset key is pressing.
BUG=chrome-os-partner:46655
BRANCH=none
TEST=make buildall -j;
Press warm reset key of servo board, AP should reset normally.
Change-Id: Ib9f111d2273cde61354e72367fe74d4ee15d2291
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/307201
Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-by: Rong Chang <rongchang@chromium.org>
The default battery type of Oak is 3S, in order to compatible to
2S battery, set the minimum voltage of battery to 6V rather than 9V.
BRANCH=none
BUG=chrome-os-partner:46540
TEST=manual
1. connect 2S battery to rev4
2. check the battery info with EC command:
> battery
3. confirm the voltage of battery is match to setting of battery_info.
Change-Id: Ieb7e39817bb0cefa523f73039b68943adb50f045
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/306381
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Enable USB PD logging.
BUG=chrome-os-partner:45933
BRANCH=none
TEST=make -j buildall
make -j BOARD=glados tests
Load on glados and test that PDLOG events show up in dmesg
Change-Id: I61dbc5019ea3228542c2c244228bbb483cf51ead
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/309881
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
If PD MCU crashes, it will go back to RO code and stay there
until the next AP boot. So, if EC detects PD has crashed, then
EC should panic reboot with debug message that it detected
a PD crash.
PD MCU crash is detected by EC by seeing the PD MCU transition
from RW to RO, without it setting the flag that it got there
from a sysjump.
This CL also makes minor changes to oak_pd and glados_pd board.c
files to make them identical, other than the few minor real
differences between them.
BUG=none
BRANCH=none
TEST=tested on glados using pdcmd console command on EC to test
sysjumps and reboots:
sysjump to RW: pdcmd 0xd2 0 2 0
sysjump to RO: pdcmd 0xd2 0 1 0
cold reboot: pdcmd 0xd2 0 4 0
Verified that PD can jump back and forth between RO and RW
without EC panicing. Verified that if PD MCU is in RW and
reboots, then the EC will panic and print 'PD crash'. Verify
if PD MCU reboots while in RO, without ever going to RW first,
then EC does not panic.
Change-Id: Id3191f4005e70a6c61a9322bf535b4374e85eb9a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/308586
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Change battery and variable sink capabilities for all boards
to account for +/-5% voltage inaccuracy.
BUG=none
BRANCH=none
TEST=test glados with third party variable power supply and make
sure it see's our sink capabilities as 4.75V-21V.
Change-Id: I2481ccbe6c47bfed1a6b8b237329e70bd0f8e4ac
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/308237
Reviewed-by: Todd Broch <tbroch@chromium.org>
Remove duplicate code for checking request message, but keep
a board specific check of the request message for custom checks
needed on zinger and plankton.
BUG=chrome-os-partner:42490
BRANCH=none
TEST=make -j buildall. run on samus and connect a hoho, make
sure we successfully negotiate a contract.
Change-Id: I7398953a158d340e3e113f5a816b55445a857711
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/305374
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
- Enable low-power idle on oak_pd.
- Have oak_pd follow oak into hibernate. The wake pin on oak_pd will be
pulled down until oak wakes, which will generate a low-to-high pulse
at oak board_init().
TEST=Manual on oak. Run 'hibernate' on EC console, verify that both EC and
PD go to hibernate. Press power button and verify that both EC and PD wake.
BUG=chrome-os-partner:46073
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ic33a71654ac46977ff01551d70f6a0dcc0d2b8c0
Reviewed-on: https://chromium-review.googlesource.com/303383
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
It may use MKBP event to send PD power change events to AP via interrupt.
According to the spec, AC power change events do not be allowed to
wake up AP. In order to avoid it, define a white list in board level,
only allow those events to wakeup the AP during S3 power state.
BRANCH=none
BUG=chrome-os-partner:45127
TEST=manual
Plug PD power adapter to oak, if system is in S3/S5 and it should
starts charging, but should not wake up system/AP at all.
Change-Id: I2f86697d5d3bd24d7de840e21064b91e8841f0eb
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/300360
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Modify the GPIO seeting according to the Oak rev4 schematic.
BRANCH=none
BUG=none
TEST=manual
Confirm all reversion of oak can be built pass:
make -j EXTRA_CFLAGS=-DBOARD_REV=4 BOARD=oak
make -j BOARD=oak clean
make -j EXTRA_CFLAGS=-DBOARD_REV=3 BOARD=oak
make -j BOARD=oak clean
make -j EXTRA_CFLAGS=-DBOARD_REV=2 BOARD=oak
make -j BOARD=oak clean
make -j EXTRA_CFLAGS=-DBOARD_REV=1 BOARD=oak
Change-Id: Ib1051f29df9d1919f0ae3ecaf55dc0997ea29c3e
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/300728
Reviewed-by: Rong Chang <rongchang@chromium.org>
Set USB communications capable flag in source/sink
capabilities PDO on boards that support USB. This
signals to other side that we are capable of
communication over D+/D- or SS Tx/Rx.
BUG=chrome-os-partner:34982
BRANCH=samus,smaug
TEST=load on samus, use twinkie to sniff traffic,
verify that USB comms capable bit is set in source
cap packet
Change-Id: I0f49cf19eb141512298c3439a4708c53101d674f
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/300637
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
