Use RMA public key definition generated based on the binary blob
containing the key and key ID.
Key generation is controlled by the make file in common/, but actual
key blob comes from the board directory.
The structure holding the key and key ID is being modified to allow
initialization using a flat array.
No more need in defining CONFIG_RMA_AUTH_SERVER_PUBLIC_KEY and
CONFIG_RMA_AUTH_SERVER_KEY_ID.
BRANCH=cr50, cr50-mp
BUG=b:73296144, b:74100307
TEST='make buildall' still succeeds.
test RMA server generated authentication codes are accepted when
unlocking RMA.
Change-Id: I8ade94de6eb69b3e49bc5b948dbac20e59962acf
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/990783
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Driver implements TCPC for ANX7447 chip. Enable Type C
port for USB and DP alt mode.
BUG=b:73793947
BRANCH=NONE
TEST=tested compiled binary for pdeval-stm32f072 board with this patch.
Power contract establishment, port role swap, DP alt mode works fine.
Change-Id: Ic11e499fc5fb4aba7732c75e4cb2fee54828c616
Reviewed-on: https://chromium-review.googlesource.com/956790
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Majority of the chipsets do not have a dedicated GPIO to trigger
AP cold reset. Current code either ignores cold reset or does a warm
reset instead or have a work around to put AP in S5 and then bring
back to S0. In order to avoid the confusion, removed the cold reset
logic and only apreset is used hence forth.
BUG=b:72426192
BRANCH=none
TEST=make buildall -j
Manually tested on GLKRVP, apreset EC command can reset AP.
Change-Id: Ie32d34f2f327ff1b61b32a4d874250dce024cf35
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/991052
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This patch brings in both prod and test RMA server public keys as two
binary files.
A bash script for converting binary blob into C definition is also
provided.
BRANCH=cr50, cr50-mp
BUG=b:73296144, b:74100307
TEST=none yet
Change-Id: I2edd78164b8c912408ac7eda2e0a3a0262a8e81f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/990782
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Enable trackpad power when chipset is in S0 state. Keep
it disabled in other states.
BUG=b:73137125
BRANCH=master
TEST=On Octopus, kernel logs show ELAN enumerated
Change-Id: Ie1fd8ab777e82d900418127b4efee29fe65d1423
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/984405
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
If we enable charge termination when booting w/o battery,
charge termination would trigger and cut the power for max17055.
BUG=b:72697658
BRANCH=scarlet
TEST=Read rt946x reg 0x02, confirm charge termination is
disabled when booting w/o battery, and enabled otherwise.
Change-Id: I5780196ad993299ddfb37621bee5e941aa9b0d14
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/989314
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
This CL adds required code to the tcpc_alert_event() and
tcpc_get_alert_status() functions. In addition, it adds
board_tcpc_init().
The ANX7447 does not have an EC controlled reset line. Other than that
modification the actions taken in tcpc_alert_event and
tcpc_get_alert_status are the same as what's been done of previous
projects using these TCPCs.
board_reset_pd_mcu still needs to be implemented, but is not related
to the tcpc_alert_event() and tcpc_get_alert_status() functions. Also,
at this point ANX7447 is not supported as that depends on the driver
landing.
BUG=b:74127309
BRANCH=none
TEST=Verifed that with external charger that USB PD state machine
advances to SNK_READY state. Note that port 0 does not work at all in
this version.
Change-Id: Ib887b4dba6bacb4b3fb6e03f634362e1c3aa4da2
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/982518
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
system_rollback_detected is used to determine if the system rolledback
in the rest of the system code base and it's state is saved longer. This
change switches board.c to use that to determine the sysinfo output
instead of using the reset count.
The reset count is cleared when the system boots. Depending on how fast
the system boots it may be difficult to read sysinfo before the reset
counter is cleared. In these cases it is difficult to tell whether an
image has been rejected entirely or the image caused a rollback.
BUG=b:71804463
BRANCH=cr50
TEST=boot the device. Make sure sysinfo shows there's no rollback.
Rollback and make sure sysinfo shows the system has rolledback
Change-Id: Ic29b105c758d0984e47482b9384cf00fe202b716
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/984393
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tell the base to hibernate when we are in S5, and no AC is connected.
Also, wake the base when AC status changes (S5), and when the system
transistions out of S5.
BRANCH=none
BUG=b:71874971
TEST=1. Lid EC console: apshutdown => Check that Base EC hibernates
2.a. Lid EC console: powerb; => Check that base reconnects
2.b. Connect/disconnect adapter: check that base disconnects
and reconnects
Change-Id: I5e9a4afc64a07ad92f37d171a78a914d26f07c8e
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/958814
Reviewed-by: Randall Spangler <rspangler@chromium.org>
MODULE_UART should be used for console UART, and MODULE_USART for
all secondary ones (like EC-EC side channel).
BRANCH=none
BUG=b:66575472
TEST=Flash wand, EC-EC communication works
Change-Id: I241bad7902c2e7228783ae1aa9cc33ad5da2c8a2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/958813
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
CONFIG_VSTORE is needed as a part of the verified boot process. When
the AP boots up, it hashes its FW and asks the EC to store this hash.
When resuming, the AP will ask the EC for this hash.
Meowth and Zoombini were missing this option which was a reason why
resume was failing.
This CL simply enables the VSTORE module and adds 1 VSTORE slot.
BUG=b:72472969
BRANCH=None
TEST=With updated AP FW with HAVE_ACPI_RESUME, verify that
suspend/resume works.
Change-Id: I07d0ce3ef426dc1924de6085703a4174f353f83d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/982598
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Tested-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
The control of trackpad from EC was entirely removed by CL:421275.
So remove the unnecessary words of disabling touchpad in the comment
of lid_angle_peripheral_enable().
BUG=none
BRANCH=poppy
TEST=none
Change-Id: Ie688d9dc98c5f6f60a9d3908945495f4b6fdb00d
Signed-off-by: Kaiyen Chang <kaiyen.chang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/979572
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
We have a growing list of boards in chip/npcx/system.c that are
unable to distinguish a reset from a power-on or a reset-pin type.
Instead of being a temporary issue this is now solidified in the
design on some kabylake boards.
Instead of defining board-specific checks in the chip code this
change adds a config option that the relevant boards can define.
BUG=b:76232539
BRANCH=none
TEST=make -j buildall passes
Change-Id: I76e0f011d70ce6f778b1fb6a56c2779c39c3cbd6
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/979575
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
The keyboards that have an assistant key also move the row that
the refresh key is on from 2 to 3. The row is hardcoded and
used by the early boot key detection code to determine if
boot keys should be honored.
The fallout from not having the right refresh row defined was
not seen on Eve because that board has a different quirk where
it does not distinguish reset-pin vs power-on reset types so
the test in check_boot_keys() was not failing.
BUG=b:76232955
BRANCH=none
TEST=manual testing on Eve board
Change-Id: I5b94b4e32024afa1768bdf371a7eb951753014e8
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/979574
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This is helpful during early debugging to identify if the EC is up and
running. This will be later cleaned up as part of LED support for
yorp.
BUG=b:74952719
BRANCH=None
TEST=Verified that blue led glows up on booting up EC.
Change-Id: I4670c210045c649a926e7c3f23c5d6097df69e3d
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/979270
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
GPP_B14_STRAP is being moved due to a change in EC SKU. We're not
currently using this pin, but if we decide to in the future, we can set
up the appropriate one based upon reading the Chip ID register.
BUG=b:71717245
BRANCH=None
TEST=Build and flash on both ECs, verify that they both boot up
normally.
Change-Id: Iaa25d5d77939bf55d6dc3991eec89ad5d6e92abb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/978677
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Since all of the uses of CONFIG_USB_PD_TCPM_ANX74XX are actually for
ANX3429, rename the option especially since the ANX7447
driver will not reuse the ANX74XX driver which is being introduced
in CL:956790.
Also adding the CONFIG_USB_PD_TCPM_ANX740X and
CONFIG_USB_PD_TCPM_ANX741X options to advertise which versions of the
ANX chip the anx74xx.c driver applies to.
BRANCH=none
BUG=chromium:824208
TEST=build all
Change-Id: Ib47f4661466e54ff2a0c52d517eb318d3bfd25a2
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/973558
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
The NPCX driver doesn't use anything but >= 0; make everything
consistent as to not imply something is different between UART and
everything else.
BRANCH=none
BUG=none
TEST=none
Change-Id: Ib98f56f7004df2405df7d2cc1847f1ed4b3ec558
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/976524
Reviewed-by: Edward Hill <ecgh@chromium.org>
Seems expected from the kernel side since we are using a SPI interface
for host commands.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:71986991
TEST=run on Meowth, check kernel logs.
TEST=re-flash meowth_fp RW partition through the host command interface
e.g. flashrom -p ec:type=fp -i EC_RW -w meowth_fp.bin
Change-Id: I8455ba169d0fca7f99dc040c465693c73cebb6b3
Reviewed-on: https://chromium-review.googlesource.com/966022
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
For the dual data role, when the state is UFP
assert the otg pins to activate the usb device controller.
This will enable usb gadget mode and the board will act as
usb device instead of host.
For DFP state, de-assert the otg pins to activate the host mode.
BUG=b:74339386
BRANCH=NONE
TEST=Connect two Eve boards with the usb type c cable.
On ec console, type the command usb pd 0 swap data.
pd 0 state should return UFP mode.
Verify that the otg pins are high (USB2_OTG_ID and USB2_OTG_VBUSSENSE).
Change-Id: I0efb08ae3946ff09ce9dfeb89cff049e551fe000
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/961381
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
