As new features come along the console channel space limited at 32
becomes very tight. But not all features are present all the time.
Let's make some of the channels compile time configurable. This makes
for uglier code but allows to support more channels.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: Id21560d4aa05c0e5245872c50ae19340cda8fd3e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286610
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
SPI slave and master interfaces require very different code to
support, they should have separate configuration options.
Host command code printouts should use their own console channel.
Using SPS to designate SPI Slave interface is not universally
acceptable, a bug has been opened to discuss the alternatives and
clean up the code.
BRANCH=none
BUG=chromium:512613
TEST=make buildall -j
Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
FIFO should not collect events of suspended sensors.
It could still happen at boot, when sensors are set up suspended.
BRANCH=smaug
TEST=Check for invalid FIFO events in HAL code.
BUG=none
Change-Id: Ie363afc3f3263bb10e03a8d0a8ee34b8b92bb6b4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288200
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add ECST tool to modify the header used by npcx booter.
Modified drivers:
1. i2c.c: Modify for i2c_port design.
2. i2c.c: Fixed bugs when mutil-tasks use the same i2c port and pull-up issue.
3. hwtimer.c: Fixed bug whcih event expired time is behide current timer.
4. lpc.c: Add intializing host settings after pltrst is deasserted.
5. uart.c/clock.c/register.h: Fixed bug which cannot enter deep-idle
when gpio is any-edge trigger mode.
6. task.c: Add workaround method for hard fault issue.
7. keyboard_raw.c: Modified for support CONFIG_KEYBOARD_KSO_BASE
8. lpc.c: Modified for support CONFIG_KEYBOARD_IRQ_GPIO
9. lpc.c: fixed obe interrupt bug during 8042 initialization
10.Adjust path of flat files for new Makefile rules
11.Fixed build error on lpc.c without CONFIG_KEYBOARD_IRQ_GPIO
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Icf9494174b245b4026e396be877d578f36b6f6a5
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/284036
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
The mec1322 SPI driver toggles CS manually (CONFIG_SPI_CS_GPIO), so the
pin needs to be a normal GPIO, not functional.
BUG=chrome-os-partner:43160
TEST=Run "flashrom -p internal:bus=lpc -r read.bin" on glados, verify
that read.bin contains actual flash data and not all zeros.
BRANCH=None
Change-Id: Ibaee03b43b4d9c25f6c074c02688d1cba20c7a02
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288321
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Changes for glados proto 2 build. These changes are behind GLADOS_BOARD_V2,
which is not defined by default in order to support existing boards.
BUG=chrome-os-partner:42933
TEST=Verify that Glados v1 board continues to boot AP. Verify
compilation on GLADOS_BOARD_V2.
BRANCH=None
Change-Id: I68634f95f94d3d37f18d676c01219f92b6ddfc45
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287291
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This commit enhances the config option check python script to
significantly reduce the number of false positives.
- Now only checks committed changes.
- Only checks additions, not the whole file.
- Only checks uses of CONFIG_* not in a comment for both C-style and
Make-style files.
- Suports a whitelist.
BUG=chromium:510672
BRANCH=None
TEST=Detected missing configs in Makefiles and C source files.
TEST=/* CONFIG_FOO */ was not detected.
TEST=' board-$(CONFIG_OPT)=board.o # CONFIG_OPT2' only CONFIG_OPT was
detected.
TEST=Changes in working dir were not detected.
TEST=Changes to config_option_check.py were not detected.
TEST=cros lint --debug util/config_option_check.py
TEST=CONFIG_FOO in a multi-line C comment was not detected.
Change-Id: I5fc2ccc77bb4f319a3c85b7d81c83027959dc96b
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/287519
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Move TCPC initialized bit from alert register into error status
register. This is not part of the TCPCI spec, but the existing
code creates a bug that if TCPM reboots without TCPC also rebooting,
then we will never get the initialized alert from TCPC since
it has already happened, so the TCPM will loop indefinitely
waiting for TCPC to be ready. This fixes the bug by moving the
bit to a status register, which is more appropriate.
BUG=none
BRANCH=none
TEST=load on glados, reboot and make sure TCPM see's that the
TCPC is initialized.
Change-Id: I8e96b59031e01a4faec8f519727df1fa95f498bc
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288342
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
use (LID_OPEN == 0 && BASE_PRES_L == 0) as the lid closed condition to
avoid false triggers.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, play with magnets and the genuine lid,
check we get the right "lid open" / "lid close" messages on the console.
Change-Id: Ie0a34fb7e45e8a424ff1cfda7662543d4f336f1a
Reviewed-on: https://chromium-review.googlesource.com/287853
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Add a X-macro CONFIG_LID_SWITCH_GPIO_LIST to be able to optionally
specify more than one GPIO to check to find out whether the lid is open.
By default, use GPIO_LID_OPEN as before.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42110
TEST=on Smaug EVT2, define CONFIG_LID_SWITCH_GPIO_LIST as
LID_GPIO(GPIO_LID_OPEN) LID_GPIO(GPIO_BASE_PRES_L) and play with magnets
and the genuine lid, check we get the right "lid open" / "lid close"
messages on the console.
Change-Id: I9e7c67bb39f36f254d31d5861d535d69db754faa
Reviewed-on: https://chromium-review.googlesource.com/287852
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
LEDs should be under control of the mec1322 specialized LED control
unit, but it's not yet functional. In order to test LEDs for the
upcoming build, add GPIOs which can be toggled through the EC console or
ectool.
BUG=chrome-os-partner:40848
TEST=Verify `gpioset CHARGE_LED_1 1` turns LED red. Verify `gpioset
CHARGE_LED_2 1` turns LED green.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I64b5109e10aeb6a1f38ae9410dc5205f4cc6a117
Reviewed-on: https://chromium-review.googlesource.com/287675
Reviewed-by: Alec Berg <alecaberg@chromium.org>
It's sometimes desirable to boot without a battery, but we may brown out
if we don't have sufficient current. Inhibit AP power-on, even if the system
is unprotected, until our charger and current limit are initialized.
BUG=chrome-os-partner:41258
TEST=Manual on reworked glados with subsequent commit. Remove battery and
attach Zinger. Verify EC powers on and AP doesn't boot. Run `powerbtn`,
verify that AP boots. Remove all power and attach battery, verify that EC
powers on and AP boots.
BRANCH=None
Change-Id: Ifc3d16f8288a035854e9fd05812ce6de33170d6a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/280563
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The flash_ec uses the given board name to select a proper flashing
method. It keeps a mapping from board name to chip name.
This approach is not scalable if we want this script to work on
all supported board variants, like the pinky family which has many
boards: jerry, minnie, speedy, etc.
This change adds a new argument of chip name, such that we can only
keep the mapping of major boards. Other boards not listed can use
the chip argument to select a proper flashing method.
BRANCH=none
BUG=chromium:505003
TEST=Ran the script on Beaglebone/Servo v3 connected with Jerry:
$ flash_ec --chip stm32 --image ec.bin
Change-Id: I553ee68f82a7985a37548dfb6e89b364eaffd0f1
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287445
Reviewed-by: Dan Shi <dshi@chromium.org>
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Allow to force discharging the battery while a power source is plugged
for factory testing.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:42509
TEST=On Smaug EVT2 with USB-C cable plugged, issue "fwtool ec
chargecontrol discharge" or "ectool chargecontrol discharge"
and monitor the battery level for 10 min.
Change-Id: I0c4daa8ab442726cd398c121467718c50dbf0bef
Reviewed-on: https://chromium-review.googlesource.com/287590
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Create new custom VDM to notify DUT to enter case closed
debugging mode. Send this VDM from Plankton when the case
closed debugging enable button is pressed. Once DUT
receives the CCD enable VDM, CCD remains enabled until
a reboot. Note, this is polarity dependent, so cable
might need to be flipped.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=load on plankton and ryu. attach full feature C to C
cable (must have USB3.0 wires). make sure plankton is in
USB mode (USB_SS_USB_MODE light should be set, which can be
done by pressing DP_USB_TOGGLE button). Press CASE_CLOSE_EN
button to send VDM, and then attach micro-B to debug port
CN14 on plankton. See that VID/PID for Ryu show up in lsusb
on host, and EC console works. If device does not show up,
flip polarity of cable.
Change-Id: Ifa469e4a43e32089becd75fe6cdfe0ed462d950b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287441
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add ability for Plankton to detect whether a single or double
CC cable is used to connect to DUT. This is done by toggling
the active CC line until a connection is detected, then toggling
once more and checking if we still have a connection. If we
can connect to the DUT in both CC polarities, then it is a
double CC cable. Before we know the cable type, keep PD
communication disabled to avoid partially negotiating and then
disconnecting. Note, this increases the time it takes for
us to connect a form a stable PD contract with the DUT.
When we detect a double CC cable, the cable flip button actually
flips the active CC polarity, thus testing all pins in the
opposite polarity.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=test with plankton and samus. test that we form a PD
contract with both single and double CC cables as both sink
and source. also test the cable flip button for both cables.
Change-Id: I522369302848d4cdbb70c55a40af3ad0b7c3fb8a
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286589
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
symptom: there are many reset cause while chip power on.
root cause: there is no default value for bram.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. "power-on" reset cause still exist.
2. console "reboot" hard, preserve, and ap-off.
3. console "sysjump" rw and ro.
Change-Id: Ie190ade4990bfaf46e73746ac5019f61307c81e5
Reviewed-on: https://chromium-review.googlesource.com/286281
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Add matrices to align sensors vectors with the device reference.
Move rotation in read routines, to allow fifo to contains processed
information.
BRANCH=smaug
TEST=Worsk on smaug
BUG=chrome-os-partner:39900
Change-Id: I009e7f24ef6ee0574ed664aeb5fd649fcd7039fd
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286659
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Ported the USB-C muxes from Glados
Change-Id: I9d42108688a9070b982ae77f77633654bc6505ed
Reviewed-on: https://chromium-review.googlesource.com/282281
BUG=none
TEST=Tested the USB & DP status from "typec" console command.
Observed usb_mux_set() & usb_mux_get() function are getting called
and also the polarity of the USB-C is getting detected properly.
BRANCH=none
Change-Id: I56da12f4fe20a05a73e8b93893ba5a425a20808f
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287360
Reviewed-by: Shawn N <shawnn@chromium.org>
math library can be set independentely.
It is implied when motion sensor drivers are compiled in.
BRANCH=smaug
TEST=Build strago board specific tests, host test and ran
ryu image.
BUG=chromium:512329
Change-Id: I743ea7b44e4a3783602c11f3928cb3fa4b105ec4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287371
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Add example uses of the multi USART driver with DMA transmission and interrupt
based reception. USART1 is setup as a loopback device, it just echo's any
characters received. USART4 is forwarded over USB.
Also fix the alternate function mappings for USART3 and USART4, and add
comments for each section of board.c.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Crosswire USART1 to USART4 and cut and paste chunks of text over USB
Change-Id: I79170c78e61328caf8067ae8db8810db38880839
Reviewed-on: https://chromium-review.googlesource.com/287195
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
This adds a new transmission implementation for the multi UART driver.
It is a DMA based transmitter that can directly read from the TX queue
with zero copy overhead. The DMA channel used as well as the maximum
DMA transmission size are configurable per UART at the board level.
This also updates the Ryu AP UART to use DMA transmission.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Manually verify that the AP UART forwarding works
Change-Id: I3cb27d0f9015043d75a38c12919388afe90dc4af
Reviewed-on: https://chromium-review.googlesource.com/286274
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Following features are enabled.
1. ALS OPT3001 is enabled
2. Charger ISL9237 is enabled
3. Sleep mode in G3 is enabled
4. CMD_HASH, CMD_TIMERINFO, CONSOLE_HISTORY, CMD_ACCEL_INFO, CMD_ACCES
are disabled to save the memory.
BUG=none
TEST=Device boots to UI.
BRANCH=none
Change-Id: I225dcafdb5b066b6d9b9b2b00bd06586d33d3527
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286783
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=none
BRANCH=none
TEST=Added OPT3001 config to test the sensor in Kunimitsu.
Able to read the als data from "als" console command.
Varied the light intensity and the als reading are changing.
Driver fits into the existing ALS framework.
Change-Id: Idb2e6f9f50b6d0d6c8f64c11336efd3f2c76d498
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286782
Reviewed-by: Shawn N <shawnn@chromium.org>
BUG=none
TEST=Enabled the config and tested on Kunimitsu.
Enter "shutdown -h now" form the Kernel console.
Device goes to Sleep mode in G3 and charger LED turns off.
BRANCH=none
Change-Id: I962018dcfac2998ee0a11784adeceb09931b930d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/286781
Reviewed-by: Shawn N <shawnn@chromium.org>
Remove ryu_p4p5 EC board code along the "splitted" Sensor hub board
(ryu_sh/ryu_sh_loader): It's time to get rid of oldies.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:38333
TEST=make buildall
CQ-DEPEND=*I6df51d7b4be2be7217604da60462b8c9d0cde1d2
Change-Id: Iebc4022267afccb5057c856d624e56a850ecbd70
Reviewed-on: https://chromium-review.googlesource.com/286780
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Make the PD port state string more friendly with console limited to
64-byte wide string (eg current USB console).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=on Smaug, open the USB-console to the EC and type "pd 0 state" and
see the current type-C port state string.
Change-Id: I6903fd0f0b7371aef978f696370a6e3a200c7fa5
Reviewed-on: https://chromium-review.googlesource.com/286785
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Fix hibernate so that plugging a USB-C charger properly wakes the
system. In addition, change the default hibernate behavior to restart
after wake.
BUG=chrome-os-partner:42104
TEST=Run 'hibernate' on Glados. Verify that wakes occur when power
button is pressed, lid switch is toggled, or when a charger is attached
to either USB-C port.
BRANCH=None
Change-Id: I54b8d58e20c35f25883238df24e7f23bb743abaa
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286660
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The same calculation is used across the code, so move it to a common
macro.
BUG=chrome-os-partner:42104
TEST=Verify Glados still boots AP.
BRANCH=None
Change-Id: I90da348f37fc670971737cfc5ddcfb9c34096c4b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286169
Reviewed-by: Alec Berg <alecaberg@chromium.org>
To meet Android HiFi requirement, set gyro range to +/-1000dps.
BRANCH=smaug
TEST=Check range is correct from user space.
BUG=chrome-os-partner:39900
Change-Id: I47541214c2242cfb4bba5ceb8a90f1ca63679e3c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286243
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Implemented mec1322's heavysleep in idle task to
reduce further EC power down on S3.
MEC1322 needs sleep-enabled for all blocks to
acheive max power down including UART.
Real heavysleep will be effective only when
console/uart is not active.
To enable this commit, board-specific commit is required.
For example, check commit, "Enabling heavysleep idle task at S3".
Test:
1. Put device into S3 mode by typing 'powerd_dbus_suspend" in Linux
shell.
2. wait at least 1 min till EC console sleeps
3. measure EC power.
Since idle task is continuously scheduled, EC will enters/exits
to/from heavy sleep mode frequently in S3 and power consumption
will be changed dynamically.
For acurate power measurement, high-sampling-rate measurement
system might be required and using DMM might not give accurate
number.
BUG=None
TEST=Tested on evt1p0/evt1p7/DVT
BRANCH=None
Change-Id: I435ca347cab2f4d51cefeee802c3bf30fb393fa1
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283603
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
There have been a few changes made to the sps driver recently, which
were not necessary but caused performance degradation: the continuous
loopback test is showing transmit underrun (0xff bytes stuck into the
frames).
This patch restores the driver to its state before the recent changes
and then makes a few modification to account for the new API:
- added a way to specify idle byte transmitted on MISO
- port number is dropped
The actual differences between the old and new version of the driver
can be seen as follows:
git diff dbf027f chip/g/sps.c
The restored driver passes the loopback test successfully.
BRANCH=none
BUG=none
TEST=used the enhanced 'spiraw' utility which sends frames of random
size in 10..1010 bytes, and then clocks the line to receive the
same amount of bytes back, syncs up in the returning stream of
bytes and compares received and transmitted data.
# run 'spst 100' on the target
$ src/examples/spiraw.py -l 100 -f 2000000
FT232H Future Technology Devices International, Ltd initialized at 2000000 hertz
$
which is an indication of the successful loop back of 100 frames.
The cli command on the target exits and reports the stats:
> spst 100
Processed 100 frames
rx count 108532, tx count 51366, tx_empty count 100, max rx batch 11
Before this change spiraw.py was reporting numerous mismatches on
the host side.
Change-Id: Iaa8c94e439ac32a6f10f12ddbdbf445865807386
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286015
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This commit adds the 8042 scancodes to the shared objects library saving
504 bytes from the RW image. To enable the space savings, define
CONFIG_SHAREDLIB in the target's board.h file.
BUG=none
BRANCH=none
TEST=make -j buildall tests
TEST=Built samus EC image and verified keyboard still worked in RO and
RW.
TEST=Built samus EC image with CONFIG_SHAREDLIB enabled and verified
that the keyboard still worked in RO and RW.
TEST=Enabled CONFIG_SHAREDLIB for glados and cyan and watched build
fail.
CQ-DEPEND=CL:275344
Change-Id: I1241506c6b34d63e270677d4e8d0531a8a4236c9
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/276212
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This commit introduces the macros needed for the shared objects library.
To enable the creation of the shared objects library for a particular
board, simply define it in board.h.
#define CONFIG_SHAREDLIB
In order to actually add objects to the shared library, one must utilize
the SHAREDLIB() macro around the definition of the object. All of the
objects in the shared library will be placed into a separate binary
which the RO and RW images link against. The SHAREDLIB() macro simply
adds this attribute and prevents the RO and RW images from compiling
them in. This library will reside at a fixed location in memory
(currently following the RO image) and the size of the library can be
defined on a board by board basis. For example, in board.h:
#undef CONFIG_SHAREDLIB_SIZE
#define CONFIG_SHAREDLIB_SIZE 0x800
For example,
# In foo/build.mk
foo-$(CONFIG_BAR)+=bar_sharedlib.o
# In foo/bar_sharedlib.c
#include "libsharedobjs.h"
SHAREDLIB(const uint8_t shared_var = 0x43);
# In include/bar_sharedlib.h
extern const uint8_t shared_var;
BUG=none
BRANCH=none
TEST=make -j buildall tests
TEST=Enabled config option and saw the sharedlib being created.
TEST=Enabled config option on unsupported board and saw build fail.
CQ-DEPEND=CL:274079
Change-Id: I2abeb1be248ab161fa81c897d2f5793f5a599456
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/275344
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs). The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.
Now, there are 3 make goals: ro, rw, and libsharedobjs.
In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.
NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.
BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).
CQ-DEPEND=CL:285934
Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
