Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7703
TEST=reboot; look for "Hello on UART1" message on UART1 (which is uart2 on servo)
Change-Id: Ie497af48e62c28174b69adca5bea52d2f68d494f
Instead of using a runtime callback to register the console commands,
put them in a special linker section. So we can do a macro to "register"
them during the build.
It saves 684 bytes and a few microseconds at startup.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run a few commands from the BDS command line.
Change-Id: Id33ea210b9035bf76ed720373c74c5dd24ccd1b1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7697
TEST=if it runs, it works
Change-Id: I36ab37a8cf1c3e4bf41bfb38e622e766cee8a4c4
This works around a chip errata where the internal oscillator on early
EC parts (as used on proto0) is untrimmed.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7693
TEST=if it runs, it works
Change-Id: Ie82a524543f4cf25efd0de7998dbdae103bd126b
When code is compiled for RAM (by re-enabling the flag in board.mk),
use the following openocd commands to load it:
reset halt
load_image ../../../build/link/ec.RO.flat 0x20000000 bin
reg 15 0x20000400
resume
Note that you'll also usually need to disable a bunch of modules to make
the code small enough to fit in RAM.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7681
TEST=if it runs, it works
Change-Id: I2b3cc69b361ad73706af3ff6de1ce952e8d5a0a9
Ensure that all the code ends up in the expected place.
This bug beat us for the RAM only version but it is present
even in the flash version (though probably harmless).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run the resulting image on BDS and inspect manually the .map file.
Change-Id: Iefe505bc507547b1043cb493ba7e8f210bb1ebc4
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7677
TEST=if it runs, it works
Change-Id: Ib4f28505f6b9a21375f9c3ba97c6e8d56722c051
Implement TPS2543 USB charging control.
It contains routine for setting each USB port as dedicated charging port
or standard downstream port. To allow us controlling the current
distributed to each port, we can select whether to allow 500mA or 1500mA
for each port.
BUG=chrome-os-partner:7476
TEST=Added USB port definition for BDS and tested GPIO output voltage
level is correct for all modes.
Change-Id: I19bc4b30d333aa802f868ebfc3a398b30e99ba0f
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7456
TEST=if it runs, it works
Change-Id: Ib82afab7d53203af31eefc9887feb98679266ac1
For bringup, this powers on the x86 unconditionally.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7528
TEST=none
Change-Id: Ib23e56d38ab42f8d8a4dbd1ba9dce12f0c3eeec9
Added gpio_enable_interrupt() to enable them. This ensures that a
module which handles GPIO interrupts doesn't get them until it's
ready.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7456
TEST=toggle power button while rebooting; without this fix it triggers a hard fault.
Change-Id: I35d926053963a70dd9246ce46a4913603b2b2489
Also fixes a typo in power_button.c when compiled for link
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7528
TEST=none
Change-Id: Ib43ef9edefe0b0caba246faa4a0d12d66ff9e205
This just ensures the JTAG pins are reset to JTAG function on warm reboot.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7448
TEST=none
Change-Id: I0cccdbe7a68c228db7f354898ed30598e9fabff0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7528
TEST=from debug console,
gpioget --> prints current level. Run a few times to see DEBUG_LED
value toggle.
gpioset debug_led 1 --> turns debug LED on. Run repeatedly to
override the idle task toggling it off.
Change-Id: I7c64044228697e052a9c20eb052d37a1f640f6e7
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7499
TEST=press and release power button; should see debug messages
Change-Id: I8909ae4643afc98753edb690771618ad43135e3e
Add an option to read temperature from only specified temperature
sensor. With this we can prevent ectool returning error if we already
know a sensor is not connected and do not want ectool to read it.
BUG=none
TEST=ectool temps; ectool temps temp_sensor_ec_internal
Change-Id: I221f1e3390d17f4a3ae99f58eb701a99c7b566b9
Implement the state machine for PWRBTN# input and output to PCH. The state
begins while power button is pressed and stops while it is released or 8 secs
pass. The state machine is maintained inside the infinite loop of gpio_task().
Remember to #define EVT after the board comes back.
Also, the power-up sequence is not completed yet. Remember to come back when
it is done. Search TODO in code.
BUG=none
TEST=Manual run on evaluation board (via console printf):
#---------------------------
# power button pressed and release after 8s
[3070341] New State: START next_ts:3070340
# wait for next pwrbtn_sm_handle() is run.
[3071428] set_pwrbtn_to_pch(LOW)
[3071482] New State: T0 next_ts:3103426
[3103963] set_pwrbtn_to_pch(HIGH)
[3104023] New State: T1 next_ts:7071961
[7072044] set_pwrbtn_to_pch(LOW)
[7072103] New State: T2 next_ts:11072042
[11072661] set_pwrbtn_to_pch(HIGH)
[11072723] New State: STOPPED next_ts:11072042
# power button released
[14336515] New State: STOPPING next_ts:14336514
[14337604] set_pwrbtn_to_pch(HIGH)
[14337662] New State: SOPPED next_ts:14336514
#---------------------------
# Power button released during T1
[378324436] New State: START next_ts:378324435
[378325530] set_pwrbtn_to_pch(LOW)
[378325589] New State: T0 next_ts:378357528
[378358080] set_pwrbtn_to_pch(HIGH)
[378358143] New State: T1 next_ts:382326078
[378889269] New State: STOPPING next_ts:378889268
[378890361] set_pwrbtn_to_pch(HIGH)
[378890420] New State: STOPPED next_ts:378889268
#---------------------------
# Power button released during T2
[448592391] New State: START next_ts:448592390
[448593483] set_pwrbtn_to_pch(LOW)
[448593542] New State: T0 next_ts:448625481
[448626041] set_pwrbtn_to_pch(HIGH)
[448626104] New State: T1 next_ts:452594039
[452594076] set_pwrbtn_to_pch(LOW)
[452594138] New State: T2 next_ts:456594074
[453199165] New State: STOPPING next_ts:453199164
[453200257] set_pwrbtn_to_pch(HIGH)
[453200316] New State: STOPPED next_ts:453199164
Change-Id: I5a12f3e46fa8086c530123a81ee743d3664b91f4
By default the scanning code would pull-low all column pins and listen to
any key press interrupt on input pins. This can save power compared to the
repeatly polling.
Once a key is pressed, the scanning code enters the busy loop and pull-low
column pins one by one. Then generate the scan code to host.
The code keeps polling after 1 second after no key is pressed. Then goes
back to interrupt mode.
BUG=none
TEST=Manual tested on S*y machine.
Change-Id: I0bf8877450dbd6ad1197a2fe1714ab755dc49a80
Implement EC lid switch interrupt handler and debouncing.
BUG=chrome-os-partner:7363
TEST=Manually test lid switch output signal is correct.
Use UART console to see debouncing is correct.
Change-Id: I74aad63330716da017fc4a57002349461c6a9b26
Removed a duplicated line in common/build.mk which causes compilation
fail.
BUG=chrome-os-partner:7313
TEST=Compilation passed
Change-Id: Ia7bb73b96e4feae27e5b6e519feb3ea1a672913a
Add LPC host command to get and set fan speed.
BUG=chrome-os-partner:7313
TEST=Connect a fan and manually test fan actual speed matches target
speed.
Change-Id: I4b6a711a1b8cca0dbd1c1936fe4f0f15240d3453
Add a LPC host command to read temperature sensor value with given
sensor id.
Add ectool command to read temperature sensor value through LPC.
BUG=chrome-os-partner:7329
TEST=Manual check the reading received is the same as value printed by
console command.
Change-Id: Id3386774435be6c3ae010a143f4fa894568efdb8
Macro _GNU_SOURCE is not automatically defined in chroot host toolchain.
Add this macro to let stdlib.h header file declare ptsname_r() function.
BUG=None
TEST=Run "gcc -V" to check if the toolchain version >= 4.6.0.
And run "make clean; make" in Chromium OS dev chroot.
Change-Id: I02d8a6f9ac9a6e51da3f2cd2ecbec9ec1f096c6a
Signed-off-by: Rong Chang <rongchang@chromium.org>
This provides a pty for the EC UART channel on the BD-ICDI-B FTDI
daughtercard for EC debugging.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=make && build/bds/util/ec_uartd (with EC attached to FTDI board)
Change-Id: I51fe50d0da6345962affb860b923425197a04fa1
The constants don't work with the DECLARE_IRQ() macro yet, because it
relies on stringizing the IRQ number.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=none
Change-Id: Ie6ddecd79e28c319b095089131579ba994a17da3
(cherry picked from commit e24904644a977f2618f51629cc066b93a3d53595)
LPC module no longer directly talks to UART registers, and vice-versa.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST='ectool sertest' on target system
Change-Id: Id070c0d849bdfe91c752e0af651d357b695d2648
(cherry picked from commit ab8c3c2b8e3b08a4bf5573cda3a12dd3a384e67d)
The LPC is not stable enough to test. Kodus Rong. He creates this idea
to checksum the partial content of flash for read/write/erase. This can
improve the robustness of flashrom.
BUG=none
TEST=Tested with flashrom.
Change-Id: I2a2f7b698a94674c03cbd8e3f15caf34f8986399
This CL add host command to enable, get/set flash write protect range.
BUG=None
TEST=Use flashrom utility to set write protect range, enable write
protect and get status.
Change-Id: I345f1eb65944d8cf8028e6fdb7e43c40cc742a6d
Signed-off-by: Rong Chang <rongchang@chromium.org>
re-compile the QEMU code, so it runs properly inside the chroot.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make qemu-tests
Change-Id: Ib2a5d9aa56533fd6749c40eb8f73db955676886d
we are using linux style indentation,
so we should not check for the presence of tabs in the common python
script, checkpatch will ensure that the indentation is correct.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None.
TEST="repo upload" a CL with a new line containing tab indentation.
Change-Id: Ida3ef3d8274edd3e8e701e2ede43836c944cd263
Build is the system doing the build (e.g. 64-bit linux) and host is the
target platform on top of the ec (e.g. 32-bit Chromium OS).
Necessary to get ectool properly compiling for Chromium OS.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=make && file build/bds/util/ectool; ectool should be a 32-bit binary
Change-Id: I50eba4c164ece236646a7c6087b1b86769beeb28
