This is very basic, so you can only rely on RO_SECTION, RW_SECTION_A, and
RW_SECTION_B for now. We'll fill in more regions as we add vboot stuff.
Still, you should be able to do things like this:
flashrom -p internal:bus=lpc -r ec.bin
flashrom -p internal:bus=lpc -w ec.bin -i RW_SECTION:ec.B.flat
BUG=chrome-os-partner:8198
TEST=manual
Build the image, look for the FMAP in it.
cd src/platform/ec
make BOARD=link
dump_fmap ./build/link/ec.bin
Change-Id: I0adbbfb8e975faae805bda271873fcef46590cf4
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
LM4 reports fan stalled when fan speed is set to 0. Need to check this
before issuing warning.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:7497
TEST=Did not see fan stall warning when fan speed is 0.
Change-Id: I8eecca8516b5442d4943d9195d04acc5b4041085
Note: This will not work on older (0.94 boards).
- Use power button (KB_PWR_ON) to drive power sequencing events and
disable EC_PWRON. This is because EC_PWRON and KB_PWR_ON shared an
external interrupt line. Daisy v2.x will fix this so that both can
be enabled. Note: KB_PWR_ON is active low, wihle EC_PWRON is active
high.
- Relay power button state to PMIC. Also, since we are driving
PMIC_PWRON instead of PMIC_ACOK now, so updated the naming.
- Add a keyboard power button debounce period to avoid accidentally powering
the system back on after keyboard power-off.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=None
TEST=tested on daisy (frh@ verified behavior using a scope)
Change-Id: I5338eebe42c9b43a07af371a450db23276b2a574
This is a hack to avoid issues caused by incompatible
messaging protocol updates.
During protocol development, the length of a packet changed which
could cause the system to hang (or other issues) if the host
requested the wrong number of bytes from the EC. This avoids the
issue with development versions of the protocol, by simply making
the EC unresponsive on the old port.
BUG=none
TEST=Tested on Daisy 1.02 and EVT1
Change-Id: I96495d4c2bd14b377bef862801934d5168cb6cc7
Signed-off-by: David Hendricks <dhendrix@chromium.org>
ensure we cannot miss any timer, no matter how slow is the CPU and how
many simultaneous timer we set.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9319
TEST=boot Link EC and do long key press, see the EC watchdog panic no
longer happening.
Change-Id: I1ecc88fc06698175444fd86cce4c0abb5e846996
The EVT boards will have an enable signal for the +5V always-on rail
connected to GPIO PK4.
Just turn it on at startup to ensure that EVT boards will run out of the
box with the current EC firmware.
(PK4 is a test point on proto-1 board, this should be harmless).
We can later implement fancier power saving scheme by enabling it only
when we enter S3.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9284
TEST=boot Linux kernel on Link proto-1 and Link-1 proto-1 reworked with
+5V Always-on enable on PK4.
Change-Id: I26527480c7cd364f3fabcaabaadd079a332f9c1c
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:9152
TEST=manual
run latest ectool with old EC image
Change-Id: I09d4f6e8fcc131da227fc5a9c48291b08dfb6d19
BUG=chrome-os-partner:7839
TEST=manual
cd src/platform/ec
make BOARD=link
copy ./build/link/util/lbplay to the host and run it as root.
Change-Id: I6a4a842b7500751185c8f4c2744f4389226bae9b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Adjust fan step thresholds:
T=55C Fan=20%/2200RPM
T=65C Fan=40%/4400RPM
T=75C Fan=60%/6600RPM
T=85C Fan=80%/8800RPM
T=95C Fan=100%/11000RPM
Also set minimum fan speed to 0 rpm.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8466
TEST=Manual test
Change-Id: I609853f2eceb9a6a43fbeb500084e82b1461f092
When PWM module detects fan stall, issue SMI warning and print warning
message to console.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:7497
TEST=Disconnect fan and power up. See warning message.
Change-Id: I4d96595f7f3cdfab5df333afc35206304bacab9d
BUG=chrome-os-partner:7839
TEST=manual
Try "lightbar help" on the EC console and "ectool lightbar help" on the
host. You should see the same commands and behavior.
Change-Id: I6e879e8bb892ef5ada7ef85a97fdf243149f4cb6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
fix small modularity issues to ensure we are able to compile all boards
in "tests" configuration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:8546
TEST=make BOARD=link tests && make BOARD=bds tests
make BOARD=daisy tests && make BOARD=adv tests && make BOARD=discovery tests
Change-Id: I9eed0195af6bfd3b47ef74e3cb27966c4365c345
This sets the SYSCFGEN bit. Writes to external interrupt config
registers (SYSCFG_EXTICRn) will not stick unless this is set.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=none
TEST=tested on daisy
Change-Id: I9a92b424e9ac1f909206f89ed773248807619ab2
This simplifies the messaging protocol. Messages will now only have
the raw content plus a checksum byte at the end. We will worry about
needs of the transport layer (e.g. preamble/postamble bytes) on the
host driver side, and will not support variable-length commands for
now.
There is also a protocol version command, which is now command number
0x00, which returns a 4-byte protocol version followed by a 1-byte
checksum.
BUG=none
TEST=tested on daisy using mkbp kernel driver
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I8fcc693cd50bc2b515164ea7a2a941cdd8333e73
1) When frequency changes, reload the watchdog timer right away, or it
may expire before the next reload. (Only matters when re-enabling the
PLL.)
2) Split out the timer/task debug output used by the watchdog into
their own routines, instead of assuming it's safe to call the command
handlers. Also make the flushes in those print routines safe to call
from interrupt level.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=waitms 1500; should print task dump again
Change-Id: I07e0ed24a526ae499566dab0bbeb0f5755cd5be6
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9306
TEST=waitms 1600; see that timer info isn't all upscrewed
Change-Id: I7945f5114bbe0e9525cac76ce7376d4c32c4e654
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=pll, then pll on, then pll off
Change-Id: I9e220a20e234f5eb30009d0a2a4fc080a167c971
This organizes the commands in the messaging protocol so that we have
a more clear distinction between commands which are intended to to
control or get status of the EC itself and those which are intended
to query information about peripherals, such as the obtaining the
keyboard state.
Note: This will require the mkbp code to be updated.
BUG=none
TEST=compile tested for now
Change-Id: I2d5c58fc794563d402da24e19fee146df817472a
Signed-off-by: David Hendricks <dhendrix@chromium.org>
(Or, if profiling is enabled.)
Also, track the number of task switches if profiling is enabled.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9274
TEST=taskinfo
Also test by commenting out CONFIG_TASK_PROFILING in board.h; code
should still compile and run.
Change-Id: Ib3dbce74b6ccfba2bbe18c7309136412c30f364e
This change adds battery operating temperature check. Host and EC
will be turned off when overtemp. EC can be waked up by predefined
external signals like key press or AC_PRESENT gpio.
For safty reason, this change does not check battery temperature
after EC deep sleep.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:8451,9108
TEST=none
Mock battery_temperature() fucntion to test.
Change-Id: I3203515b3df86192f690f9b98901020209ce49b3
This completes console output cleanup. The remaining calls to
uart_puts() and uart_printf() actually need to be that way.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7464
TEST=manual
Change-Id: Ib1d6d370d30429017b3d11994894fece75fab6ea
This adds a 'ch' command which prints/sets which channels are active
This handles all the async output; the remaining debug commands will
be refactored to use ccprintf() / ccputs() in a followup CL.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7464
TEST=manual
ch --> all channels active
ch 0x100 -> just port80 active
powerbtn -> system boots; only port 80 codes shown on console
Change-Id: I9efc43acec919b62b78c2c82c61946d32380adfe
Also tracks the distribution of IRQs, so we can see what's triggering
interrupts.
Task profiling is optional, enabled via CONFIG_TASK_PROFILING.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7464
TEST=taskinfo
Change-Id: I266f2b49bff9648cda446210d5a302b460fec244
This saves power.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8798
TEST=manual
Get a proto1 system modified with INA current sensor
1) From chroot:
dut-control i2c_mux_en:on i2c_mux:rem
dut-control pp3300_alw_mv pp3300_alw_ma
2) From EC console:
pll
(this should turn the PLL back on; it'll report clock frequency ~66MHz)
3) From chroot:
dut-control i2c_mux_en:on i2c_mux:rem
dut-control pp3300_alw_mv pp3300_alw_ma
Current (ma) should be bigger than in step 1
Change-Id: I806953684c57fd60bf481acb01dddffe2f2ad0ed
For those inputs from host, they are potential points fot cracker to stop
EC running. This patch removes these ASSERT() macro, but keeps those
for checking internal code logic.
BUG=none
TEST=build success
Change-Id: I91bf61f429a2387bb992b9518af60439f5592ea7
GPIO mode and pull-up/down registers do not all get initialized to
zero on reset. This patch ensures that all bits in the those registers
are set explicitly. An intermediate variable is used so that changes
are made atomically.
Note: output speed registers are also not all initialized to zero, but
we don't handle that in gpio_pre_init yet.
BUG=none
TEST=tested on newer daisy boards (which needed this patch to boot)
Change-Id: Ice2795197135dcee8f8484e4908dbfcf90fec2c9
Signed-off-by: David Hendricks <dhendrix@chromium.org>
This simply changes the constant '4' to MSG_PROTO_BYTES, which
includes the postamble. This helps reduce magic constant values
used in processing a packet.
BUG=chrome-os-partner:8975
TEST=tested on daisy (with kernel mkbp driver change)
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Id4634076ad63f45783354179dfebea4fd450fc1e
This patch moves all I2C port initialization into configure_board
to ensure the alternate function gets set properly.
I2C ports should come up in their high-impedance state (Output,
open-drain, output set) and then get set as alternate function.
However, configure_board() runs before gpio_pre_init(), so the
mode register was getting set set back to general purpose output
instead of alt. function.
TODO: Fix gpio_pre_init() so we do not need to explicitly handle port
configuration in configure_board().
BUG=none
TEST=tested on daisy using keyboard
Change-Id: If837acd4f4204e467e7ed276f048b5b70ecbdb25
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Source buffer was not being incremented properly, so the destination
buffer containing message payload was always msg[0].
BUG=none
TEST=tested on daisy (now keyboard protocol actually shows keys...)
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: If5a417291c9bff36bbeb2a87153de80300045257
