Move all the peripheral blocks base addresses in a common block rather
than spread among the register definitions.
This will help making a cleaner STM32H7 implementation whose base
addresses are all different from other families.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=compare all the ec.bin generated by 'make buildall' and verify
they are bit-identical with and without the change.
Change-Id: I52cafd2f3c9145dbcd585166df3fc78e38573bb4
libfpsensor is using it.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:70320279
TEST=run on Eve FP MCU with external library and see its traces are
correctly printed.
Change-Id: Iea1bc04d7ea7931478d14d655a7e986a0839a51a
For compatibility/convenience, implement the '%li' printf format
as a *32-bit* integer format, as it might be expected by non-EC code.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:70320279
TEST=run on Eve EVT with unspecified external binary and see its traces
are correctly printed.
Change-Id: Iac20e823c74aac4f659176416eebd804c321d47c
NCP15WB is actually the correct thermistor, let's drop that
copy-pasted comment.
BRANCH=none
BUG=b:35585396
TEST=make buildall -j
Change-Id: I5577bb70e354a6f2ef6338894793b808fe4b0e9a
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Nothing in fizz/nami code uses that thermistor: the 2 places that
would use it (ec_adc.c and bd99992gw.c) are not compiled in on
fizz/nami.
BRANCH=fizz
BUG=none
TEST=make buildall -j
Change-Id: Ib2af8ad066eb05cd9510669600feb26641433eed
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
On dual-battery slave, we use the charging allowed signal from
master to indicate whether external power is present.
In most cases, this actually matches the external power status
of the master (slave battery charging when AC is connected, or
discharging when slave battery still has enough capacity), with
one exception: when we do master to slave battery charging (in
this case the "external" power is the master).
BRANCH=none
BUG=b:65697962
TEST=Deplete wand battery to 5%, see that lux still provides power
to it but the battery does not charge.
Change-Id: I8bd9f52c386a0a9edfae3837ba33725b3101a008
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Scarlet has only one PD port.
Let's always source 1.5A instead of 3A.
BUG=b:70524967
BRANCH=none
TEST=Monitor PD packets, see Scarlet rev2 broadcast
source_cap as 'FixedVol=5.00V, MaxCur=1.50A'
Change-Id: Id9bcd69f3a20ef5eb55eb7b17539fd304abb08e4
Signed-off-by: Philip Chen <philipchen@google.com>
It's a dead board.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I9f5530afdea07bb5787fa2b674984147f8425fba
Signed-off-by: Philip Chen <philipchen@google.com>
When SLP_SUS_L is deasserted, that means the chipset is in S5.
BUG=None
BRANCH=None
TEST=Flash meowth; boot from AC only, verify that when SoC actually
boots the power state is reported as S0 instead of G3.
Change-Id: Ib9cd76aa9efd6f81df432205b8c1e8c342e32af6
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/837485
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This patch makes EC save the max current and voltage of a barrel jack
adapter before sysjump and restore them after sysjump.
BUG=b:64442692
BRANCH=none
TEST=Boot Fizz and let coreboot set the adapter current and voltage.
Verify EC-RW inherits the current and voltage set by coreboot.
Change-Id: Ib1addf6e5ce059a39cb2d8b355515df1138409eb
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/835628
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
With this, the EC-EC communication slave (base) updates the battery
information, to be transmitted to the master (lid).
Note that, in the future, we might want to use a similar mechanism
to pass battery information on all boards (not only the ones that
use EC-EC communication to pass information to the lid), and TODO
are left in the code for this reason.
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=Flash lux and wand, EC-EC communication works.
Change-Id: I042138ee066a65c3664fbeb93aadabf483a6ceea
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/725125
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This adds functions required for the slave in EC-EC communication,
including the task that processes requests from the master.
This also adds required CONFIG_EC_EC_COMM_SLAVE/MASTER/BATTERY
config options.
BRANCH=none
BUG=b:65697962
TEST=Build wand and lux boards, flash it, EC-EC communication works.
Change-Id: I772d9023a830f4fbc37316ca31e4da8240de7324
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/828180
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch makes EC check the presence of power from a barrel jack
adapter before activating the BJ port.
BUG=none
BRANCH=none
TEST=Boot Fizz on type-c. Boot Fizz on BJ.
Switch power from type-c to BJ at G3 and S0.
Switch power from BJ to type-c at G3 and S0.
Change-Id: Iec982278e1ceb9b997069f66eb0e14f2e361efd2
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/777824
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This adds 3 commands to obtain static and dynamic battery
information, as well as control base charger state.
These host commands are meant to be used as part of the EC-EC
communication protocol (based on hostcmd v4 protocol), but could
be used in the future to pass information between AP and EC,
especially when more than 1 battery is present, which would be
hard to support with the current MEMMAP-based approach.
BRANCH=none
BUG=b:65697962
BUG=b:65697620
TEST=Build wand and lux boards, flash it, EC-EC communication works.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Change-Id: I263454794394838918832c9e4623835ab2f3a3da
Reviewed-on: https://chromium-review.googlesource.com/670380
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
The CONFIG_BUTTON_RECOVERY option was a little confusing especially when
we have the CONFIG_DEDICATED_RECOVERY_BUTTON option. This commit
renames CONFIG_BUTTON_RECOVERY to CONFIG_BUTTON_TRIGGERED_RECOVERY to
help make things a little clearer.
Additionally, to avoid copy paste, defining
CONFIG_BUTTON_TRIGGERED_RECOVERY will populate the recovery_buttons
table with either the volume buttons or a dedicated recovery button
depending what the board is configured for.
Lastly, if CONFIG_DEDICATED_RECOVERY_BUTTON is defined,
CONFIG_BUTTON_TRIGGERED_RECOVERY is defined as well since it's implicit.
BUG=chromium:783371
BRANCH=None
TEST=make -j buildall
Change-Id: Idccaa4d049ace0df3b98b35bdd38ac9dbd843200
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/830917
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
The boards need to have 5V masked off from the power good tree.
Additionially, Meowth needs to have the COMP_C fault masked from the
fault mask because its enable is connected and not grounded like on
Zoombini.
BUG=b:69935563
BRANCH=None
TEST=flash zoombini; Verify that we can boot to S0.
Change-Id: Ia51004a131e7c31d0e5ee59d87ab13455b822779
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/807632
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Nobody is calling the flush function for consumer_ops structure,
so let's remove it to save flash space, until we find a use for it.
CQ-DEPEND=CL:*529221
BRANCH=none
BUG=chromium:795624
TEST=make buildall -j, saves from 40 to 128 bytes on some boards.
Change-Id: Iad18b30f419ccebc54a90914ec46da84b8d19601
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/826905
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
rt946x_closest_reg_via_tbl() is buggy and doesn't
return the right reg value because of misuse of ARRAY_SIZE().
We should fix it.
Meanwhile, since rt946x_closest_reg_via_tbl() is only called in
rt946x_set_boost_current(), let's just delete rt946x_closest_reg_via_tbl()
and move its code to rt946x_set_boost_current().
BUG=b:70524967
BRANCH=none
TEST=Confirm reg 0x0a is set correctly
Change-Id: Ie9c90ebf63596a52f864ff5809488731edc41fff
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/830895
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
GPIO02 (EC_HAVEN_RESET_ODL) is now configured to GPIO_ODR_HIGH,
designed for EC to reset H1. And it's no longer used with just
the HW path reserved (DNS R267 on schematic).
Tests showed that INPUT | PULL_UP has lower EC power consumption
so reconfiguring here.
BUG=b:64503543
BRANCH=none
TEST=manual
(on chroot)
$ make BOARD=soraka -j
$ ./util/flash_ec --board soraka
(on DUT)
$ powerd_dbus_suspend
(on chroot)
$ dut-control -p $PORT pp3300_dsw_ec_ma -t 10 | grep @@
> @@ NAME COUNT AVERAGE STDDEV MAX MIN
> @@ pp3300_dsw_ec_ma 5629 1.25 0.71 16.60 1.12
Without the change, the original setting gives:
> @@ NAME COUNT AVERAGE STDDEV MAX MIN
> @@ pp3300_dsw_ec_ma 4674 2.69 1.98 12.00 2.00
Change-Id: I4e2268612109155f57fdd236088cadaaba54bb3f
Signed-off-by: Ayo Wu <ayowu@google.com>
Reviewed-on: https://chromium-review.googlesource.com/786951
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Added code to support port 1 and 2 power path controller
since we didn't have the parts on rev 0.
BUG=None
BRANCH=None
TEST=make board=zoombini, make board=meowth
TEST=Make sure Zoombini can charge in on all ports.
TEST=Make sure Zoombini can charge out on all ports.
Change-Id: Idf174125cc5a617ad77378ce65d5c0f6cbb9fce4
Signed-off-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-on: https://chromium-review.googlesource.com/823211
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
PU62 used to be used to turn on power to PS8751 but it's been removed.
PS8751 is powered directly from PP3300_EC. So, EC doesn't need to
enable it.
BUG=b:65212601
BRANCH=none
TEST=On Kench EVT SKU5, verify type-c port is powered.
Change-Id: I2a1ce28efe09212a4ce7e7b57c0560e42e137cec
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/826256
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
We add 2 hashes that each map to a list of allowed commands
(command list is secret, and provided by Elan).
UPDATE_EXTRA_CMD_TOUCHPAD_DEBUG on the USB interface have the
following format for the parameter:
- param[0]: must be 0xff
- param[1]: offset of the I2C command in data
- param[2]: command length
- param[3-4]: read-back length (MSB first) over I2C, can be 0
- param[5-49]: data, is verified using SHA-256 hash.
The I2C command pointed at by param[1-2] is then sent over
I2C, and the data is read back into a shared buffer of size
param[3-4].
The data can be fetched over USB by a single byte USB update
touchpad debug command (indicating an offset in 64-bytes unit),
fetching data from the shared buffer in blocks of 64 bytes.
BRANCH=none
BUG=b:63993891
TEST=Elan can run debugging commands using their proprietary tool.
Change-Id: Idb19bcb940b7f030c3b3aeaf39d6b725fcb9ef34
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/763576
Reviewed-by: Chun-ta Lin <itspeter@chromium.org>
In gpio.inc, fixed EN_PP3300_WLAN so it's always high
since CNVi requires PP3300_WLAN power up at the same
time as PP3300_A.
Also, fixed USB_PD_RST_L to be an OD output.
BUG=b:69139536
BRANCH=none
TEST=make BOARD=meowth and BOARD=zoombini
runs with no errors
Change-Id: I3c2a4e7ca7b1ab5f9122d17324822dc5e61e70a8
Signed-off-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-on: https://chromium-review.googlesource.com/778120
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
We would like to use all 64-bytes of the buffer as parameter to
UPDATE_EXTRA_CMD_TOUCHPAD_DEBUG (12 bytes for update_frame_header,
2 bytes for the extra command type, leaving 50 bytes of payload).
BRANCH=none
BUG=b:63993891
TEST=./usb_updater2 -g 00 -d 18d1:502b
Change-Id: I023aa760f1a4cf9cacf9262a758cba1120d4f380
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/780372
Reviewed-by: Chun-ta Lin <itspeter@chromium.org>
BUG=None
BRANCH=None
TEST=Flash zoombini; Plug in a PD sink, verify that 5V 3A source caps
are sent. Plug in a second device, verify that 5V 1.5A source caps are
sent. Unplug the first device and verify that 5V 3A source caps are
sent.
TEST=Repeat above tests for meowth.
Change-Id: I0c2b6ce1d2793230f3855856c58633d8cae4b375
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/818336
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
The PPC needs to update its Vbus source current limits whenever our
policy changes on the PD ports. This commit simply adds and API to do
so.
BUG=None
BRANCH=None
TEST=With some extra code to enable 3A out, flash zoombini; Plug in a PD
device to a port, verify that it gets 5V @ 3A. Plug in a second device,
verify that we re-send new source caps of 5V @ 1.5A.
TEST=Repeat above for meowth.
Change-Id: Ifa4bc8b7df87f7730f2bcded842906d43171394b
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/818335
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Having seen how bright the LEDs are without a diffuser, let's turn the
brightness way down for the time being.
BUG=None
BRANCH=None
TEST=Flash a meowth, notice it's much less bright, listen to the praises
of my retinas.
TEST=Flash zoombini, verify that LEDs still work as before, just dimmer.
Change-Id: I7762ba9f0a7ce930b7b177c6d11ed664a87019e0
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/823281
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Use the new PPC functions to fill in more of the USB PD board
code:
board_set_active_charge_port
board_vbus_source_enabled
pd_snk_is_vbus_provided
pd_set_power_supply_ready
pd_power_supply_reset
BUG=b:69378796
BRANCH=none
TEST=make BOARD=grunt
Change-Id: Ie6c7da8575edbb11d5a4d28da3b228abd811a5a7
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/818504
Reviewed-by: Simon Glass <sjg@chromium.org>
The size of empty structs (and unions) varies between C and C++. When
including in C++ code our external API in ec_commands.h header with
extern "C". clang will complain (correctly) for all empty structs:
error: empty struct has size 0 in C, size 1 in C++
[-Werror,-Wextern-c-compat]
Remove them from the ec_commands.h header file.
ectool.c has some ugly macros which assume subcommands have both
requests and responses. Change those macros so they only reference
the non-empty sub-structs. The macros are still ugly, but generate
identical output, and don't rely upon zero-length structs.
BUG=chromium:792408
BRANCH=none
TEST=manual
1) Compile the following using 'clang -Wall -Werror':
#include <stdint.h>
extern "C" {
#include "include/ec_commands.h"
}
int main(void) { return 0; }
It compiles without error.
2) Copy the lb_command_paramcount, ms_command_sizes, and
cs_paramcount globals from ectool.c to a dummy .c file and
compile with 'gcc -S' to generate assembly. Do the same
after applying this patch.
Confirm the arrays have the same contents.
Change-Id: Iad76f10315b97205b42118ce070463071fe97128
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/820649
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
The cannonlake power state chipset code would fail to keep an accurate
record of the chipset's power state. For example, the EC could claim
that the AP was in G3, whereas the SLP_SUS_L signal was deasserted.
This commit fixes a few issues with the chipset code.
- First, don't have PP3300_DSW_EN enabled by default coming out of
reset.
The default chipset power state when the EC comes out of reset is G3,
therefore we should not enable the PP33000 DSW rail until we decide to
leave G3. This is usually triggered by a power button press.
- Similarly, when we wish to enter G3, we should turn off the PP3300 DSW
rail instead of the noop that was done before.
- Lastly, turn on the 5V rail when entering S5 instead of S3 and turn it
off when leaving S5 to G3.
BUG=b:70184397,b:70244199
BRANCH=None
TEST=Flash zoombini; Verify that AP boots to S0 and can shutdown to S5
and the EC tracks it. Verify that after the S5 inactivity timer, we
fall to G3. Verify that SLP_SUS_L is asserted and DSWPWROK is low.
Verify that we can still perform BC1.2 detection in G3. `reboot ap-off`
and verify that the AP does indeed remain off and no port 80 codes are
seen.
TEST=Verify that 5V is off in G3, but can be turned on if needed.
TEST=Verify that 5V is on in S5.
TEST=With the exception of BC1.2, repeat the above tests for meowth.
Change-Id: I444a8f29969ef6a68a83d1734912d239bad429a5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/813501
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
We need to change PLL settings if host apply eSPI operating
frequency higher than 50MHz, because FND clock is required
to be higher than half of operating frequency.
BRANCH=none
BUG=b:70537592
TEST=Change PLL succeed with chip select is low.
Change-Id: Ieba62f33ed024aed7a8e7f4cc48b1398ed781170
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/817717
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Waiting out HOOK_TICK_INTERVAL for a non-interrupt power signal can
cause boot delays of up to 500ms, which can lead to dropped host
commands and other bad side effects. Poll IN_PGOOD_S0 when sequencing up
to reduce the minimum delay to 5ms.
BUG=b:70390178
BRANCH=None
TEST=Run "reboot" on EC console, check timestamp of S0 transition print:
[0.332974 power state 3 = S0, in 0x000f]
Compare to pre-patch:
[0.692799 power state 3 = S0, in 0x000f]
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I4b8891f75d896b1ae47d8f12ed07581f20b6ae7c
Reviewed-on: https://chromium-review.googlesource.com/822594
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Add the flags for board_deep_sleep_allowed and
board_detect_ap_with_tpm_rst.
BUG=b:35647982
BRANCH=cr50
TEST=run firmware_DeepCr50SleepStress on electro. Make sure Bob can
still detect the AP state and doesn't enter deep sleep
Change-Id: I39e45f6eacc1cbdcb3ab1caaecd0836f8a2c073a
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/699294
Reviewed-by: Randall Spangler <rspangler@chromium.org>
In order to make a single hammer image support both base with and
without keyboard backlight. We need a way to dynamically determine if
backlight is present, and send the correct HID descriptors. This is done
through declaring two HID descriptors and return the correct one
depending on whether or not the backlight is present.
BRANCH=none
BUG=b:67722756
TEST=On reworked board with pull-down on backlight pin,
USB descriptor has backlight HID report descriptor, and is
functional.
TEST=On old board with both pull-up and pull-down (equivalent to
having pull-up only, i.e. no backlight)
USB descriptor does not have backlight HID report descriptor
Change-Id: Ie3eac9b3d4cd749308ccfb96a7db469701f9793b
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/770600
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
